专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20120300878A1 DYNAMIC DIGITAL PRE-DISTORTION SYSTEM 有权
标题翻译：动态数字预失真系统
公开(公告)号：US20120300878A1
公开(公告)日：2012-11-29
申请号：US13567724
申请日：2012-08-06
申请人： Khiem V. Cai , David B. Rutan , Ahmad Khanifar , Armando C. Cova
发明人： Khiem V. Cai , David B. Rutan , Ahmad Khanifar , Armando C. Cova
IPC分类号： H04L25/49
CPC分类号： H04B1/62 , H03F1/3241 , H03F1/3247 , H03F1/3294 , H03F3/24 , H03F2200/336 , H03F2200/451 , H03F2201/3224 , H04B1/0475 , H04B17/13 , H04B2001/0425 , H04W52/52
摘要： A Dynamic Digital Pre-Distortion (DDPD) system is disclosed to rapidly correct power amplifier (PA) non-linearity and memory effects. To perform pre-distortion, a DDPD engine predistorts an input signal in order to cancel PA nonlinearities as the signal is amplified by the PA. The DDPD engine is implemented as a composite of one linear filter and N−1 high order term linear filters. The bank of linear filters have programmable complex coefficients. To compute the coefficients, samples from the transmit path and a feedback path are captured, and covariance matrices A and B are computed using optimized hardware. After the covariance matrices are computed, Gaussian elimination processing may be employed to compute the coefficients. Mathematical and hardware optimizations may be employed to simplify and reduce the number of multiplication operands and other operations, which can enable the DDPD system to fit within a single chip.
摘要翻译：公开了动态数字预失真（DDPD）系统来快速校正功率放大器（PA）的非线性和记忆效应。为了执行预失真，DDPD引擎预失真输入信号，以便随着信号被PA放大而取消PA非线性。 DDPD引擎实现为一个线性滤波器和N-1个高阶项线性滤波器的组合。线性滤波器组具有可编程的复系数。为了计算系数，捕获来自发射路径和反馈路径的样本，并使用优化的硬件来计算协方差矩阵A和B. 在协方差矩阵被计算之后，可以采用高斯消去处理来计算系数。可以采用数学和硬件优化来简化和减少乘法操作数和其他操作的数量，这可以使DDPD系统适合于单个芯片内。

2. 发明授权

US08259843B2 Dynamic digital pre-distortion system 有权
标题翻译：动态数字预失真系统
公开(公告)号：US08259843B2
公开(公告)日：2012-09-04
申请号：US13198891
申请日：2011-08-05
申请人： Khiem V. Cai , David B. Rutan , Ahmad Khanifar , Armando C. Cova
发明人： Khiem V. Cai , David B. Rutan , Ahmad Khanifar , Armando C. Cova
IPC分类号： H04L27/00
CPC分类号： H04B1/62 , H03F1/3241 , H03F1/3247 , H03F1/3294 , H03F3/24 , H03F2200/336 , H03F2200/451 , H03F2201/3224 , H04B1/0475 , H04B17/13 , H04B2001/0425 , H04W52/52
摘要： A Dynamic Digital Pre-Distortion (DDPD) system is disclosed to rapidly correct power amplifier (PA) non-linearity and memory effects. To perform pre-distortion, a DDPD engine predistorts an input signal in order to cancel PA nonlinearities as the signal is amplified by the PA. The DDPD engine is implemented as a composite of one linear filter and N−1 high order term linear filters. The bank of linear filters have programmable complex coefficients. To compute the coefficients, samples from the transmit path and a feedback path are captured, and covariance matrices A and B are computed using optimized hardware. After the covariance matrices are computed, Gaussian elimination processing may be employed to compute the coefficients. Mathematical and hardware optimizations may be employed to simplify and reduce the number of multiplication operands and other operations, which can enable the DDPD system to fit within a single chip.
摘要翻译：公开了动态数字预失真（DDPD）系统来快速校正功率放大器（PA）的非线性和记忆效应。为了执行预失真，DDPD引擎预失真输入信号，以便随着信号被PA放大而取消PA非线性。 DDPD引擎实现为一个线性滤波器和N-1个高阶项线性滤波器的组合。线性滤波器组具有可编程的复系数。为了计算系数，捕获来自发射路径和反馈路径的样本，并使用优化的硬件来计算协方差矩阵A和B. 在协方差矩阵被计算之后，可以采用高斯消去处理来计算系数。可以采用数学和硬件优化来简化和减少乘法操作数和其他操作的数量，这可以使DDPD系统适合于单个芯片内。

3. 发明授权

US08005162B2 Dynamic digital pre-distortion system 有权
标题翻译：动态数字预失真系统
公开(公告)号：US08005162B2
公开(公告)日：2011-08-23
申请号：US11788451
申请日：2007-04-20
申请人： Khiem V. Cai , David B. Rutan , Ahmad Khanifar , Armando C. Cova
发明人： Khiem V. Cai , David B. Rutan , Ahmad Khanifar , Armando C. Cova
IPC分类号： H04K1/02 , H04L25/03 , H04L25/49
CPC分类号： H04B1/62 , H03F1/3241 , H03F1/3247 , H03F1/3294 , H03F3/24 , H03F2200/336 , H03F2200/451 , H03F2201/3224 , H04B1/0475 , H04B17/13 , H04B2001/0425 , H04W52/52
摘要： A Dynamic Digital Pre-Distortion (DDPD) system is disclosed to rapidly correct power amplifier (PA) non-linearity and memory effects. To perform pre-distortion, a DDPD engine predistorts an input signal in order to cancel PA nonlinearities as the signal is amplified by the PA. The DDPD engine is implemented as a composite of one linear filter and N−1 high order term linear filters. The bank of linear filters have programmable complex coefficients. To compute the coefficients, samples from the transmit path and a feedback path are captured, and covariance matrices A and B are computed using optimized hardware. After the covariance matrices are computed, Gaussian elimination processing may be employed to compute the coefficients. Mathematical and hardware optimizations may be employed to simplify and reduce the number of multiplication operands and other operations, which can enable the DDPD system to fit within a single chip.
摘要翻译：公开了动态数字预失真（DDPD）系统来快速校正功率放大器（PA）的非线性和记忆效应。为了执行预失真，DDPD引擎预失真输入信号，以便随着信号被PA放大而取消PA非线性。 DDPD引擎实现为一个线性滤波器和N-1个高阶项线性滤波器的组合。线性滤波器组具有可编程的复系数。为了计算系数，捕获来自发射路径和反馈路径的样本，并使用优化的硬件来计算协方差矩阵A和B. 在协方差矩阵被计算之后，可以采用高斯消去处理来计算系数。可以采用数学和硬件优化来简化和减少乘法操作数和其他操作的数量，这可以使DDPD系统适合于单个芯片内。

4. 发明授权

US08588332B2 Dynamic digital pre-distortion system 有权
标题翻译：动态数字预失真系统
公开(公告)号：US08588332B2
公开(公告)日：2013-11-19
申请号：US13567724
申请日：2012-08-06
申请人： Khiem V. Cai , David B. Rutan , Ahmad Khanifar , Armando C. Cova
发明人： Khiem V. Cai , David B. Rutan , Ahmad Khanifar , Armando C. Cova
IPC分类号： H04K1/02 , H04L25/03 , H04L25/49
CPC分类号： H04B1/62 , H03F1/3241 , H03F1/3247 , H03F1/3294 , H03F3/24 , H03F2200/336 , H03F2200/451 , H03F2201/3224 , H04B1/0475 , H04B17/13 , H04B2001/0425 , H04W52/52
摘要： A Dynamic Digital Pre-Distortion (DDPD) system is disclosed to rapidly correct power amplifier (PA) non-linearity and memory effects. To perform pre-distortion, a DDPD engine predistorts an input signal in order to cancel PA nonlinearities as the signal is amplified by the PA. The DDPD engine is implemented as a composite of one linear filter and N−1 high order term linear filters. The bank of linear filters have programmable complex coefficients. To compute the coefficients, samples from the transmit path and a feedback path are captured, and covariance matrices A and B are computed using optimized hardware. After the covariance matrices are computed, Gaussian elimination processing may be employed to compute the coefficients. Mathematical and hardware optimizations may be employed to simplify and reduce the number of multiplication operands and other operations, which can enable the DDPD system to fit within a single chip.
摘要翻译：公开了动态数字预失真（DDPD）系统来快速校正功率放大器（PA）的非线性和记忆效应。为了执行预失真，DDPD引擎预失真输入信号，以便随着信号被PA放大而取消PA非线性。 DDPD引擎实现为一个线性滤波器和N-1个高阶项线性滤波器的组合。线性滤波器组具有可编程的复系数。为了计算系数，捕获来自发射路径和反馈路径的样本，并使用优化的硬件来计算协方差矩阵A和B. 在协方差矩阵被计算之后，可以采用高斯消去处理来计算系数。可以采用数学和硬件优化来简化和减少乘法操作数和其他操作的数量，这可以使DDPD系统适合于单个芯片内。

5. 发明申请

US20110286509A1 DYNAMIC DIGITAL PRE-DISTORTION SYSTEM 有权
标题翻译：动态数字预失真系统
公开(公告)号：US20110286509A1
公开(公告)日：2011-11-24
申请号：US13198891
申请日：2011-08-05
申请人： Khiem V. Cai , David B. Rutan , Ahmad Khanifar , Armando C. Cova
发明人： Khiem V. Cai , David B. Rutan , Ahmad Khanifar , Armando C. Cova
IPC分类号： H04L25/49 , H04B17/00
CPC分类号： H04B1/62 , H03F1/3241 , H03F1/3247 , H03F1/3294 , H03F3/24 , H03F2200/336 , H03F2200/451 , H03F2201/3224 , H04B1/0475 , H04B17/13 , H04B2001/0425 , H04W52/52
摘要： A Dynamic Digital Pre-Distortion (DDPD) system is disclosed to rapidly correct power amplifier (PA) non-linearity and memory effects. To perform pre-distortion, a DDPD engine predistorts an input signal in order to cancel PA nonlinearities as the signal is amplified by the PA. The DDPD engine is implemented as a composite of one linear filter and N−1 high order term linear filters. The bank of linear filters have programmable complex coefficients. To compute the coefficients, samples from the transmit path and a feedback path are captured, and covariance matrices A and B are computed using optimized hardware. After the covariance matrices are computed, Gaussian elimination processing may be employed to compute the coefficients. Mathematical and hardware optimizations may be employed to simplify and reduce the number of multiplication operands and other operations, which can enable the DDPD system to fit within a single chip.
摘要翻译：公开了动态数字预失真（DDPD）系统来快速校正功率放大器（PA）的非线性和记忆效应。为了执行预失真，DDPD引擎预失真输入信号，以便随着信号被PA放大而取消PA非线性。 DDPD引擎实现为一个线性滤波器和N-1个高阶项线性滤波器的组合。线性滤波器组具有可编程的复系数。为了计算系数，捕获来自发射路径和反馈路径的样本，并使用优化的硬件来计算协方差矩阵A和B. 在协方差矩阵被计算之后，可以采用高斯消去处理来计算系数。可以采用数学和硬件优化来简化和减少乘法操作数和其他操作的数量，这可以使DDPD系统适合于单个芯片内。

6. 发明申请

US20080260066A1 Dynamic digital pre-distortion system 有权
标题翻译：动态数字预失真系统
公开(公告)号：US20080260066A1
公开(公告)日：2008-10-23
申请号：US11788451
申请日：2007-04-20
申请人： Khiem V. Cai , David B. Rutan , Ahmad Khanifar , Armando C. Cova
发明人： Khiem V. Cai , David B. Rutan , Ahmad Khanifar , Armando C. Cova
IPC分类号： H04L25/49
CPC分类号： H04B1/62 , H03F1/3241 , H03F1/3247 , H03F1/3294 , H03F3/24 , H03F2200/336 , H03F2200/451 , H03F2201/3224 , H04B1/0475 , H04B17/13 , H04B2001/0425 , H04W52/52
摘要： A Dynamic Digital Pre-Distortion (DDPD) system is disclosed to rapidly correct power amplifier (PA) non-linearity and memory effects. To perform pre-distortion, a DDPD engine predistorts an input signal in order to cancel PA nonlinearities as the signal is amplified by the PA. The DDPD engine is implemented as a composite of one linear filter and N-1 high order term linear filters. The bank of linear filters have programmable complex coefficients. To compute the coefficients, samples from the transmit path and a feedback path are captured, and covariance matrices A and B are computed using optimized hardware. After the covariance matrices are computed, Gaussian elimination processing may be employed to compute the coefficients. Mathematical and hardware optimizations may be employed to simplify and reduce the number of multiplication operands and other operations, which can enable the DDPD system to fit within a single chip.
摘要翻译：公开了动态数字预失真（DDPD）系统来快速校正功率放大器（PA）的非线性和记忆效应。为了执行预失真，DDPD引擎预失真输入信号，以便随着信号被PA放大而取消PA非线性。 DDPD引擎实现为一个线性滤波器和N-1个高阶项线性滤波器的组合。线性滤波器组具有可编程的复系数。为了计算系数，捕获来自发射路径和反馈路径的样本，并使用优化的硬件来计算协方差矩阵A和B. 在协方差矩阵被计算之后，可以采用高斯消去处理来计算系数。可以采用数学和硬件优化来简化和减少乘法操作数和其他操作的数量，这可以使DDPD系统适合于单个芯片内。

7. 发明授权

US08121560B1 Pre-distortion with enhanced convergence for linearization 有权
标题翻译：预失真与线性化增强收敛
公开(公告)号：US08121560B1
公开(公告)日：2012-02-21
申请号：US12257313
申请日：2008-10-23
申请人： Majid Nemati Anaraki , Armando C. Cova
发明人： Majid Nemati Anaraki , Armando C. Cova
IPC分类号： H04B1/04
CPC分类号： H03F1/3247 , H03F1/3241 , H03F1/3258 , H03F1/34 , H03F3/24 , H03F2201/3224 , H04B2001/0425 , H04B2001/0433
摘要： A pre-distorter is provided for distorting an RF input signal to provide a pre-distorted radio frequency (RF) input signal to an amplifier that provides an amplified RF output signal, wherein the RF input signal has an envelope. The pre-distorter includes: a radio-frequency signal processing circuit that distorts the RF input signal according to a polynomial of powers of the envelope, each power of the envelope being weighted by a corresponding pre-distortion weight; and a performance monitor operable to compare a version of the amplified RF output signal to a delayed version of the RF input signal to provide an error signal, wherein the performance monitor is configured to iteratively adapt the coefficients based upon a gradient of a cost function, the cost function being a function of the error signal.
摘要翻译：提供预失真器用于使RF输入信号变形以向提供放大的RF输出信号的放大器提供预失真的射频（RF）输入信号，其中RF输入信号具有信封。预失真器包括：射频信号处理电路，其根据信封的功率的多项式扭曲RF输入信号，每个信号的功率由对应的预失真权重加权; 以及性能监视器，其可操作以将所述放大的RF输出信号的版本与所述RF输入信号的延迟版本进行比较，以提供误差信号，其中所述性能监视器被配置为基于成本函数的梯度迭代地适配所述系数，成本函数是误差信号的函数。

8. 发明授权

US6104241A High efficiency feed-forward RF power amplifier with predistoration enchancement 有权
标题翻译：具有预失真增强功能的高效率前馈RF功率放大器
公开(公告)号：US6104241A
公开(公告)日：2000-08-15
申请号：US356166
申请日：1999-07-16
申请人： Armando C. Cova , Lance T. Mucenieks
发明人： Armando C. Cova , Lance T. Mucenieks
IPC分类号： H03F3/68 , H03F1/00 , H03F1/26 , H03F1/32 , H03F3/20 , H04B1/04 , H04K1/02
CPC分类号： H03F1/32 , H03F1/3223 , H03F1/3247 , H03F2201/3215
摘要： An RF power amplifier linearization architecture contains main and auxiliary path RF amplifiers. A distortion-inverting circuit extracts the distortion component from the output signal of the main amplifier and combines it with a delayed sample of the RF input signal to drive an auxiliary path RF amplifier, via a predistorter. An output quadrature hybrid combines the output of the main and auxiliary path amplifiers. The cascading of the distortion-inverting circuit with the predistorter compensates for the non-linear behavior of the auxiliary path RF power amplifier thereby producing a composite signal at the output quadrature hybrid, in which RF carrier components from each amplifier combine constructively while distortion components cancel.
摘要翻译： RF功率放大器线性化架构包含主路径和辅助路径RF放大器。失真反相电路从主放大器的输出信号中提取失真分量，并将其与RF输入信号的延迟采样相结合，以通过预失真器驱动辅助路径RF放大器。输出正交混合组合主路径和辅助路径放大器的输出。失真反相电路与预失真器的级联补偿辅助路径RF功率放大器的非线性行为，从而在输出正交混合器处产生复合信号，其中来自每个放大器的RF载波分量在构造上组合而失真分量取消。

9. 发明授权

US07804359B1 Linearization with memory compensation 有权
标题翻译：线性化与存储器补偿
公开(公告)号：US07804359B1
公开(公告)日：2010-09-28
申请号：US12257335
申请日：2008-10-23
申请人： Armando C. Cova
发明人： Armando C. Cova
IPC分类号： H03F1/26
CPC分类号： H03F1/3247 , H03F1/3258 , H03F2201/3224 , H03F2201/3233
摘要： A polynomial generator and memory compensator module is provided that includes: a first bank of delay filters for generating current and delayed versions of the envelope for an RF input signal and for the square of the envelope, a polynomial generator for generating polynomials using the current and delayed versions of the envelope, each polynomial being weighted according to pre-distortion weights; an adder for adding the polynomials to provide a pre-distortion signal for pre-distorting the RF input signal to provide a pre-distorted RF input signal such that a power amplifier amplifying the pre-distorted RF input signal provides an amplified RF output signal that reduces a non-linearity of the power amplifier; and a second bank of delay filters for generating delayed versions of the output signal, wherein the adder further adds the delayed versions of the output signal to the polynomials to provide the pre-distortion signal.
摘要翻译：提供了一种多项式发生器和存储器补偿器模块，其包括：第一组延迟滤波器，用于产生用于RF输入信号和所述包络的平方的电流和延迟版本;多项式发生器，用于使用所述电流产生多项式;以及包络的延迟版本，每个多项式根据预失真权重进行加权; 加法器，用于将多项式相加以提供用于对RF输入信号进行预失真的预失真信号，以提供预失真的RF输入信号，使得放大预失真的RF输入信号的功率放大器提供放大的RF输出信号，降低功率放大器的非线性度; 以及用于产生所述输出信号的延迟版本的第二延迟滤波器组，其中所述加法器还将所述输出信号的延迟版本加到所述多项式以提供所述预失真信号。

10. 发明授权

US08295394B1 Error signal formation for linearization 有权
标题翻译：用于线性化的误差信号形成
公开(公告)号：US08295394B1
公开(公告)日：2012-10-23
申请号：US12257292
申请日：2008-10-23
申请人： Adric Q. Broadwell , Armando C. Cova , Frederic Roger , Qian Yu
发明人： Adric Q. Broadwell , Armando C. Cova , Frederic Roger , Qian Yu
IPC分类号： H04K1/02
CPC分类号： H03F1/3247 , H03F2201/3224
摘要： A performance monitor for generating a digital error signal based upon an RF input signal and an amplified RF output signal is provided. The monitor includes: a first analog-to-digital converter operable to digitize an in-phase (I) and a quadrature-phase (Q) version of the RF input signal responsive to a first clock signal to provide a first digital I signal and a first digital Q signal; a second analog-to-digital converter operable to digitize an in-phase (I) and a quadrature-phase version of the amplified RF output signal responsive to a second clock signal to provide a second digital I signal and a second digital Q signal; a first adaptive delay filter to delay the first digital I signal and the first digital Q signal to provide a first delayed complex signal according to a first delay; a second adaptive filter to delay the second digital I signal and the second digital Q signals to provide a second delayed complex signal according to a second delay; a complex gain matching adder operable to add a complex gain matching factor to a selected one of the delayed complex signals to provide a gain matched complex signal; and an adder to add the gain matched complex signal to a remaining one of the first and second delayed complex signals to provide the digital error signal.
摘要翻译：提供了一种用于基于RF输入信号和放大的RF输出信号产生数字误差信号的性能监视器。监视器包括：第一模数转换器，用于响应于第一时钟信号数字化RF输入信号的同相（I）和正交相位（Q）版本，以提供第一数字I信号和第一数字Q信号; 第二模数转换器，用于响应于第二时钟信号数字化放大的RF输出信号的同相（I）和正交相位版本，以提供第二数字I信号和第二数字Q信号; 第一自适应延迟滤波器，用于延迟第一数字I信号和第一数字Q信号，以根据第一延迟提供第一延迟复信号; 第二自适应滤波器，用于延迟所述第二数字I信号和所述第二数字Q信号，以根据第二延迟提供第二延迟复信号; 复增益匹配加法器，用于将复增益匹配因子添加到所选延迟复信号中的一个以提供增益匹配复信号; 以及加法器，用于将增益匹配复信号与第一和第二延迟复数信号中的剩余的一个相加，以提供数字误差信号。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式