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1. 发明申请

US20100217905A1 Synchronization Optimized Queuing System 失效
标题翻译：同步优化排队系统
公开(公告)号：US20100217905A1
公开(公告)日：2010-08-26
申请号：US12391373
申请日：2009-02-24
申请人： Lakshminarayana Arimilli , Claude Basso , Piyush Chaudhary , Benard C. Drerup , Jody B. Joyner , Jan-Bernd Themann , Christoph Raisch , Colin B. Verrilli
发明人： Lakshminarayana Arimilli , Claude Basso , Piyush Chaudhary , Benard C. Drerup , Jody B. Joyner , Jan-Bernd Themann , Christoph Raisch , Colin B. Verrilli
IPC分类号： G06F13/24 , G06F9/54
CPC分类号： G06F9/545 , G06F9/546
摘要： A synchronization optimized queuing method and device to minimize software/hardware interaction in network interface hardware during an end-of-initiative process, including network adapter queue implementations for network interface hardware for optimized communication in a computer system. An end-of-initiative procedure to ensure that the network interface hardware has received an interrupt enable and to recheck the interrupt queue is unnecessary in the present invention.
摘要翻译：一种同步优化的排队方法和设备，用于最大程度地减少网络接口硬件中的软件/硬件交互，包括用于计算机系统中优化通信的网络接口硬件的网络适配器队列实现。在本发明中，确保网络接口硬件已经接收到中断使能并重新检查中断队列的最终主动性过程是不必要的。

2. 发明授权

US08302109B2 Synchronization optimized queuing system 失效
标题翻译：同步优化排队系统
公开(公告)号：US08302109B2
公开(公告)日：2012-10-30
申请号：US12391373
申请日：2009-02-24
申请人： Lakshminarayana Arimilli , Claude Basso , Piyush Chaudhary , Bernard C. Drerup , Jody B. Joyner , Jan-Bernd Themann , Christoph Raisch , Colin B. Verrilli
发明人： Lakshminarayana Arimilli , Claude Basso , Piyush Chaudhary , Bernard C. Drerup , Jody B. Joyner , Jan-Bernd Themann , Christoph Raisch , Colin B. Verrilli
IPC分类号： G06F3/03
CPC分类号： G06F9/545 , G06F9/546
摘要： A synchronization optimized queuing method and device to minimize software/hardware interaction in network interface hardware during an end-of-initiative process, including network adapter queue implementations for network interface hardware for optimized communication in a computer system. An end-of-initiative procedure to ensure that the network interface hardware has received an interrupt enable and to recheck the interrupt queue is unnecessary in the present invention.
摘要翻译：一种同步优化的排队方法和设备，用于最大程度地减少网络接口硬件中的软件/硬件交互，包括用于计算机系统中优化通信的网络接口硬件的网络适配器队列实现。在本发明中，确保网络接口硬件已经接收到中断使能并重新检查中断队列的最终主动性过程是不必要的。

3. 发明授权

US07904693B2 Full virtualization of resources across an IP interconnect using page frame table 失效
标题翻译：使用页面框架表在IP互连中完全虚拟化资源
公开(公告)号：US07904693B2
公开(公告)日：2011-03-08
申请号：US12024773
申请日：2008-02-01
申请人： Ravi K. Arimilli , Claude Basso , Jean L. Calvignac , Piyush Chaudhary , Edward J. Seminaro
发明人： Ravi K. Arimilli , Claude Basso , Jean L. Calvignac , Piyush Chaudhary , Edward J. Seminaro
IPC分类号： G06F12/10
CPC分类号： G06F12/10 , G06F12/1081 , H04L29/12018 , H04L61/10
摘要： An addressing model is provided where devices, including I/O devices, are addressed with internet protocol (IP) addresses, which are considered part of the virtual address space. A task, such as an application, may be assigned an effective address range, which corresponds to addresses in the virtual address space. The virtual address space is expanded to include Internet protocol addresses. Thus, the page frame tables are also modified to include entries for IP addresses and additional properties for devices and I/O. Thus, a processing element, such as an I/O adapter or even a printer, for example, may also be addressed using IP addresses without the need for library calls, device drivers, pinning memory, and so forth. This addressing model also provides full virtualization of resources across an IP interconnect, allowing a process to access an I/O device across a network.
摘要翻译：提供了一种寻址模型，其中包括I / O设备在内的设备通过互联网协议（IP）地址进行寻址，这些地址被认为是虚拟地址空间的一部分。可以为任务（例如应用程序）分配与虚拟地址空间中的地址对应的有效地址范围。虚拟地址空间被扩展为包括互联网协议地址。因此，页框表也被修改为包括用于设备和I / O的IP地址和附加属性的条目。因此，例如，诸如I / O适配器或甚至打印机的处理元件也可以使用IP地址来寻址，而不需要库调用，设备驱动器，固定存储器等。该寻址模型还可以跨IP互连提供资源的完全虚拟化，从而允许进程通过网络访问I / O设备。

4. 发明申请

US20090198951A1 Full Virtualization of Resources Across an IP Interconnect 有权
标题翻译：通过IP互连完整的资源虚拟化
公开(公告)号：US20090198951A1
公开(公告)日：2009-08-06
申请号：US12024744
申请日：2008-02-01
申请人： Ravi K. Arimilli , Claude Basso , Jean L. Calvignac , Piyush Chaudhary , Edward J. Seminaro
发明人： Ravi K. Arimilli , Claude Basso , Jean L. Calvignac , Piyush Chaudhary , Edward J. Seminaro
IPC分类号： G06F9/34
CPC分类号： G06F13/387 , H04L61/2007 , H04L61/35
摘要： An addressing model is provided where all resources, including memory and devices, are addressed with internet protocol (IP) addresses. A task, such as an application, may be assigned a range of IP addresses rather than an effective address range. Thus, a processing element, such as an I/O adapter or even a printer, for example, may also be addressed using IP addresses without the need for library calls, device drivers, pinning memory, and so forth. This addressing model also provides full virtualization of resources across an IP interconnect, allowing a process to access an I/O device across a network.
摘要翻译：提供了一种寻址模式，其中所有资源（包括存储器和设备）都使用互联网协议（IP）地址进行寻址。任务（例如应用程序）可以分配一个IP地址范围而不是有效的地址范围。因此，例如，诸如I / O适配器或甚至打印机的处理元件也可以使用IP地址来寻址，而不需要库调用，设备驱动器，固定存储器等。该寻址模型还可以跨IP互连提供资源的完全虚拟化，从而允许进程通过网络访问I / O设备。

5. 发明授权

US07900016B2 Full virtualization of resources across an IP interconnect 有权
标题翻译：通过IP互连完全虚拟化资源
公开(公告)号：US07900016B2
公开(公告)日：2011-03-01
申请号：US12024744
申请日：2008-02-01
申请人： Ravi K. Arimilli , Claude Basso , Jean L. Calvignac , Piyush Chaudhary , Edward J. Seminaro
发明人： Ravi K. Arimilli , Claude Basso , Jean L. Calvignac , Piyush Chaudhary , Edward J. Seminaro
IPC分类号： G06F12/10
CPC分类号： G06F13/387 , H04L61/2007 , H04L61/35
摘要： An addressing model is provided where all resources, including memory and devices, are addressed with internet protocol (IP) addresses. A task, such as an application, may be assigned a range of IP addresses rather than an effective address range. Thus, a processing element, such as an I/O adapter or even a printer, for example, may also be addressed using IP addresses without the need for library calls, device drivers, pinning memory, and so forth. This addressing model also provides full virtualization of resources across an IP interconnect, allowing a process to access an I/O device across a network.
摘要翻译：提供了一种寻址模式，其中所有资源（包括存储器和设备）都使用互联网协议（IP）地址进行寻址。任务（例如应用程序）可以分配一个IP地址范围而不是有效的地址范围。因此，例如，诸如I / O适配器或甚至打印机的处理元件也可以使用IP地址来寻址，而不需要库调用，设备驱动器，固定存储器等。该寻址模型还可以跨IP互连提供资源的完全虚拟化，从而允许进程通过网络访问I / O设备。

6. 发明申请

US20090198953A1 Full Virtualization of Resources Across an IP Interconnect Using Page Frame Table 失效
标题翻译：通过IP帧互连使用页面框架完整的资源虚拟化
公开(公告)号：US20090198953A1
公开(公告)日：2009-08-06
申请号：US12024773
申请日：2008-02-01
申请人： Ravi K. Arimilli , Claude Basso , Jean L. Calvignac , Piyush Chaudhary , Edward J. Seminaro
发明人： Ravi K. Arimilli , Claude Basso , Jean L. Calvignac , Piyush Chaudhary , Edward J. Seminaro
IPC分类号： G06F12/10
CPC分类号： G06F12/10 , G06F12/1081 , H04L29/12018 , H04L61/10
摘要： An addressing model is provided where devices, including I/O devices, are addressed with internet protocol (IP) addresses, which are considered part of the virtual address space. A task, such as an application, may be assigned an effective address range, which corresponds to addresses in the virtual address space. The virtual address space is expanded to include Internet protocol addresses. Thus, the page frame tables are also modified to include entries for IP addresses and additional properties for devices and I/O. Thus, a processing element, such as an I/O adapter or even a printer, for example, may also be addressed using IP addresses without the need for library calls, device drivers, pinning memory, and so forth. This addressing model also provides full virtualization of resources across an IP interconnect, allowing a process to access an I/O device across a network.
摘要翻译：提供了一种寻址模型，其中包括I / O设备在内的设备通过互联网协议（IP）地址进行寻址，这些地址被认为是虚拟地址空间的一部分。可以为任务（例如应用程序）分配与虚拟地址空间中的地址对应的有效地址范围。虚拟地址空间被扩展为包括互联网协议地址。因此，页框表也被修改为包括用于设备和I / O的IP地址和附加属性的条目。因此，例如，诸如I / O适配器或甚至打印机的处理元件也可以使用IP地址来寻址，而不需要库调用，设备驱动器，固定存储器等。该寻址模型还可以跨IP互连提供资源的完全虚拟化，从而允许进程通过网络访问I / O设备。

7. 发明授权

US08056087B2 Effective use of a hardware barrier synchronization register for protocol synchronization 失效
标题翻译：有效使用硬件屏障同步寄存器进行协议同步
公开(公告)号：US08056087B2
公开(公告)日：2011-11-08
申请号：US11534891
申请日：2006-09-25
申请人： Piyush Chaudhary , Rama K. Govindaraju , Chulho Kim , Rajeev Sivaram , Hanhong Xue
发明人： Piyush Chaudhary , Rama K. Govindaraju , Chulho Kim , Rajeev Sivaram , Hanhong Xue
IPC分类号： G06F9/46
CPC分类号： G06F9/52 , G06F9/522
摘要： A barrier synchronization register, accessible to the nodes in a distributed data processing system, has portions thereof allotted to threads which are present in multiple groups. The barrier synchronization register portion allotted to a given thread has stored therein, over time, group identifier numbers. In this way the state space of a barrier synchronization register is shared over more than one group of process threads.
摘要翻译：分布式数据处理系统中的节点可访问的障碍同步寄存器，其部分分配给存在于多个组中的线程。分配给给定线程的屏障同步寄存器部分随时间存储在组标识符号中。以这种方式，屏障同步寄存器的状态空间在多于一组进程线程上共享。

8. 发明授权

US07953085B2 Third party, broadcast, multicast and conditional RDMA operations 有权
标题翻译：第三方，广播，组播和有条件的RDMA操作
公开(公告)号：US07953085B2
公开(公告)日：2011-05-31
申请号：US12344766
申请日：2008-12-29
申请人： Fu Chung Chang , Piyush Chaudhary , Jason E. Goscinski , Jason S. Houston , Steven J. Martin
发明人： Fu Chung Chang , Piyush Chaudhary , Jason E. Goscinski , Jason S. Houston , Steven J. Martin
IPC分类号： G06F13/14
CPC分类号： H04L69/16 , H04L69/166
摘要： In a multinode data processing system in which nodes exchange information over a network or through a switch, the mechanism which enables out-of-order data transfer via Remote Direct Memory Access (RDMA) also provides a corresponding ability to carry out broadcast operations, multicast operations, third party operations and conditional RDMA operations. In a broadcast operation a source node transfers data packets in RDMA fashion to a plurality of destination nodes. Multicast operation works similarly except that distribution is selective. In third party operations a single central node in a cluster or network manages the transfer of data in RDMA fashion between other nodes or creates a mechanism for allowing a directed distribution of data between nodes. In conditional operation mode the transfer of data is conditioned upon one or more events occurring in either the source node or in the destination node.
摘要翻译：在节点通过网络交换信息或通过交换机交换信息的多节点数据处理系统中，通过远程直接存储器访问（RDMA）实现无序数据传输的机制也提供了相应的能力来执行广播操作，组播操作，第三方操作和有条件的RDMA操作。在广播操作中，源节点以RDMA方式将数据分组传送到多个目的节点。组播操作的工作方式类似，除了分发是有选择性的。在第三方操作中，集群或网络中的单个中央节点以RDMA方式在其他节点之间管理数据传输，或者创建一种允许在节点之间定向分发数据的机制。在条件操作模式中，数据的传输是在源节点或目标节点中发生的一个或多个事件的条件。

9. 发明申请

US20100269119A1 EVENT-BASED DYNAMIC RESOURCE PROVISIONING 有权
标题翻译：基于事件的动态资源提供
公开(公告)号：US20100269119A1
公开(公告)日：2010-10-21
申请号：US12424893
申请日：2009-04-16
申请人： Ravi Kumar Arimilli , Piyush Chaudhary
发明人： Ravi Kumar Arimilli , Piyush Chaudhary
IPC分类号： G06F9/46
CPC分类号： G06F9/5011 , G06F9/5061
摘要： Disclosed are a method, a system and a computer program product for automatically allocating and de-allocating resources for jobs executed or processed by one or more supercomputer systems. In one or more embodiments, a supercomputing system can process multiple jobs with respective supercomputing resources. A global resource manager can automatically allocate additional resources to a first job and de-allocate resources from a second job. In one or more embodiments, the global resource manager can provide the de-allocated resources to the first job as additional supercomputing resources. In one or more embodiments, the first job can use the additional supercomputing resources to perform data analysis at a higher resolution, and the additional resources can compensate for an amount of time the higher resolution analysis would take using originally allocated supercomputing resources.
摘要翻译：公开了一种用于为由一个或多个超级计算机系统执行或处理的作业自动分配和分配资源的方法，系统和计算机程序产品。在一个或多个实施例中，超级计算系统可以使用相应的超级计算资源处理多个作业。全局资源管理器可以自动为第一个作业分配额外的资源，并从第二个作业中分配资源。在一个或多个实施例中，全局资源管理器可以将去分配的资源作为附加的超级计算资源提供给第一作业。在一个或多个实施例中，第一作业可以使用额外的超级计算资源以更高的分辨率执行数据分析，并且附加资源可以补偿使用原始分配的超级计算资源的更高分辨率分析所花费的时间量。

10. 发明申请

US20060059282A1 Snapshot interface operations 失效
公开(公告)号：US20060059282A1
公开(公告)日：2006-03-16
申请号：US11017332
申请日：2004-12-20
申请人： Piyush Chaudhary , Jason Goscinski , Rama Govindaraju , Leonard Helmer , Peter Hochschild , Deryck Hong , John Houston , Jang-Soo Lee , Steven Martin , Yuqing Zhu
发明人： Piyush Chaudhary , Jason Goscinski , Rama Govindaraju , Leonard Helmer , Peter Hochschild , Deryck Hong , John Houston , Jang-Soo Lee , Steven Martin , Yuqing Zhu
IPC分类号： G06F13/00
CPC分类号： H04L67/1097
摘要： In a multinode data processing system in which the nodes communicate with one another via communication adapters over a network or switch, the adapters are provided with a dual register mechanism for tracking microcode task status. Upon the issuance of a disruptive command that requires attention from one of the nodes, the task status maintained in one register is copied to the snapshot register. As tasks within the adapter are completed, both registers are updated, thus providing a mechanism for the nodes to determine that all tasks active at the time of the disruptive command have completed. This means that the nodes now have a mechanism for determining, as soon as possible, that all tasks that are active when a disruptive command occurs have completed, thus allowing the data processing node to perform such operations as releasing system memory that is associated with the disruptive command, thus eliminating temporal overhead that can affect performance.

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