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1. 发明授权

US09678676B2 Method for storage devices to achieve low write amplification with low over provision 有权
公开(公告)号：US09678676B2
公开(公告)日：2017-06-13
申请号：US13461899
申请日：2012-05-02
申请人： Lau Nguyen , Perry Neos , Luan Ton-That
发明人： Lau Nguyen , Perry Neos , Luan Ton-That
IPC分类号： G06F12/02 , G06F3/06
CPC分类号： G06F3/0616 , G06F3/0652 , G06F3/0679 , G06F12/0246 , G06F2212/7209
摘要： A solid state drive (SSD) includes an SSD control module configured to determine frequencies corresponding to how often data stored in respective logical addresses associated with the SSD is updated and form groups of the logical addresses according to the frequencies, and a memory control module configured to rewrite the data to physical addresses in blocks of an SSD storage region based on the groups.

2. 发明申请

US20120303873A1 METHOD FOR STORAGE DEVICES TO ACHIEVE LOW WRITE AMPLIFICATION WITH LOW OVER PROVISION 有权
标题翻译：存储设备的方法，用于实现低写扩频功能
公开(公告)号：US20120303873A1
公开(公告)日：2012-11-29
申请号：US13461899
申请日：2012-05-02
申请人： Lau Nguyen , Perry Neos , Luan Ton-That
发明人： Lau Nguyen , Perry Neos , Luan Ton-That
IPC分类号： G06F12/00
CPC分类号： G06F3/0616 , G06F3/0652 , G06F3/0679 , G06F12/0246 , G06F2212/7209
摘要： A solid state drive (SSD) includes an SSD control module configured to determine frequencies corresponding to how often data stored in respective logical addresses associated with the SSD is updated and form groups of the logical addresses according to the frequencies, and a memory control module configured to rewrite the data to physical addresses in blocks of an SSD storage region based on the groups.
摘要翻译：固态驱动器（SSD）包括SSD控制模块，其被配置为确定对应于根据频率更新存储在与SSD相关联的相应逻辑地址中的数据的频率和形成逻辑地址组的频率，以及配置的存储器控制模块基于组将数据重写到SSD存储区域的块中的物理地址。

3. 发明申请

US20100235565A1 APPARATUS AND METHOD TO PROTECT METADATA AGAINST UNEXPECTED POWER DOWN 失效
标题翻译：防止意外掉电的元数据的装置和方法
公开(公告)号：US20100235565A1
公开(公告)日：2010-09-16
申请号：US12619938
申请日：2009-11-17
申请人： Luan Ton-That , Lau Nguyen , Gwoyuh Hwu
发明人： Luan Ton-That , Lau Nguyen , Gwoyuh Hwu
IPC分类号： G06F12/00 , G06F12/10 , G06F12/02
CPC分类号： G06F12/0246 , G06F11/1441 , G06F2212/7207
摘要： A system includes first memory configured to store first metadata to associate logical addresses with physical addresses. Second memory is configured to include the physical addresses, to store first data based on the physical addresses, and to store portions of the first metadata when a status of a predetermined group of the physical addresses is changed. A recovery module is configured to update the first metadata based on the portions of the first metadata stored in the second memory.
摘要翻译：系统包括被配置为存储第一元数据以将逻辑地址与物理地址相关联的第一存储器。第二存储器被配置为包括物理地址，以基于物理地址存储第一数据，并且当物理地址的预定组的状态改变时存储第一元数据的部分。恢复模块被配置为基于存储在第二存储器中的第一元数据的部分来更新第一元数据。

4. 发明授权

US08572309B2 Apparatus and method to protect metadata against unexpected power down 失效
标题翻译：保护元数据防止意外断电的装置和方法
公开(公告)号：US08572309B2
公开(公告)日：2013-10-29
申请号：US12619938
申请日：2009-11-17
申请人： Luan Ton-That , Lau Nguyen , Gwoyuh Hwu
发明人： Luan Ton-That , Lau Nguyen , Gwoyuh Hwu
IPC分类号： G06F12/00 , G06F12/10 , G06F12/02
CPC分类号： G06F12/0246 , G06F11/1441 , G06F2212/7207
摘要： A system includes first memory configured to store first metadata to associate logical addresses with physical addresses. Second memory is configured to include the physical addresses, to store first data based on the physical addresses, and to store portions of the first metadata when a status of a predetermined group of the physical addresses is changed. A recovery module is configured to update the first metadata based on the portions of the first metadata stored in the second memory.
摘要翻译：系统包括被配置为存储第一元数据以将逻辑地址与物理地址相关联的第一存储器。第二存储器被配置为包括物理地址，以基于物理地址存储第一数据，并且当物理地址的预定组的状态改变时存储第一元数据的部分。恢复模块被配置为基于存储在第二存储器中的第一元数据的部分来更新第一元数据。

5. 发明授权

US08489804B1 System for using dynamic random access memory to reduce the effect of write amplification in flash memory 有权
标题翻译：用于写入内存的系统
公开(公告)号：US08489804B1
公开(公告)日：2013-07-16
申请号：US12870089
申请日：2010-08-27
申请人： Lau Nguyen , Perry Neos
发明人： Lau Nguyen , Perry Neos
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F12/00 , G06F12/02 , G06F2212/2022 , G06F2212/7201 , G06F2212/7205
摘要： A system includes a selection module, a control module, an erasing module, and a read/write module. The selection module is configured to select X of Y memory blocks (i) based on fullness of the X memory blocks and (ii) in response to a write command, where X and Y are integers greater than or equal to 1. The Y memory blocks are located in first memory. The control module is configured to store first data from the X memory blocks in second memory. The erasing module is configured to erase the first data from the X memory blocks. The read/write module is configured to write second data to the X memory blocks based on the write command.
摘要翻译：系统包括选择模块，控制模块，擦除模块和读/写模块。选择模块被配置为基于X存储器块的充满度来选择Y的Y个存储器块（i），以及（ii）响应于写入命令，其中X和Y是大于或等于1的整数.Y存储器块位于第一个存储器中。控制模块被配置为存储来自第二存储器中的X个存储器块的第一数据。擦除模块被配置为从X存储器块中擦除第一数据。读/写模块被配置为基于写命令向X存储器块写入第二数据。

6. 发明授权

US08407407B1 Solid state drive access control system with equalized access timing 有权
标题翻译：具有均衡访问时机的固态硬盘访问控制系统
公开(公告)号：US08407407B1
公开(公告)日：2013-03-26
申请号：US12883430
申请日：2010-09-16
申请人： Jason Adler , Lau Nguyen , Perry Neos
发明人： Jason Adler , Lau Nguyen , Perry Neos
IPC分类号： G06F13/12
CPC分类号： G06F12/0246 , G06F3/0613 , G06F3/0659 , G06F3/0688
摘要： A drive control module of a solid-state drive (SSD) includes a first module that receives host commands from one of a host command buffer and a drive interface of the SSD, converts the host commands to stage commands, and determines whether to store the stage commands in a stage slot of a staging memory or leave the stage slot empty. A second module transfers data between a buffer and a flash memory based on the stage commands. The flash memory comprises flash arrays. A third module detects a first empty stage of one of the flash arrays and based on an empty stage timer value triggers at least one of an end of the first empty stage, a start of an at least partially full stage of the one of the flash arrays, or a start of a second empty stage of the one of the flash arrays.
摘要翻译：固态驱动器（SSD）的驱动器控制模块包括从主机命令缓冲器和SSD的驱动器接口之一接收主机命令的第一模块，将主机命令转换为阶段命令，并且确定是否存储在阶段存储器的阶段槽中的阶段命令或将阶段槽留空。第二个模块基于舞台命令在缓冲器和闪存之间传输数据。闪存包括闪存阵列。第三模块检测闪光阵列之一的第一空白阶段，并且基于空阶段定时器值触发第一空阶段的结束中的至少一个，闪光灯之一的至少部分完整级的开始阵列或闪存阵列之一的第二空阶段的开始。

7. 发明授权

US08650438B2 Controller for reading data from non-volatile memory 有权
标题翻译：用于从非易失性存储器读取数据的控制器
公开(公告)号：US08650438B2
公开(公告)日：2014-02-11
申请号：US12842714
申请日：2010-07-23
申请人： Cheng Kuo Huang , Siu-Hung Fred Au , Lau Nguyen , Perry Neos
发明人： Cheng Kuo Huang , Siu-Hung Fred Au , Lau Nguyen , Perry Neos
IPC分类号： G06F11/00
CPC分类号： G06F11/1068 , G06F3/061 , G06F3/0659 , G06F3/0688 , G06F3/0689
摘要： The present disclosure includes systems and techniques relating to solid state drive controllers. In some implementations, a device includes a buffer that holds a block of data corresponding to a command from a host. The command identifies the block of data and a logical sequence in which the identified block of data is to be transmitted. In response to the command, a data retriever included in the device retrieves the portions of the block of data from non-volatile memory units in a retrieval sequence that is different from the logical sequence. When the device receives multiple commands identifying multiple blocks of data, the device services the commands in parallel by retrieving portions of blocks of data identified by both commands.
摘要翻译：本公开包括与固态驱动控制器有关的系统和技术。在一些实现中，设备包括保存对应于来自主机的命令的数据块的缓冲器。该命令识别数据块以及要发送所识别的数据块的逻辑序列。响应于该命令，包含在该设备中的数据检索器以与逻辑序列不同的检索顺序从非易失性存储器单元检索数据块的部分。当设备接收到识别多个数据块的多个命令时，设备通过检索由两个命令标识的数据块的部分来并行地服务命令。

8. 发明授权

US08543756B2 Solid-state drive command grouping 失效
标题翻译：固态驱动器命令分组
公开(公告)号：US08543756B2
公开(公告)日：2013-09-24
申请号：US12694501
申请日：2010-01-27
申请人： Lau Nguyen , Perry Neos , Gwoyuh Hwu
发明人： Lau Nguyen , Perry Neos , Gwoyuh Hwu
IPC分类号： G06F12/00
CPC分类号： G06F3/0613 , G06F3/0659 , G06F3/0679
摘要： A method and other embodiments associated with solid-state drive command grouping are described. In one embodiment, a first command and a second command are grouped into a command pack, where the first command and the second command do not share a common channel for execution. A solid-state drive is controlled to execute the command pack on the solid-state drive, where executing the command pack causes the first command and the second command to execute concurrently on separate channels.
摘要翻译：描述了与固态驱动命令分组相关联的方法和其他实施例。在一个实施例中，第一命令和第二命令被分组为命令包，其中第一命令和第二命令不共享用于执行的公共信道。控制固态驱动器以在固态驱动器上执行命令包，其中执行命令包使得第一命令和第二命令在单独的通道上同时执行。

9. 发明申请

US20110041007A1 Controller For Reading Data From Non-Volatile Memory 有权
标题翻译：用于从非易失性存储器读取数据的控制器
公开(公告)号：US20110041007A1
公开(公告)日：2011-02-17
申请号：US12842714
申请日：2010-07-23
申请人： Cheng Kuo Huang , Siu-Hung Fred Au , Lau Nguyen , Perry Neos
发明人： Cheng Kuo Huang , Siu-Hung Fred Au , Lau Nguyen , Perry Neos
IPC分类号： G06F12/00 , G06F11/14
CPC分类号： G06F11/1068 , G06F3/061 , G06F3/0659 , G06F3/0688 , G06F3/0689
摘要： The present disclosure includes systems and techniques relating to solid state drive controllers. In some implementations, a device includes a buffer that holds a block of data corresponding to a command from a host. The command identifies the block of data and a logical sequence in which the identified block of data is to be transmitted. In response to the command, a data retriever included in the device retrieves the portions of the block of data from non-volatile memory units in a retrieval sequence that is different from the logical sequence. When the device receives multiple commands identifying multiple blocks of data, the device services the commands in parallel by retrieving portions of blocks of data identified by both commands.
摘要翻译：本公开包括与固态驱动控制器有关的系统和技术。在一些实现中，设备包括保存对应于来自主机的命令的数据块的缓冲器。该命令识别数据块以及要发送所识别的数据块的逻辑序列。响应于该命令，包含在该设备中的数据检索器以与逻辑序列不同的检索顺序从非易失性存储器单元检索数据块的部分。当设备接收到识别多个数据块的多个命令时，设备通过检索由两个命令标识的数据块的部分来并行地服务命令。

10. 发明授权

US08549384B1 Method and apparatus for determining, based on an error correction code, one or more locations to store data in a flash memory 有权
标题翻译：用于基于纠错码确定将数据存储在闪速存储器中的一个或多个位置的方法和装置
公开(公告)号：US08549384B1
公开(公告)日：2013-10-01
申请号：US12822664
申请日：2010-06-24
申请人： ChengKuo Huang , Sui-Hung Fred Au , Xueshi Yang , Lau Nguyen
发明人： ChengKuo Huang , Sui-Hung Fred Au , Xueshi Yang , Lau Nguyen
IPC分类号： G11C29/00
CPC分类号： G06F11/2053 , G06F11/1012 , G11C29/24 , G11C29/4401 , G11C29/72 , G11C29/82 , G11C2029/0409 , G11C2029/0411
摘要： Apparatus having corresponding methods and computer-readable media comprise an encoder configured to provide encoded data according to an error correction code; a flash memory interface configured to write the encoded data to a location in flash memory, and to read the encoded data from the location in the flash memory; a decoder configured to decode the encoded data read from the location in the flash memory, and to indicate a number of resulting decode errors; and a retirement module configured to retire the location responsive to a number of resulting decode errors reaching an error threshold T.
摘要翻译：具有相应方法和计算机可读介质的装置包括：编码器，被配置为根据纠错码提供编码数据; 闪存接口，被配置为将编码数据写入闪速存储器中的位置，并从闪存中的位置读取编码数据; 解码器，被配置为对从闪速存储器中的位置读取的编码数据进行解码，并指示所得到的解码错误的数量; 以及退避模块，被配置为响应于到达错误阈值T的所得到的解码错误的数量而退出所述位置。

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