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1. 发明授权

US08635513B1 Architecture and control of Reed-Solomon list decoding 失效
标题翻译： Reed-Solomon列表解码的架构与控制
公开(公告)号：US08635513B1
公开(公告)日：2014-01-21
申请号：US13363898
申请日：2012-02-01
申请人： Siu-Hung Fred Au , Gregory Burd , Zining Wu , Jun Xu , Ichiro Kikuchi , Tony Yoon
发明人： Siu-Hung Fred Au , Gregory Burd , Zining Wu , Jun Xu , Ichiro Kikuchi , Tony Yoon
IPC分类号： H03M13/00
CPC分类号： H03M13/458 , H03M13/098 , H03M13/1102 , H03M13/1515 , H03M13/153 , H03M13/1545 , H03M13/1555 , H03M13/2906 , H03M13/3707 , H03M13/4146 , H03M13/45 , H03M13/451 , H03M13/63 , H03M13/6511
摘要： Systems and methods are provided for implementing list decoding in a Reed-Solomon (RS) error-correction system. A detector can provide a decision-codeword from a channel and can also provide soft-information for the decision-codeword. The soft-information can be organized into an order of combinations of error events for list decoding. An RS decoder can employ a list decoder that uses a pipelined list decoder architecture. The list decoder can include one or more syndrome modification circuits that can compute syndromes in parallel. A long division circuit can include multiple units that operate to compute multiple quotient polynomial coefficients in parallel. The list decoder can employ iterative decoding and a validity test to generate error indicators. The iterative decoding and validity test can use the lower syndromes.
摘要翻译：提供了用于在里德 - 所罗门（RS）纠错系统中实现列表解码的系统和方法。检测器可以从信道提供判决码字，并且还可以为判决码字提供软信息。软信息可以被组织成用于列表解码的错误事件的组合的顺序。 RS解码器可以使用使用流水线列表解码器架构的列表解码器。列表解码器可以包括可以并行计算综合征的一个或多个综合征修改电路。长分割电路可以包括并行地计算多个商多项式系数的多个单元。列表解码器可以采用迭代解码和有效性测试来产生错误指示符。迭代解码和有效性测试可以使用较低的综合征。

2. 发明授权

US08296635B2 Architecture and control of Reed-Solomon error-correction decoding 有权
标题翻译： Reed-Solomon纠错解码的架构与控制
公开(公告)号：US08296635B2
公开(公告)日：2012-10-23
申请号：US13364802
申请日：2012-02-02
申请人： Siu-Hung Fred Au , Gregory Burd , Zining Wu , Jun Xu , Ichiro Kikuchi , Tony Yoon
发明人： Siu-Hung Fred Au , Gregory Burd , Zining Wu , Jun Xu , Ichiro Kikuchi , Tony Yoon
IPC分类号： H03M13/00
CPC分类号： H03M13/458 , H03M13/098 , H03M13/1102 , H03M13/1515 , H03M13/153 , H03M13/1545 , H03M13/1555 , H03M13/2906 , H03M13/3707 , H03M13/4146 , H03M13/45 , H03M13/451 , H03M13/63 , H03M13/6511
摘要： Systems and methods are provided for implementing various aspects of a Reed-Solomon (RS) error-correction system. A detector can provide a decision-codeword from a channel and can also provide soft-information for the decision-codeword. If the decision-codeword corresponds to an inner code and an RS code is the outer code, a soft-information map can process the soft-information for the decision-codeword to produce soft-information for a RS decision-codeword. A RS decoder can employ the Berlekamp-Massey algorithm (BMA), list decoding, and a Chien search, and can include a pipelined architecture. A threshold-based control circuit can be used to predict whether list decoding will be needed and can suspend the list decoding operation if it predicts that list decoding is not needed.
摘要翻译：提供系统和方法来实现里德 - 所罗门（RS）纠错系统的各个方面。检测器可以从信道提供判决码字，并且还可以为判决码字提供软信息。如果判决码字对应于内码，RS码是外码，则软信息映射可以处理用于判决码字的软信息以产生用于RS判决码字的软信息。 RS解码器可以使用Berlekamp-Massey算法（BMA），列表解码和Chien搜索，并且可以包括流水线架构。可以使用基于阈值的控制电路来预测是否需要列表解码，并且如果它预测不需要列表解码，则可以暂停列表解码操作。

3. 发明授权

US08245118B2 Architecture and control of reed-solomon error identification and evaluation 有权
标题翻译：芦苇单体错误识别和评估的架构与控制
公开(公告)号：US08245118B2
公开(公告)日：2012-08-14
申请号：US12512710
申请日：2009-07-30
申请人： Ichiro Kikuchi , Siu-Hung Fred Au , Gregory Burd , Zining Wu , Jun Xu , Tony Yoon
发明人： Ichiro Kikuchi , Siu-Hung Fred Au , Gregory Burd , Zining Wu , Jun Xu , Tony Yoon
IPC分类号： H03M13/00
CPC分类号： H03M13/458 , H03M13/098 , H03M13/1102 , H03M13/1515 , H03M13/153 , H03M13/1545 , H03M13/1555 , H03M13/2906 , H03M13/3707 , H03M13/4146 , H03M13/45 , H03M13/451 , H03M13/63 , H03M13/6511
摘要： Systems and methods are provided for implementing error identification and evaluation for a Reed-Solomon (RS) error-correction code (ECC) system. The BMA algorithm and/or list decoding may produce one or more error locator polynomials that are related to a decision-codeword. An accelerated Chien search can be used to more quickly evaluate the one or more error locator polynomial. If the accelerated Chien search identifies a valid error locator polynomial, a normal Chien search can be used to identify error locations, and Forney's algorithm or an equivalent technique can be used to evaluate the error values. A RS ECC decoder can include a computation circuit that evaluates an error locator polynomial or an error evaluator polynomial. The computation circuit can include computation components that receive the coefficients of the polynomials.
摘要翻译：提供了系统和方法，用于实现里德 - 所罗门（RS）纠错码（ECC）系统的错误识别和评估。 BMA算法和/或列表解码可以产生与决策码字相关的一个或多个错误定位器多项式。加速Chien搜索可用于更快速地评估一个或多个错误定位器多项式。如果加速Chien搜索识别有效的错误定位器多项式，则可以使用正常的Chien搜索来识别错误位置，并且可以使用Forney的算法或等效技术来评估误差值。 RS ECC解码器可以包括评估错误定位器多项式或误差评估器多项式的计算电路。计算电路可以包括接收多项式的系数的计算组件。

4. 发明授权

US08132083B1 Architecture and control of reed-solomon list decoding 有权
标题翻译：芦苇列表解码的架构与控制
公开(公告)号：US08132083B1
公开(公告)日：2012-03-06
申请号：US12541720
申请日：2009-08-14
申请人： Siu-Hung Fred Au , Gregory Burd , Zining Wu , Jun Xu , Ichiro Kikuchi , Tony Yoon
发明人： Siu-Hung Fred Au , Gregory Burd , Zining Wu , Jun Xu , Ichiro Kikuchi , Tony Yoon
IPC分类号： H03M13/00
CPC分类号： H03M13/458 , H03M13/098 , H03M13/1102 , H03M13/1515 , H03M13/153 , H03M13/1545 , H03M13/1555 , H03M13/2906 , H03M13/3707 , H03M13/4146 , H03M13/45 , H03M13/451 , H03M13/63 , H03M13/6511
摘要： Systems and methods are provided for implementing list decoding in a Reed-Solomon (RS) error-correction system. A detector can provide a decision-codeword from a channel and can also provide soft-information for the decision-codeword. The soft-information can be organized into an order of combinations of error events for list decoding. An RS decoder can employ a list decoder that uses a pipelined list decoder architecture. The list decoder can include one or more syndrome modification circuits that can compute syndromes in parallel. A long division circuit can include multiple units that operate to compute multiple quotient polynomial coefficients in parallel. The list decoder can employ iterative decoding and a validity test to generate error indicators. The iterative decoding and validity test can use the lower syndromes.
摘要翻译：提供了用于在里德 - 所罗门（RS）纠错系统中实现列表解码的系统和方法。检测器可以从信道提供判决码字，并且还可以为判决码字提供软信息。软信息可以被组织成用于列表解码的错误事件的组合的顺序。 RS解码器可以使用使用流水线列表解码器架构的列表解码器。列表解码器可以包括可以并行计算综合征的一个或多个综合征修改电路。长分割电路可以包括并行地计算多个商多项式系数的多个单元。列表解码器可以采用迭代解码和有效性测试来产生错误指示符。迭代解码和有效性测试可以使用较低的综合征。

5. 发明授权

US07590923B1 Architecture and control of Reed-Solomon error identification and evaluation 有权
标题翻译：里德 - 所罗门错误识别和评估的架构与控制
公开(公告)号：US07590923B1
公开(公告)日：2009-09-15
申请号：US11195403
申请日：2005-08-01
申请人： Ichiro Kikuchi , Siu-Hung Fred Au , Gregory Burd , Zining Wu , Jun Xu , Tony Yoon
发明人： Ichiro Kikuchi , Siu-Hung Fred Au , Gregory Burd , Zining Wu , Jun Xu , Tony Yoon
IPC分类号： G06F11/00 , H03M13/00
CPC分类号： H03M13/458 , H03M13/098 , H03M13/1102 , H03M13/1515 , H03M13/153 , H03M13/1545 , H03M13/1555 , H03M13/2906 , H03M13/3707 , H03M13/4146 , H03M13/45 , H03M13/451 , H03M13/63 , H03M13/6511
摘要： Systems and methods are provided for implementing error identification and evaluation for a Reed-Solomon (RS) error-correction code (ECC) system. The BMA algorithm and/or list decoding may produce one or more error locator polynomials that are related to a decision-codeword. An accelerated Chien search can be used to more quickly evaluate the one or more error locator polynomial. If the accelerated Chien search identifies a valid error locator polynomial, a normal Chien search can be used to identify error locations, and Forney's algorithm or an equivalent technique can be used to evaluate the error values. A RS ECC decoder can include a computation circuit that evaluates an error locator polynomial or an error evaluator polynomial. The computation circuit can include computation components that receive the coefficients of the polynomials.
摘要翻译：提供了系统和方法，用于实现里德 - 所罗门（RS）纠错码（ECC）系统的错误识别和评估。 BMA算法和/或列表解码可以产生与判决码字相关的一个或多个错误定位器多项式。加速Chien搜索可用于更快速地评估一个或多个错误定位器多项式。如果加速Chien搜索识别有效的错误定位器多项式，则可以使用正常的Chien搜索来识别错误位置，并且可以使用Forney的算法或等效技术来评估误差值。 RS ECC解码器可以包括评估错误定位器多项式或误差评估器多项式的计算电路。计算电路可以包括接收多项式的系数的计算组件。

6. 发明申请

US20090083608A1 ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING 有权
标题翻译： REED-SOLOMON错误修正解码的架构与控制
公开(公告)号：US20090083608A1
公开(公告)日：2009-03-26
申请号：US12324285
申请日：2008-11-26
申请人： Siu-Hung Fred Au , Gregory Burd , Zining Wu , Jun Xu , Ichiro Kikuchi , Tony Yoon
发明人： Siu-Hung Fred Au , Gregory Burd , Zining Wu , Jun Xu , Ichiro Kikuchi , Tony Yoon
IPC分类号： H03M13/07 , G06F11/10
CPC分类号： H03M13/458 , H03M13/098 , H03M13/1102 , H03M13/1515 , H03M13/153 , H03M13/1545 , H03M13/1555 , H03M13/2906 , H03M13/3707 , H03M13/4146 , H03M13/45 , H03M13/451 , H03M13/63 , H03M13/6511
摘要： Systems and methods are provided for implementing various aspects of a Reed-Solomon (RS) error-correction system. A detector can provide a decision-codeword from a channel and can also provide soft-information for the decision-codeword. If the decision-codeword corresponds to an inner code and an RS code is the outer code, a soft-information map can process the soft-information for the decision-codeword to produce soft-information for a RS decision-codeword. A RS decoder can employ the Berlekamp-Massey algorithm (BMA), list decoding, and a Chien search, and can include a pipelined architecture. A threshold-based control circuit can be used to predict whether list decoding will be needed and can suspend the list decoding operation if it predicts that list decoding is not needed.
摘要翻译：提供系统和方法来实现里德 - 所罗门（RS）纠错系统的各个方面。检测器可以从信道提供判决码字，并且还可以为判决码字提供软信息。如果判决码字对应于内码，RS码是外码，则软信息映射可以处理用于判决码字的软信息以产生用于RS判决码字的软信息。 RS解码器可以使用Berlekamp-Massey算法（BMA），列表解码和Chien搜索，并且可以包括流水线架构。可以使用基于阈值的控制电路来预测是否需要列表解码，并且如果它预测不需要列表解码，则可以暂停列表解码操作。

7. 发明申请

US20090063937A1 ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING 有权
公开(公告)号：US20090063937A1
公开(公告)日：2009-03-05
申请号：US12249474
申请日：2008-10-10
申请人： Siu-Hung Fred Au , Gregory Burd , Zining Wu , Jun Xu , Ichiro Kikuchi , Tony Yoon
发明人： Siu-Hung Fred Au , Gregory Burd , Zining Wu , Jun Xu , Ichiro Kikuchi , Tony Yoon
IPC分类号： H03M13/00
CPC分类号： H03M13/458 , H03M13/098 , H03M13/1102 , H03M13/1515 , H03M13/153 , H03M13/1545 , H03M13/1555 , H03M13/2906 , H03M13/3707 , H03M13/4146 , H03M13/45 , H03M13/451 , H03M13/63 , H03M13/6511
摘要： Systems and methods are provided for implementing various aspects of a Reed-Solomon (RS) error-correction system. A detector can provide a decision-codeword from a channel and can also provide soft-information for the decision-codeword. If the decision-codeword corresponds to an inner code and an RS code is the outer code, a soft-information map can process the soft-information for the decision-codeword to produce soft-information for a RS decision-codeword. A RS decoder can employ the Berlekamp-Massey algorithm (BMA), list decoding, and a Chien search, and can include a pipelined architecture. A threshold-based control circuit can be used to predict whether list decoding will be needed and can suspend the list decoding operation if it predicts that list decoding is not needed.

8. 发明授权

US08949513B2 Data compression and compacting for memory devices 有权
标题翻译：存储器件的数据压缩和压缩
公开(公告)号：US08949513B2
公开(公告)日：2015-02-03
申请号：US13467173
申请日：2012-05-09
申请人： ChengKuo Huang , Siu-Hung Fred Au , Sean Lee , Fei Sun , Grace Pao Yi Chen , Man Cheung , Xueshi Yang
发明人： ChengKuo Huang , Siu-Hung Fred Au , Sean Lee , Fei Sun , Grace Pao Yi Chen , Man Cheung , Xueshi Yang
IPC分类号： G06F12/02 , G06F3/06
CPC分类号： G06F12/0246 , G06F3/0608 , G06F3/064 , G06F3/0679 , G06F2212/401
摘要： Embodiments of the present disclosure provide apparatuses and methods for determining a compacting arrangement to store logical addressable units, which include compressed data sectors, into hardware addressable units of a storage device. The compacting arrangement is based on compression information associated with the logical addressable units. A write module is used to write the compressed data sectors to the storage device according to the compacting arrangement.
摘要翻译：本公开的实施例提供了用于确定压缩布置以将包括压缩数据扇区的逻辑可寻址单元存储到存储设备的硬件可寻址单元中的装置和方法。压缩布置基于与逻辑可寻址单元相关联的压缩信息。写入模块用于根据压缩布置将压缩数据扇区写入存储设备。

9. 发明授权

US08868852B2 Interface management control systems and methods for non-volatile semiconductor memory 有权
标题翻译：用于非易失性半导体存储器的接口管理控制系统和方法
公开(公告)号：US08868852B2
公开(公告)日：2014-10-21
申请号：US13166340
申请日：2011-06-22
申请人： Chi Kong Lee , Siu-Hung Fred Au , Jungil Park , Hyunsuk Shin
发明人： Chi Kong Lee , Siu-Hung Fred Au , Jungil Park , Hyunsuk Shin
IPC分类号： G06F12/00 , G06F13/16
CPC分类号： G06F12/0246 , G06F13/1668 , G06F2212/7201
摘要： A control system includes a control module configured to control data transfer events of blocks of data between an interface management module and a non-volatile semiconductor memory based on at least two descriptors for each one of the data transfer events. The non-volatile semiconductor memory is prepared for a read event or a program event of the data transfer event. The interface management module and the non-volatile semiconductor memory are configured to operate within a solid-state memory drive. A command management module is configured to generate a parameter signal based on the at least two descriptors. The interface management module is configured to generate instruction signals based on the parameter signal and transmit the instruction signals to the non-volatile semiconductor memory to perform the read event or the program event.
摘要翻译：控制系统包括：控制模块，被配置为基于用于每个数据传输事件的至少两个描述符来控制在接口管理模块和非易失性半导体存储器之间的数据块的数据传输事件。准备非易失性半导体存储器用于数据传输事件的读取事件或程序事件。接口管理模块和非易失性半导体存储器被配置为在固态存储器驱动器内操作。命令管理模块被配置为基于所述至少两个描述符生成参数信号。接口管理模块被配置为基于参数信号生成指令信号，并将指令信号发送到非易失性半导体存储器以执行读取事件或程序事件。

10. 发明授权

US08788781B2 Descriptor scheduler 有权
标题翻译：描述符调度程序
公开(公告)号：US08788781B2
公开(公告)日：2014-07-22
申请号：US13331749
申请日：2011-12-20
申请人： Chi Kong Lee , Siu-Hung Fred Au , Jungil Park , Hyunsuk Shin
发明人： Chi Kong Lee , Siu-Hung Fred Au , Jungil Park , Hyunsuk Shin
IPC分类号： G06F12/00
CPC分类号： G06F3/0613 , G06F3/0659 , G06F3/068 , G06F3/0688
摘要： Methods, systems and computer program products for providing a sequencer that schedules job descriptors are described. The sequencer can manage the scheduling of the job descriptors for execution based on the availability of their respective segments and channels. For example, the sequencer can check the status of the segments, and identify one or more segments that are in busy or full state, or one or more segments that are in non-busy or empty state. Based on the status check, the sequencer can execute job descriptors out of order, and in particular, give priorities to job descriptors whose associated segments are available over job descriptors whose associated segments are in busy or full state.
摘要翻译：描述用于提供调度作业描述符的定序器的方法，系统和计算机程序产品。定序器可以根据其各自的段和通道的可用性来管理作业描述符的调度以便执行。例如，定序器可以检查段的状态，并识别处于忙或满状态的一个或多个段，或处于非忙或空状态的一个或多个段。基于状态检查，定序器可以执行无序的作业描述符，并且特别地，对相关段可用于其相关段处于忙或满状态的作业描述符的作业描述符给予优先级。

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