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1. 发明申请

US20080195920A1 SELF-TEST STRUCTURE AND METHOD OF TESTING A DIGITAL INTERFACE 审中-公开
标题翻译：自测试结构和测试数字接口的方法
公开(公告)号：US20080195920A1
公开(公告)日：2008-08-14
申请号：US11674478
申请日：2007-02-13
申请人： Lawrence B. Luce , Paul Kelleher , Diarmuid McSwiney
发明人： Lawrence B. Luce , Paul Kelleher , Diarmuid McSwiney
IPC分类号： G06F11/00 , H04B17/00
CPC分类号： G01R31/31716
摘要： A digital interface (22) includes a self-test structure (56). The structure (56) includes a transmit section (52) and a receive section (36) having a correlator (68). A method (114) of testing the interface (22) entails coupling the receive section (36) with the transmit section (52) and communicating a test data structure (86) from the transmit section (52) to the receive section (36) at a high data rate. The test data structure (86) includes a pre-defined sync pattern (88), a header (90), and a payload (92). The receive section (36) detects the sync pattern (88) and performs time frame synchronization (148) at the correlator (68). When synchronization (148) is successful, the receive section (36) decodes (154, 162) the header (90) and the payload (92). If time frame synchronization (148) and decoding (154, 162) are successful, a validation indicator (100) is output for external observation at a low data rate.
摘要翻译：数字接口（22）包括自检结构（56）。结构（56）包括具有相关器（68）的发射部分（52）和接收部分（36）。测试接口（22）的方法（114）需要将接收部分（36）与发送部分（52）耦合并将测试数据结构（86）从发送部分（52）传送到接收部分（36）以高数据速率。测试数据结构（86）包括预定义同步模式（88），报头（90）和有效载荷（92）。接收部分（36）检测同步模式（88）并且在相关器（68）处执行时间帧同步（148）。当同步（148）成功时，接收部分（36）解码（154,162）标题（90）和有效载荷（92）。如果时间帧同步（148）和解码（154,162）成功，则以低数据速率输出验证指示符（100）以进行外部观察。

2. 发明申请

US20070297537A1 System and method for EVM self-test 有权
标题翻译： EVM自检系统和方法
公开(公告)号：US20070297537A1
公开(公告)日：2007-12-27
申请号：US11476966
申请日：2006-06-27
申请人： Lawrence B. Luce
发明人： Lawrence B. Luce
IPC分类号： H03D3/00 , H03D1/04
CPC分类号： H04L27/38 , H04L27/0014 , H04L2027/0024
摘要： A system and method for EVM self-testing a communication device is provided including receiving (305) a complex waveform, sampling (310) first and second sample voltages from the complex waveform, selecting (315) first and second ideal voltages from I- and Q-arrays, and determining (320) an error vector by comparing the first and second sample voltages with the first and second ideal voltages for a desired number of comparisons (N). The first ideal voltage corresponds with the first sample voltage, the second ideal voltage corresponds with the second sample voltage, and the I- and Q-arrays are derived from a conversion of a bitstream to the complex waveform.
摘要翻译：提供了一种用于EVM自测试的通信设备的系统和方法，包括：从复合波形中接收（305）复杂波形，采样（310）第一和第二采样电压，从I和...中选择（315）第一和第二理想电压; 并且通过将所述第一和第二采样电压与所述第一和第二理想电压进行比较来确定（320）误差向量，用于所需数量的比较（N）。第一理想电压对应于第一采样电压，第二理想电压对应于第二采样电压，并且I和Q阵列是从比特流到复合波形的转换得出的。

3. 发明授权

US08527231B2 High throughput semiconductor device testing 有权
标题翻译：高通量半导体器件测试
公开(公告)号：US08527231B2
公开(公告)日：2013-09-03
申请号：US12882695
申请日：2010-09-15
申请人： Lawrence B. Luce
发明人： Lawrence B. Luce
IPC分类号： G01R29/00 , G06F11/26 , G06F17/40 , G06F19/00
CPC分类号： G01R31/316 , G01R31/2839
摘要： A test system that provides an output signal for analysis without requiring the test hardware to be idle during a settling interval. The test system includes a preprocessor that identifies the near-DC drift that occurs in the output signal and then adjusts the output signal to remove the near-DC drift. A set of values representing the near-DC drift at each of multiple times during the acquisition of a signal for analysis may be computed and used to model a settling profile of the signal by fitting a curve to the set of values. The model of the settling profile may then be subtracted from samples representing the output signal to provide an adjusted signal for further analysis.
摘要翻译：提供输出信号进行分析的测试系统，而不需要测试硬件在稳定间隔期间空闲。测试系统包括一个预处理器，用于识别在输出信号中发生的近DC漂移，然后调整输出信号以去除近DC漂移。可以计算表示在用于分析的信号获取期间的多次中的近DC漂移的一组值，并且用于通过将曲线拟合到该组值来建模信号的建立分布。然后可以从表示输出信号的样本中减去沉降曲线的模型，以提供调整后的信号用于进一步分析。

4. 发明授权

US07724842B2 System and method for EVM self-test 有权
标题翻译： EVM自检系统和方法
公开(公告)号：US07724842B2
公开(公告)日：2010-05-25
申请号：US11476966
申请日：2006-06-27
申请人： Lawrence B. Luce
发明人： Lawrence B. Luce
IPC分类号： H03D3/00
CPC分类号： H04L27/38 , H04L27/0014 , H04L2027/0024
摘要： A system and method for EVM self-testing a communication device is provided including receiving (305) a complex waveform, sampling (310) first and second sample voltages from the complex waveform, selecting (315) first and second ideal voltages from I- and Q-arrays, and determining (320) an error vector by comparing the first and second sample voltages with the first and second ideal voltages for a desired number of comparisons (N). The first ideal voltage corresponds with the first sample voltage, the second ideal voltage corresponds with the second sample voltage, and the I- and Q-arrays are derived from a conversion of a bitstream to the complex waveform.
摘要翻译：提供了一种用于EVM自测试的通信设备的系统和方法，包括：从复合波形中接收（305）复杂波形，采样（310）第一和第二采样电压，从I和...中选择（315）第一和第二理想电压; 并且通过将所述第一和第二采样电压与所述第一和第二理想电压进行比较来确定（320）误差向量，用于所需数量的比较（N）。第一理想电压对应于第一采样电压，第二理想电压对应于第二采样电压，并且I和Q阵列是从比特流到复合波形的转换得出的。

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