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1. 发明授权

US08023974B1 Lightweight SVM-based content filtering system for mobile phones 有权
标题翻译：用于手机的基于SVM的轻量级内容过滤系统
公开(公告)号：US08023974B1
公开(公告)日：2011-09-20
申请号：US11706539
申请日：2007-02-15
申请人： Lili Diao , Vincent Chan , Patrick MG Lu
发明人： Lili Diao , Vincent Chan , Patrick MG Lu
IPC分类号： H04W4/00
CPC分类号： G06K9/6269 , H04L51/12 , H04W12/12
摘要： In one embodiment, a content filtering system generates a support vector machine (SVM) learning model in a server computer and provides the SVM learning model to a mobile phone for use in classifying text messages. The SVM learning model may be generated in the server computer by training a support vector machine with sample text messages that include spam and legitimate text messages. A resulting intermediate SVM learning model from the support vector machine may include a threshold value, support vectors and alpha values. The SVM learning model in the mobile phone may include the threshold value, the features, and the weights of the features. An incoming text message may be parsed for the features. The weights of features found in the incoming text message may be added and compared to the threshold value to determine whether or not the incoming text message is spam.
摘要翻译：在一个实施例中，内容过滤系统在服务器计算机中生成支持向量机（SVM）学习模型，并将SVM学习模型提供给移动电话以用于分类文本消息。 SVM学习模型可以在服务器计算机中通过训练具有包括垃圾邮件和合法文本消息的示例文本消息的支持向量机来生成。来自支持向量机的得到的中间SVM学习模型可以包括阈值，支持向量和α值。移动电话中的SVM学习模型可以包括阈值，特征和特征的权重。可能会为特征解析输入的文本消息。可以添加传入文本消息中发现的功能的权重并将其与阈值进行比较，以确定传入的文本消息是否为垃圾邮件。

2. 发明授权

US08935788B1 Two stage virus detection 有权
标题翻译：两级病毒检测
公开(公告)号：US08935788B1
公开(公告)日：2015-01-13
申请号：US12252205
申请日：2008-10-15
申请人： Lili Diao , Vincent Chan , Patrick Mg Lu
发明人： Lili Diao , Vincent Chan , Patrick Mg Lu
IPC分类号： G06F11/30 , G06F21/56
CPC分类号： G06F21/564 , G06F21/561
摘要： A two stage virus detection system detects viruses in target files. In the first stage, a training application receives a master virus pattern file recording all known virus patterns and generates a features list containing fundamental virus signatures from the virus patterns, a novelty detection model, a classification model, and a set of segmented virus pattern files. In the second stage, a detection application scans a target file for viruses using the generated outputs from the first stage rather than using the master virus pattern file directly to do traditional pattern matching. The results of the scan can vary in detail depending on a fuzzy scan level. For fuzzy scan level “1,” the existence of a virus is returned. For fuzzy scan level “2,” the grant virus type found is returned. For fuzzy scan level “3,” the exact virus name is returned. This invention provides a solution for the problems caused by traditional virus detection solution: slow scanning speed, big pattern file, big burden on computation resource (CPU, RAM etc.), as well as heavy pattern updating traffic via networks.
摘要翻译：两级病毒检测系统检测目标文件中的病毒。在第一阶段，训练应用程序接收记录所有已知病毒模式的主病毒模式文件，并生成包含病毒模式的基本病毒签名的功能列表，新颖性检测模型，分类模型和一组分段病毒模式文件。在第二阶段，检测应用程序使用来自第一阶段的生成输出来扫描目标文件以获取病毒，而不是直接使用主病毒码文件来进行传统的模式匹配。根据模糊扫描级别，扫描结果可能会有详细的变化。对于模糊扫描级别“1”，返回病毒的存在。对于模糊扫描级别“2”，返回发现的授权病毒类型。对于模糊扫描级别“3”，返回确切的病毒名称。本发明为传统病毒检测解决方案提供了一个解决方案：扫描速度慢，格式文件大，计算资源负担大（CPU，RAM等），以及通过网络大量更新流量。

3. 发明授权

US07756535B1 Lightweight content filtering system for mobile phones 有权
标题翻译：轻便的手机内容过滤系统
公开(公告)号：US07756535B1
公开(公告)日：2010-07-13
申请号：US11483073
申请日：2006-07-07
申请人： Lili Diao , Jackie Cao , Vincent Chan
发明人： Lili Diao , Jackie Cao , Vincent Chan
IPC分类号： H04W4/00 , G06F15/16 , H04L12/58
CPC分类号： H04L51/12 , H04L51/38 , H04W4/12
摘要： In one embodiment, a content filtering system includes a feature list and a learning model. The feature list may be a subset of a dictionary that was used to train the content filtering system to identify classification (e.g., spam, phishing, porn, legitimate text messages, etc.) of text messages during a training stage. The learning model may include representative vectors, each of which represents a particular class of text messages. The learning model and the feature list may be generated in a server computer during the training stage and then subsequently provided to the mobile phone. An incoming text message in the mobile phone may be parsed for occurrences of feature words included in the feature list and then converted to an input vector. The input vector may be compared to the learning model to determine the classification of the incoming text message.
摘要翻译：在一个实施例中，内容过滤系统包括特征列表和学习模型。特征列表可以是用于训练内容过滤系统以在训练阶段期间识别文本消息的分类（例如，垃圾邮件，网络钓鱼，色情，合法文本消息等）的字典的子集。学习模型可以包括代表性的向量，每个代表一个特定类别的文本消息。学习模型和特征列表可以在训练阶段在服务器计算机中产生，然后随后提供给移动电话。移动电话中的传入文本消息可以被解析为特征列表中包括的特征词的出现，然后转换成输入向量。输入向量可以与学习模型进行比较，以确定输入文本消息的分类。

4. 发明授权

US07799608B2 Die stacking apparatus and method 有权
标题翻译：模具堆垛装置及方法
公开(公告)号：US07799608B2
公开(公告)日：2010-09-21
申请号：US11832519
申请日：2007-08-01
申请人： Vincent Chan , Neil McLellan , Kevin O'Neil
发明人： Vincent Chan , Neil McLellan , Kevin O'Neil
IPC分类号： H01L21/44
CPC分类号： H01L24/11 , H01L25/0652 , H01L25/0657 , H01L25/18 , H01L2224/05001 , H01L2224/05022 , H01L2224/05026 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05169 , H01L2224/05571 , H01L2224/05639 , H01L2224/05644 , H01L2224/05655 , H01L2224/05669 , H01L2224/1132 , H01L2224/11334 , H01L2224/1147 , H01L2224/13099 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13169 , H01L2224/16145 , H01L2224/73253 , H01L2225/06513 , H01L2924/01006 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/1532 , H01L2924/30107 , H01L2924/00014
摘要： Various stacked semiconductor devices and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes providing a first semiconductor die that has a first bulk semiconductor side and a first opposite side. A second semiconductor die is provided that has a second bulk semiconductor side and a second opposite side. The second opposite side of the second semiconductor die is coupled to the first opposite side of the first semiconductor die. Electrical connections are formed between the first semiconductor die and the second semiconductor die.
摘要翻译：提供各种叠层半导体器件及其制造方法。一方面，提供一种制造方法，其包括提供具有第一体半导体侧和第一相对侧的第一半导体管芯。提供了具有第二体半导体侧和第二相对侧的第二半导体管芯。第二半导体管芯的第二相对侧耦合到第一半导体管芯的第一相对侧。在第一半导体管芯和第二半导体管芯之间形成电连接。

5. 发明申请

US20090278264A1 Semiconductor Chip Bump Connection Apparatus and Method 有权
标题翻译：半导体芯片凸块连接装置及方法
公开(公告)号：US20090278264A1
公开(公告)日：2009-11-12
申请号：US12119174
申请日：2008-05-12
申请人： Roden R. Topacio , Vincent Chan , Fan Yeung
发明人： Roden R. Topacio , Vincent Chan , Fan Yeung
IPC分类号： H01L23/498 , H01L21/60
CPC分类号： H05K3/3452 , H01L23/49811 , H01L23/49816 , H01L23/50 , H01L24/16 , H01L24/81 , H01L2224/05571 , H01L2224/05573 , H01L2224/05639 , H01L2224/05644 , H01L2224/05664 , H01L2224/05669 , H01L2224/13099 , H01L2224/13111 , H01L2224/16237 , H01L2224/81136 , H01L2224/81801 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19105 , H05K2201/0989 , H05K2201/10674 , H01L2924/00014
摘要： Various semiconductor chip packages and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a solder bump to a side of a semiconductor chip and bringing the solder bump into contact with a conductor pad coupled to a substrate and positioned in an opening of a solder mask on the substrate. The conductor pad has a first lateral dimension and the opening has a second lateral dimension that is larger than the first lateral dimension. A metallurgical bond is established between the solder bump and the conductor pad.
摘要翻译：公开了各种半导体芯片封装及其制造方法。在一个方面，提供了一种制造方法，其包括将焊料凸点耦合到半导体芯片的一侧，并使焊料凸块与耦合到基板的导体焊盘接触并定位在衬底上的焊料掩模的开口中。导体垫具有第一横向尺寸，并且开口具有大于第一横向尺寸的第二横向尺寸。在焊料凸块和导体焊盘之间建立冶金结合。

6. 发明授权

US06929976B2 Multi-die module and method thereof 有权
标题翻译：多模模块及其方法
公开(公告)号：US06929976B2
公开(公告)日：2005-08-16
申请号：US10616342
申请日：2003-07-09
申请人： Vincent Chan , Samuel Ho
发明人： Vincent Chan , Samuel Ho
IPC分类号： H01L25/065 , H01L25/10 , H01L25/18 , H05K1/14 , H05K1/18 , H05K3/34 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H05K1/141 , H01L24/73 , H01L25/03 , H01L25/0655 , H01L25/18 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/92125 , H01L2224/92247 , H01L2225/1005 , H01L2924/01067 , H01L2924/01079 , H01L2924/15311 , H05K1/181 , H05K3/3436 , H05K2201/10734 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： A multi-die module is electrically connected to both an unpackaged die and a packaged die as disclosed herein. The multi-die module has a footprint that is the same as conventional multi-die packages, which do not include packaged die, thereby allowing the multi-die module to be interchangeable with conventional multi-die packages. In one embodiment, the unpackaged die is a graphics processor, and the packaged die is a standard memory that has been burned in, functionally tested, and speed rated.
摘要翻译：如本文所公开的，多管芯模块电连接到未封装的管芯和封装的管芯。多模模块具有与不包括封装模具的常规多管芯封装相同的覆盖区，从而允许多模模块可与常规多管芯封装互换。在一个实施例中，未封装的裸片是图形处理器，并且封装的裸片是已被烧录，功能测试和速度评估的标准存储器。

7. 发明授权

US07670939B2 Semiconductor chip bump connection apparatus and method 有权
标题翻译：半导体芯片凸块连接装置及方法
公开(公告)号：US07670939B2
公开(公告)日：2010-03-02
申请号：US12119174
申请日：2008-05-12
申请人： Roden R. Topacio , Vincent Chan , Fan Yeung
发明人： Roden R. Topacio , Vincent Chan , Fan Yeung
IPC分类号： H01L21/44
CPC分类号： H05K3/3452 , H01L23/49811 , H01L23/49816 , H01L23/50 , H01L24/16 , H01L24/81 , H01L2224/05571 , H01L2224/05573 , H01L2224/05639 , H01L2224/05644 , H01L2224/05664 , H01L2224/05669 , H01L2224/13099 , H01L2224/13111 , H01L2224/16237 , H01L2224/81136 , H01L2224/81801 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19105 , H05K2201/0989 , H05K2201/10674 , H01L2924/00014
摘要： Various semiconductor chip packages and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a solder bump to a side of a semiconductor chip and bringing the solder bump into contact with a conductor pad coupled to a substrate and positioned in an opening of a solder mask on the substrate. The conductor pad has a first lateral dimension and the opening has a second lateral dimension that is larger than the first lateral dimension. A metallurgical bond is established between the solder bump and the conductor pad.
摘要翻译：公开了各种半导体芯片封装及其制造方法。在一个方面，提供了一种制造方法，其包括将焊料凸点耦合到半导体芯片的一侧，并使焊料凸块与耦合到基板的导体焊盘接触并定位在衬底上的焊料掩模的开口中。导体垫具有第一横向尺寸，并且开口具有大于第一横向尺寸的第二横向尺寸。在焊料凸块和导体焊盘之间建立冶金结合。

8. 发明授权

US3933235A Type indicator 失效
标题翻译：类型指示器
公开(公告)号：US3933235A
公开(公告)日：1976-01-20
申请号：US414916
申请日：1973-11-12
申请人： Vincent Chan
发明人： Vincent Chan
IPC分类号： B41J5/04 , B41J29/42
CPC分类号： B41J5/04
摘要： A type character visual indicator for an interlingual typewriter for multiple languages typing and having a chassis provided with a window, a drum having type characters is mounted for rotating and sliding to a position to align a selected type character with a striker; the indicator includes an endless band having type characters thereon arranged in reverse direction to the type characters on the drum, to a pointer movable with the drum for indicating a particular type character in a particular row corresponding to the selected type character.
摘要翻译：一种用于多种语言打字的舌型打字机的类型字符视觉指示器，并且具有设置有窗口的底盘，安装有具有类型字符的滚筒，用于旋转和滑动到将所选择的类型角色与撞击器对准的位置; 指示器包括其上具有与滚筒上的类型字符相反方向的类型字符的环形带，可移动到与滚筒相关联的指针，用于指示与所选择的类型字符相对应的特定行中的特定类型字符。

9. 发明授权

US08378471B2 Semiconductor chip bump connection apparatus and method 有权
标题翻译：半导体芯片凸块连接装置及方法
公开(公告)号：US08378471B2
公开(公告)日：2013-02-19
申请号：US12692239
申请日：2010-01-22
申请人： Roden R. Topacio , Vincent Chan , Fan Yeung
发明人： Roden R. Topacio , Vincent Chan , Fan Yeung
IPC分类号： H01L23/02
CPC分类号： H05K3/3452 , H01L23/49811 , H01L23/49816 , H01L23/50 , H01L24/16 , H01L24/81 , H01L2224/05571 , H01L2224/05573 , H01L2224/05639 , H01L2224/05644 , H01L2224/05664 , H01L2224/05669 , H01L2224/13099 , H01L2224/13111 , H01L2224/16237 , H01L2224/81136 , H01L2224/81801 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19105 , H05K2201/0989 , H05K2201/10674 , H01L2924/00014
摘要： Various semiconductor chip packages and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a solder bump to a side of a semiconductor chip and bringing the solder bump into contact with a conductor pad coupled to a substrate and positioned in an opening of a solder mask on the substrate. The conductor pad has a first lateral dimension and the opening has a second lateral dimension that is larger than the first lateral dimension. A metallurgical bond is established between the solder bump and the conductor pad.
摘要翻译：公开了各种半导体芯片封装及其制造方法。在一个方面，提供了一种制造方法，其包括将焊料凸点耦合到半导体芯片的一侧，并使焊料凸块与耦合到基板的导体焊盘接触并定位在衬底上的焊料掩模的开口中。导体垫具有第一横向尺寸，并且开口具有大于第一横向尺寸的第二横向尺寸。在焊料凸块和导体焊盘之间建立冶金结合。

10. 发明申请

US20080245555A1 CIRCUIT SUBSTRATE WITH PLATED THROUGH HOLE STRUCTURE AND METHOD 审中-公开
标题翻译：具有通孔结构和方法的电路基板
公开(公告)号：US20080245555A1
公开(公告)日：2008-10-09
申请号：US11696285
申请日：2007-04-04
申请人： Yue Li , Vincent Chan , Neil Mclellan , Liane Martinez
发明人： Yue Li , Vincent Chan , Neil Mclellan , Liane Martinez
IPC分类号： H05K1/11 , H01R12/04
CPC分类号： H05K1/115 , H05K1/0222 , H05K3/429 , H05K3/4644 , H05K2201/0959 , H05K2201/09809
摘要： A circuit substrate includes an outer plated through hole structure and an inner plated through hole structure located within the outer plated through hole structure. In one example, the circuit substrate includes a core and an outer plated through hole structure having a first metal layer configured over the core to form an outer plated through hole. The circuit substrate also includes an inner plated through hole structure located within the outer plated through hole structure having a second metal layer positioned inside of the outer plated through hole with an insulation layer interposed between the first and second metal layers. Methods for making such a circuit substrate are also described.
摘要翻译：电路基板包括位于外部电镀通孔结构内的外部电镀通孔结构和内部电镀通孔结构。在一个示例中，电路基板包括芯和外部电镀通孔结构，其具有配置在芯上的第一金属层以形成外部电镀通孔。电路基板还包括位于外部电镀通孔结构内的内部电镀通孔结构，其具有位于外部电镀通孔内部的第二金属层，绝缘层插入在第一和第二金属层之间。还描述了制造这种电路基板的方法。

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