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    • 1. 发明授权
    • Vertical-channel junction field-effect transistors having buried gates and methods of making
    • 具有掩埋栅极的垂直沟道结场效应晶体管及其制造方法
    • US07638379B2
    • 2009-12-29
    • US11935442
    • 2007-11-06
    • Lin ChengMichael S. Mazzola
    • Lin ChengMichael S. Mazzola
    • H01L21/337
    • H01L29/8083H01L29/0619H01L29/1066H01L29/1608H01L29/66909
    • Semiconductor devices and methods of making the devices are described. The devices can be implemented in SiC and can include epitaxially grown n-type drift and p-type trenched gate regions, and an n-type epitaxially regrown channel region on top of the trenched p-gate regions. A source region can be epitaxially regrown on top of the channel region or selectively implanted into the channel region. Ohmic contacts to the source, gate and drain regions can then be formed. The devices can include edge termination structures such as guard rings, junction termination extensions (JTE), or other suitable p-n blocking structures. The devices can be fabricated with different threshold voltages, and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used as discrete power transistors and in digital, analog, and monolithic microwave integrated circuits.
    • 对半导体装置及其制造方法进行说明。 器件可以在SiC中实现,并且可以包括外延生长的n型漂移和p型沟槽栅极区域,以及在沟槽p型栅极区域顶部的n型外延再生长沟道区域。 源极区域可以在沟道区域的顶部外延再生长或选择性地植入沟道区域。 然后可以形成到源极,栅极和漏极区域的欧姆接触。 这些装置可以包括边缘终端结构,例如保护环,连接终止扩展(JTE)或其他合适的p-n阻塞结构。 这些器件可以用不同的阈值电压制造,并且可以针对相同沟道掺杂的耗尽和增强的工作模式来实现。 这些器件可用作分立功率晶体管和数字,模拟和单片微波集成电路。
    • 2. 发明申请
    • VERTICAL-CHANNEL JUNCTION FIELD-EFFECT TRANSISTORS HAVING BURIED GATES AND METHODS OF MAKING
    • 带通孔的垂直通道连接场效应晶体管及其制作方法
    • US20080124853A1
    • 2008-05-29
    • US11935442
    • 2007-11-06
    • Lin ChengMichael S. Mazzola
    • Lin ChengMichael S. Mazzola
    • H01L21/337
    • H01L29/8083H01L29/0619H01L29/1066H01L29/1608H01L29/66909
    • Semiconductor devices and methods of making the devices are described. The devices can be implemented in SiC and can include epitaxially grown n-type drift and p-type trenched gate regions, and an n-type epitaxially regrown channel region on top of the trenched p-gate regions. A source region can be epitaxially regrown on top of the channel region or selectively implanted into the channel region. Ohmic contacts to the source, gate and drain regions can then be formed. The devices can include edge termination structures such as guard rings, junction termination extensions (JTE), or other suitable p-n blocking structures. The devices can be fabricated with different threshold voltages, and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used as discrete power transistors and in digital, analog, and monolithic microwave integrated circuits.
    • 对半导体装置及其制造方法进行说明。 器件可以在SiC中实现,并且可以包括外延生长的n型漂移和p型沟槽栅极区域,以及在沟槽p型栅极区域顶部的n型外延再生长沟道区域。 源极区域可以在沟道区域的顶部外延再生长或选择性地植入沟道区域。 然后可以形成到源极,栅极和漏极区域的欧姆接触。 这些装置可以包括边缘终端结构,例如保护环,连接终止扩展(JTE)或其他合适的p-n阻塞结构。 这些器件可以用不同的阈值电压制造,并且可以针对相同沟道掺杂的耗尽和增强的工作模式来实现。 这些器件可用作分立功率晶体管和数字,模拟和单片微波集成电路。
    • 3. 发明授权
    • Junction barrier schottky rectifiers having epitaxially grown P+-N methods of making
    • 具有外延生长P + -N制备方法的结型势垒肖特基整流器
    • US08384182B2
    • 2013-02-26
    • US12146580
    • 2008-06-26
    • Michael S. MazzolaLin Cheng
    • Michael S. MazzolaLin Cheng
    • H01L27/095
    • H01L29/872H01L29/0615H01L29/0619H01L29/0623H01L29/0661H01L29/1608H01L29/8611
    • A junction barrier Schottky (JBS) rectifier device and a method of making the device are described. The device comprises an epitaxially grown first n-type drift layer and p-type regions forming p+-n junctions and self-planarizing epitaxially over-grown second n-type drift regions between and, optionally, on top of the p-type regions. The device may include an edge termination structure such as an exposed or buried P+ guard ring, a regrown or implanted junction termination extension (JTE) region, or a “deep” mesa etched down to the substrate. The Schottky contact to the second n-type drift region and the ohmic contact to the p-type region together serve as an anode. The cathode can be formed by ohmic contact to the n-type region on the backside of the wafer. The devices can be used in monolithic digital, analog, and microwave integrated circuits.
    • 描述了结屏障肖特基(JBS)整流器件及制造器件的方法。 该器件包括外延生长的第一n型漂移层和形成p + -n结的p型区域和在p型区域之间和/或任选地在p型区域的顶部上的自平面化外延生长的第二n型漂移区域。 该装置可以包括边缘终端结构,例如暴露或掩埋的P +保护环,再生长或注入的连接终止延伸(JTE)区域,或向底部蚀刻的深台面。 与第二n型漂移区的肖特基接触和与p型区的欧姆接触一起用作阳极。 阴极可以通过欧姆接触形成在晶片背面的n型区域上。 该器件可用于单片数字,模拟和微波集成电路。
    • 8. 发明授权
    • Silicon carbide: germanium (SiC:Ge) heterojunction bipolar transistor; a new semiconductor transistor for high-speed, high-power applications
    • 碳化硅:锗(SiC:Ge)异质结双极晶体管; 一种用于高速,大功率应用的新型半导体晶体管
    • US06410396B1
    • 2002-06-25
    • US09825065
    • 2001-04-04
    • Jeffrey B. CasadyMichael S. MazzolaStephen E. Saddow
    • Jeffrey B. CasadyMichael S. MazzolaStephen E. Saddow
    • H01L21331
    • H01L29/7378H01L29/1608Y10S438/931
    • Devices and methods for fabricating wholly silicon carbide heterojunction bipolar transistors (HBTs) using germanium base doping to produce suitable emitter/base heterojunctions. In one variation, all device layers are are grown epitaxially and the heterojunction is created by introducing a pseudoalloying material, such as germanium, to form a graded implant. In other variations, the device epitaxial layers are 1) grown directly onto a semi-insulating substrate, 2) the semi-insulating epitaxial layer is grown onto a conducting substrate; 3) the subcollector is grown on a lightly doped p-type epitaxial layer grown on a conducting substrate; and 4) the subcollector is grown directly on a conducting substrate. Another variation comprises a multi-finger HBT with bridging conductor connections among emitter fingers. Yet another variation includes growth of layers using dopants other than nitrogent or aluminum. Yet another variation includes implantation of region within one or more epitaxial layers, rather than use of separate epitaxial layers.
    • 使用锗基掺杂制造完全碳化硅异质结双极晶体管(HBT)以产生合适的发射极/基极异质结的装置和方法。 在一个变型中,外延生长所有器件层,并且通过引入诸如锗的假合金化材料来形成异质结,以形成渐变植入物。 在其他变型中,器件外延层1)直接生长到半绝缘衬底上,2)半导体绝缘外延层生长在导电衬底上; 3)子集电极在生长在导电衬底上的轻掺杂p型外延层上生长; 和4)子集电极直接在导电衬底上生长。 另一变型包括在发射器指状物之间具有桥接导体连接的多指HBT。 另一种变化包括使用除了nit或铝之外的掺杂剂的层的生长。 又一变型包括在一个或多个外延层内注入区域,而不是使用单独的外延层。