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1. 发明授权

US08610681B2 Information processing apparatus and information processing method 失效
标题翻译：信息处理装置和信息处理方法
公开(公告)号：US08610681B2
公开(公告)日：2013-12-17
申请号：US13021455
申请日：2011-02-04
申请人： Masanori Yoshimoto , Hideaki Imai , Junichi Kosaka , Yoshihiro Mashiko , Hironobu Aoki
发明人： Masanori Yoshimoto , Hideaki Imai , Junichi Kosaka , Yoshihiro Mashiko , Hironobu Aoki
IPC分类号： G06F3/041
CPC分类号： G06F3/041 , G06F3/04883 , G06F3/04886 , G06F2203/04101 , G06F2203/04104
摘要： An information processing apparatus including a display device; pointed position detecting means for detecting a specified position by a touch operation of a pointing device on a screen of the display device; sensor means for detecting a position of the pointing device when the pointing device is not in contact with the screen of the display device; and control means for recognizing the touch operation detected by the pointed position detecting means and controlling the information processing apparatus in accordance with the recognized touch operation and the position of the pointing device detected by the sensor means.
摘要翻译：一种信息处理装置，包括显示装置; 指示位置检测装置，用于通过显示装置的屏幕上的指示装置的触摸操作来检测指定位置; 传感器装置，用于在指示装置未与显示装置的屏幕接触时检测指示装置的位置; 以及控制装置，用于识别由指示位置检测装置检测到的触摸操作，并根据识别的触摸操作和由传感器装置检测的指示装置的位置来控制信息处理装置。

2. 发明授权

US5728601A Process for manufacturing a single in-line package for surface mounting 失效
标题翻译：用于制造用于表面安装的单个在线封装的工艺
公开(公告)号：US5728601A
公开(公告)日：1998-03-17
申请号：US441595
申请日：1995-05-15
申请人： Mitsutaka Sato , Masanori Yoshimoto
发明人： Mitsutaka Sato , Masanori Yoshimoto
IPC分类号： H01L23/28 , H01L23/31 , H01L23/495 , H01L23/50 , H01L25/10 , H05K1/18 , H05K3/30 , H01L21/56 , H01L21/58 , H01L21/60
CPC分类号： H01L23/3107 , H01L23/49555 , H01L25/105 , H05K3/301 , H01L2224/05554 , H01L2224/45144 , H01L2224/48247 , H01L2224/49175 , H01L2225/1029 , H01L2225/107 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2924/00014 , H01L2924/01079 , H05K1/181 , H05K2201/10454 , H05K2201/10606 , H05K2201/10696
摘要： A process for manufacturing semiconductor package of a single in-line type including a semiconductor chip, a package body for accommodating the semiconductor chip and a plurality of leads held by the package body to extend substantially perpendicularly to a bottom edge surface of the package body. The package body carries a cutout part at a predetermined position of a side edge that surrounds the package body such that the cutout part is adapted for engagement with a support leg for supporting the package body substantially upright on a substrate.
摘要翻译：一种用于制造包括半导体芯片，用于容纳半导体芯片的封装主体和由封装体保持的多个引线的单个直列式的半导体封装的工艺，其基本上垂直于封装体的底部边缘表面延伸。包装体在围绕包装主体的侧边缘的预定位置处携带切口部分，使得切口部分适于与用于将包装体基本上直立支撑在基板上的支撑腿接合。

3. 发明授权

US5659200A Semiconductor device having radiator structure 失效
标题翻译：具有散热器结构的半导体器件
公开(公告)号：US5659200A
公开(公告)日：1997-08-19
申请号：US421448
申请日：1995-04-13
申请人： Michio Sono , Kouji Saito , Masashi Takenaka , Masanori Yoshimoto
发明人： Michio Sono , Kouji Saito , Masashi Takenaka , Masanori Yoshimoto
IPC分类号： H01L21/56 , H01L23/28 , H01L23/29 , H01L23/433 , H01L33/48 , H01L33/64 , H05K1/02 , H05K3/30 , H01L23/34
CPC分类号： H01L21/565 , H01L23/4334 , H05K1/0206 , H01L2224/32188 , H01L2224/48091 , H01L2224/48247 , H01L24/48 , H01L2924/00014 , H01L2924/181 , H01L33/486 , H01L33/642 , H05K2201/0209 , H05K2201/0376 , H05K2201/10689 , H05K2201/10969 , H05K3/303 , H05K3/305 , Y10T29/49121
摘要： A method of producing a semiconductor device includes the steps of fitting a bottom part of a radiator block within a tapered hole which is provided at a bottom of a recess of a jig and positioning on the jig a lead frame having inner and outer leads and wherein the lead frame has an opening at a central part thereof, the opening being located above a top surface of the radiator block. The semiconductor chip is then mounted on the top surface part of the radiator block and bonded to the lead frame by plurality of wires. The radiator block is then positioned on a lower die and an upper die is positioned on top of the lower die and a resin is injected into a cavity formed by the two dies so as to mold the resin and form a package which encapsulates at least a part of the radiator block, the semiconductor chip, the wires and inner leads of the lead frame so that the outer leads of the lead frame extend outwardly of the package and the bottom part of the radiator block projects from the package by a predetermined length to conduct heat generated from the semiconductor chip outside the package. The jig then is removed from the package.
摘要翻译：一种制造半导体器件的方法包括以下步骤：将散热器块的底部装配在锥形孔内，该锥形孔设置在夹具的凹部的底部并且在夹具上定位具有内引线和外引线的引线框架，并且其中引线框架在其中心部分具有开口，该开口位于散热器块的顶表面之上。然后将半导体芯片安装在散热器块的顶表面部分上，并通过多条导线结合到引线框架。然后将散热器块定位在下模上，并且上模定位在下模的顶部上，并且将树脂注入由两个模具形成的空腔中，以模制树脂，并形成封装，该封装至少封装散热器块的一部分，半导体芯片，引线框架的导线和内部引线，使得引线框架的外部引线延伸到封装的外部，并且散热器块的底部从封装突出预定长度到将封装外的半导体芯片产生的热量传导出去。然后将夹具从包装中取出。

4. 发明授权

US5409866A Process for manufacturing a semiconductor device affixed to an upper and a lower leadframe 失效
标题翻译：用于制造固定到上引线框架和下引线框架的半导体器件的工艺
公开(公告)号：US5409866A
公开(公告)日：1995-04-25
申请号：US996589
申请日：1992-12-24
申请人： Mitsutaka Sato , Junichi Kasai , Masanori Yoshimoto , Kouichi Takeshita
发明人： Mitsutaka Sato , Junichi Kasai , Masanori Yoshimoto , Kouichi Takeshita
IPC分类号： H01L21/48 , H01L21/56 , H01L23/495 , H01L21/58 , H01L21/603
CPC分类号： H01L24/83 , H01L21/4842 , H01L21/565 , H01L23/49503 , H01L23/4951 , H01L23/49544 , H01L23/49551 , H01L2224/32014 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/48465 , H01L2224/73215 , H01L2224/73265 , H01L2224/78301 , H01L2224/83192 , H01L2224/8385 , H01L2224/85181 , H01L2224/92147 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01057 , H01L2924/01082 , H01L2924/07802 , H01L2924/12042 , H01L2924/181
摘要： A process for manufacturing semiconductor device including a semiconductor chip having top and bottom surfaces, upper leads electrically coupled to the semiconductor chip, where a first gap is formed between the upper leads and the top surface of the semiconductor chip, lower leads electrically coupled to the semiconductor chip, where a second gap is formed between the lower leads and the bottom surface of the semiconductor chip, and an encapsulating resin which encapsulates the semiconductor chip so as to maintain the first and second gaps.
摘要翻译：一种制造半导体器件的方法，该半导体器件包括具有顶表面和底表面的半导体芯片，电连接到半导体芯片的上引线，其中在上引线和半导体芯片的顶表面之间形成第一间隙，半导体芯片，其中在下引线和半导体芯片的底表面之间形成第二间隙，以及封装树脂，其封装半导体芯片以保持第一和第二间隙。

5. 发明授权

US5920117A Semiconductor device and method of forming the device 失效
标题翻译：半导体装置及其形成方法
公开(公告)号：US5920117A
公开(公告)日：1999-07-06
申请号：US819806
申请日：1997-03-18
申请人： Michio Sono , Masashi Takenaka , Masanori Yoshimoto , Tsuyoshi Aoki , Ichiro Yamaguchi , Koki Otake
发明人： Michio Sono , Masashi Takenaka , Masanori Yoshimoto , Tsuyoshi Aoki , Ichiro Yamaguchi , Koki Otake
IPC分类号： H01L23/28 , H01L23/12 , H01L23/13 , H01L23/31 , H01L23/433 , H01L23/495
CPC分类号： H01L23/13 , H01L23/3128 , H01L23/4334 , H01L2224/05553 , H01L2224/05554 , H01L2224/0603 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/49175 , H01L24/48 , H01L24/49 , H01L2924/00014 , H01L2924/01078 , H01L2924/15311 , H01L2924/181 , H01L2924/30107
摘要： A semiconductor device includes a board having a lower surface, a container part created in the board, external-connection nodes provided on the lower surface of the board, a supporting member provided inside the container part and secured by the board, a semiconductor chip secured on the supporting member and electrically connected with the external-connection nodes, and a sealing resin fully filling the container part so as to completely cover the semiconductor chip.
摘要翻译：一种半导体器件，包括具有下表面的板，在板上形成的容器部分，设置在板的下表面上的外部连接节点，设置在容器部分内部并由板固定的支撑构件，半导体芯片固定在支撑构件上并与外部连接节点电连接，并且密封树脂完全填充容器部分以完全覆盖半导体芯片。

6. 发明授权

US5831332A Semiconductor package for surface mounting 失效
公开(公告)号：US5831332A
公开(公告)日：1998-11-03
申请号：US739218
申请日：1996-10-29
申请人： Michio Sono , Junichi Kasai , Masanori Yoshimoto , Kazuto Tsuji , Kouji Saito
发明人： Michio Sono , Junichi Kasai , Masanori Yoshimoto , Kazuto Tsuji , Kouji Saito
IPC分类号： H01L23/482 , H01L23/495 , H01L23/58 , H05K3/30 , H05K3/34
CPC分类号： H05K3/303 , H01L23/49555 , H01L2224/05554 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48472 , H01L24/45 , H01L24/48 , H01L2924/01079 , H05K2201/09709 , H05K2201/09781 , H05K2201/10454 , H05K2201/10522 , H05K2201/10568 , H05K2201/10659 , H05K2201/10696 , H05K3/3426 , Y02P70/613
摘要： A semiconductor device having a package of a single in-line type includes a semiconductor chip, a package body that accommodates the semiconductor chip therein and defined by a pair of opposing major surfaces and a plurality of interconnection leads held by the package body to extend substantially perpendicularly to a bottom surface. Each of the interconnection leads consists of an inner lead part located inside the package body and an outer lead part located outside the package body, the outer lead part being bent laterally at a boundary between the inner part and the outer part, in one of first and second directions that are opposite from each other and substantially perpendicular to the opposing major surfaces of the package body. A plurality of support legs extend laterally at the bottom surface of the package body for supporting the package body upright when the semiconductor device is placed on a substrate.

7. 发明授权

US5444025A Process for encapsulating a semiconductor package having a heat sink using a jig 失效
标题翻译：使用夹具封装具有散热器的半导体封装件的工艺
公开(公告)号：US5444025A
公开(公告)日：1995-08-22
申请号：US324494
申请日：1994-10-18
申请人： Michio Sono , Kouji Saito , Masashi Takenaka , Masanori Yoshimoto
发明人： Michio Sono , Kouji Saito , Masashi Takenaka , Masanori Yoshimoto
IPC分类号： H01L21/56 , H01L23/28 , H01L23/29 , H01L23/433 , H01L33/48 , H01L33/64 , H05K1/02 , H05K3/30 , H01L21/52 , H01L21/58 , H01L21/60
CPC分类号： H01L21/565 , H01L23/4334 , H05K1/0206 , H01L2224/32188 , H01L2224/48091 , H01L2224/48247 , H01L24/48 , H01L2924/00014 , H01L2924/181 , H01L33/486 , H01L33/642 , H05K2201/0209 , H05K2201/0376 , H05K2201/10689 , H05K2201/10969 , H05K3/303 , H05K3/305 , Y10T29/49121
摘要： A method of producing a semiconductor device includes the steps of fitting a bottom part of a radiator block within a tapered hole which is provided at a bottom of a recess of a jig and positioning on the jig a lead frame having inner and outer leads and wherein the lead frame has an opening at a central part thereof, the opening being located above a top surface of the radiator block. The semiconductor chip is then mounted on the top surface part of the radiator block and bonded to the lead frame by plurality of wires. The radiator block is then positioned on a lower die and an upper die is positioned on top of the lower die and a resin is injected into a cavity formed by the two dies so as to mold the resin and form a package which encapsulates at least a part of the radiator block, the semiconductor chip, the wires and inner leads of the lead frame so that the outer leads of the lead frame extend outwardly of the package and the bottom part of the radiator block projects from the package by a predetermined length to conduct heat generated from the semiconductor chip outside the package. The jig then is removed from the package.
摘要翻译：一种制造半导体器件的方法包括以下步骤：将散热器块的底部装配在锥形孔内，该锥形孔设置在夹具的凹部的底部并且在夹具上定位具有内引线和外引线的引线框架，并且其中引线框架在其中心部分具有开口，该开口位于散热器块的顶表面之上。然后将半导体芯片安装在散热器块的顶表面部分上，并通过多条导线结合到引线框架。然后将散热器块定位在下模上，并且上模定位在下模的顶部上，并且将树脂注入由两个模具形成的空腔中，以模制树脂，并形成封装，该封装至少封装散热器块的一部分，半导体芯片，引线框架的导线和内部引线，使得引线框架的外部引线延伸到封装的外部，并且散热器块的底部从封装突出预定长度到将封装外的半导体芯片产生的热量传导出去。然后将夹具从包装中取出。

8. 发明授权

US5293064A Lead frame and method of manufacturing a semiconductor device 失效
标题翻译：引线框架和制造半导体器件的方法
公开(公告)号：US5293064A
公开(公告)日：1994-03-08
申请号：US829221
申请日：1992-02-03
申请人： Masanori Yoshimoto , Kazuto Tsuji , Masao Sakuma , Kouichi Takeshita
发明人： Masanori Yoshimoto , Kazuto Tsuji , Masao Sakuma , Kouichi Takeshita
IPC分类号： H01L23/50 , H01L23/495
CPC分类号： H01L23/49572 , H01L23/49541 , H01L2924/0002
摘要： A lead frame for manufacturing a semiconductor device has at least one set of substantially parallel leads having inner ends for connection to a semiconductor chip, outer ends for external connection and central portions therebetween and an outer tiebar interconnecting the outer ends and having an elongated guide hole therein, the longer dimension of the guide hole being parallel to the leads. A lead bending die has a locating pin respectively corresponding to and received in sliding engagement in each guide hole. The die maintains a center portion of them lead frame in a first plane and, with each locating pin remaining in sliding engagement within the respective, elongated guide hole, bends the central portions of the leads thereby to dispose the respective outer ends of the leads in a second plane, displaced from the first plane. The outer tiebar and the sliding engagement of the locating pin in the guide hole serve to prevent undesirable deformation of the leads as a result of the bending operation. The central surface portion of the die further includes a recess for receiving at least a part of a package which seals a semiconductor chip therewithin. The lead frame may include plural sets of substantially parallel leads with corresponding outer tiebars and associated guide holes extending from respective, plural edges of the package.
摘要翻译：用于制造半导体器件的引线框架具有至少一组基本上平行的引线，其具有用于连接到半导体芯片的内端，用于外部连接的外端和中间部分，以及连接外端并具有细长导向孔其中，引导孔的较长尺寸平行于引线。引导弯曲模具具有分别对应于每个引导孔中滑动接合并被接受的定位销。模具将它们的引线框架的中心部分保持在第一平面中，并且每个定位销在相应的细长引导孔内保持滑动接合，使引线的中心部分弯曲，从而将引线的相应外端设置在第二架飞机从第一架飞机上移开。外拉杆和定位销在导向孔中的滑动接合用于防止由于弯曲操作引起的引线的不期望的变形。模具的中心表面部分还包括用于接收密封其中的半导体芯片的封装的至少一部分的凹部。引线框架可以包括多组基本上平行的引线，其具有对应的外拉杆和从封装的相应多个边缘延伸的相关联的引导孔。

9. 发明授权

US5786985A Semiconductor device and semiconductor device unit 失效
标题翻译：半导体器件和半导体器件单元
公开(公告)号：US5786985A
公开(公告)日：1998-07-28
申请号：US749734
申请日：1996-11-15
申请人： Norio Taniguchi , Junichi Kasai , Kazuto Tsuji , Michio Sono , Masanori Yoshimoto , Katsuhiro Hayashida , Mitsutaka Sato , Hiroshi Yoshimura , Tadashi Uno , Kosuke Otokita , Tetsuya Fujisawa
发明人： Norio Taniguchi , Junichi Kasai , Kazuto Tsuji , Michio Sono , Masanori Yoshimoto , Katsuhiro Hayashida , Mitsutaka Sato , Hiroshi Yoshimura , Tadashi Uno , Kosuke Otokita , Tetsuya Fujisawa
IPC分类号： H01L21/98 , H01L23/495 , H01L25/10 , H05K3/30 , H05K7/20
CPC分类号： H01L25/50 , H01L23/4951 , H01L23/49568 , H01L25/105 , H05K3/301 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/73265 , H01L2225/1005 , H01L2225/1029 , H01L2225/107 , H01L2225/1094 , Y10S269/903
摘要： A semiconductor device is adapted to be mounted on a circuit substrate in an approximate vertical position. The semiconductor device includes a semiconductor chip, a stage having a first surface and a second surface opposite to the first surface, where the semiconductor chip is mounted on the first surface, a resin package encapsulating the semiconductor chip, where the resin package has upper and lower surfaces and side surfaces, a plurality of leads respectively having one end electrically connected to the semiconductor chip and another end extending downwardly from the lower surface of the resin package, and an upper extension, provided on the stage, extending upwardly from the upper surface of the resin package.
摘要翻译：半导体器件适于以大致垂直位置安装在电路基板上。半导体器件包括半导体芯片，具有第一表面和与第一表面相对的第二表面的阶段，其中半导体芯片安装在第一表面上，树脂封装封装半导体芯片，其中树脂封装具有上部和下表面和侧表面，分别具有电连接到半导体芯片的一端和从树脂封装的下表面向下延伸的另一端的多个引线以及设置在台上的从上表面向上延伸的上延伸部的树脂包装。

10. 发明授权

US5684675A Semiconductor device unit having holder 失效
标题翻译：具有保持器的半导体器件单元
公开(公告)号：US5684675A
公开(公告)日：1997-11-04
申请号：US252522
申请日：1994-06-01
申请人： Norio Taniguchi , Junichi Kasai , Kazuto Tsuji , Michio Sono , Masanori Yoshimoto
发明人： Norio Taniguchi , Junichi Kasai , Kazuto Tsuji , Michio Sono , Masanori Yoshimoto
IPC分类号： H01L25/18 , H01L21/98 , H01L23/32 , H01L23/495 , H01L25/10 , H01L25/11 , H05K3/30 , H05K7/20
CPC分类号： H01L25/50 , H01L23/32 , H01L23/4951 , H01L23/49568 , H01L25/105 , H05K3/301 , H01L2225/1005 , H01L2225/1029 , H01L2225/107 , H01L2225/1094 , H01L2924/0002 , Y10S269/903
摘要： A semiconductor device unit includes a holder having a plurality of holding parts, and a plurality of semiconductor devices held by the holding parts of the holder. Each of the semiconductor devices has a generally parallelepiped shape with top and bottom surfaces and at least one side surface provided with leads which are exposed whereby the semiconductor device unit stands by itself on the leads.
摘要翻译：半导体器件单元包括具有多个保持部的保持器和由保持器的保持部保持的多个半导体器件。每个半导体器件具有大致平行六面体形状，具有顶表面和底表面，并且至少一个侧表面设置有暴露的引线，由此半导体器件单元自身在引线上待机。

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