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1. 发明授权

US09887672B1 Distortion compensation method for class-D audio amplifier 有权
公开(公告)号：US09887672B1
公开(公告)日：2018-02-06
申请号：US15470047
申请日：2017-03-27
申请人： NATIONAL CHENG KUNG UNIVERSITY , MEGAWIN TECHNOLOGY CO., LTD
发明人： Tai-Haur Kuo , Shih-Hsiung Chien , Jyun-Jia Huang
IPC分类号： H03F1/32 , H03F3/20 , H03F3/181
CPC分类号： H03F1/3205 , H03F3/183 , H03F3/21 , H03F3/45475 , H03F2200/351 , H03F2200/451
摘要： A distortion compensation method for a class-D audio amplifier has the steps of connecting a compensation circuit to the class-D audio amplifier; providing a feed-forward signal from the compensation circuit to the loop filter, wherein the feed-forward signal contains replicate high-frequency components replicated from original high-frequency components of the class-D audio amplifier; and adding the feed-forward signal to those of the class-D audio amplifier. By adding the feed-forward signal, PWM-intermodulated distortion resulted from the high-frequency components is reduced. The class-D audio amplifier still maintains loop stability without affecting its phase margin.

2. 发明授权

US09602001B1 Buck converter with a variable-gain feedback circuit for transient responses optimization 有权
公开(公告)号：US09602001B1
公开(公告)日：2017-03-21
申请号：US14935149
申请日：2015-11-06
申请人： NATIONAL CHENG KUNG UNIVERSITY , MEGAWIN TECHNOLOGY CO., LTD.
发明人： Ting-Hsuan Hung , Szu-Yu Huang , Tai-Haur Kuo , Kow-Liang Wen
IPC分类号： H02M3/158 , H02M1/00
CPC分类号： H02M3/158 , H02M2001/0009 , H02M2001/0025 , H02M2001/0048 , Y02B70/1491
摘要： A buck converter includes a power stage circuit and a control circuit. The power stage circuit has a pair of switches, an output inductor, and an output capacitor. The control circuit has a current-sensing unit (CCS), an error-amplifying (EA) and transient-holding (TH) unit, a transient-optimized feedback unit (TOF), and a PWM generation unit. The CCS senses an output capacitor current. The EA with the TH receives a feedback voltage and a reference voltage to generate an error signal. The TOF receives the feedback voltage and the reference voltage to generate a proportional voltage signal by a variable gain value. The PWM generation unit receives the proportional voltage signal and a sensing voltage signal to generate a PWM signal. When the proportional voltage signal equals the sensing voltage signal, the switches are controlled by the PWM signal at an optimal time point so that transient responses are optimized.

3. 发明公开

US20230261620A1 Switching Amplifier with Adaptive Supply-Voltage Scaling 审中-公开
公开(公告)号：US20230261620A1
公开(公告)日：2023-08-17
申请号：US17673822
申请日：2022-02-17
申请人： National Cheng Kung University
发明人： Tai-Haur Kuo
IPC分类号： H03F3/217 , H03F1/02
CPC分类号： H03F3/2173 , H03F1/0227 , H03F2200/03 , H03F2200/351 , H03F2200/462 , H03F2200/471
摘要： A switching amplifier comprises a controller, configured to receive an input signal and a reference signal, and to generate a control signal according to the input signal and the reference signal; a pulse-width modulation (PWM) modulator, coupled to the controller, configured to generate a PWM signal according to the input signal and the control signal; a power management unit, coupled to the controller, configured to receive a power supply and the control signal, and to provide an adaptive supply voltage according to the power supply and the control signal; and a switching power stage, coupled to the power management unit and the PWM modulator, configured to generate an output signal according to the PWM signal and the adaptive supply voltage.

4. 发明申请

US20210028159A1 SYMMETRICAL LAYOUT STRUCTURE OF SEMICONDUCTOR DEVICE 有权
公开(公告)号：US20210028159A1
公开(公告)日：2021-01-28
申请号：US16522635
申请日：2019-07-25
申请人： NATIONAL CHENG KUNG UNIVERSITY
发明人： Hung-Yi Huang , Tai-Haur Kuo
IPC分类号： H01L27/02 , H01L49/02 , H01L27/06 , H03M1/66
摘要： A symmetrical layout structure of a semiconductor device is formed on a chip. The symmetrical layout structure is performed in a (2M+1)×(2M+1) array and comprises 2M−r working units and r dummy unit(s). Each working unit has 22+M sub-working units continuously connected by a closed trace and arranged along the closed trace in the array, wherein M is a positive integer, and r is zero or a positive integer. Each closed trace forms a parallelogram that is symmetrical to a diagonal path of the array. The working unit can be a current cell. According to the layout structure, all parallelograms have the same centroid, the perimeters of all parallelograms are the same, the lengths of the closed traces are the same, and the distances between all of the sub-current cells are the same. The present invention thus improves the performance of the digital-to-analog converter.

5. 发明授权

US08872687B1 Digital to analog converting method and converter insensitive to code-dependent distortions 有权
标题翻译：数字到模拟转换方法和转换器对代码相关的失真不敏感
公开(公告)号：US08872687B1
公开(公告)日：2014-10-28
申请号：US14025435
申请日：2013-09-12
申请人： National Cheng Kung University
发明人： Wei-Te Lin , Hung-Yi Huang , Tai-Haur Kuo
IPC分类号： H03M1/66 , H03M1/06
CPC分类号： H03M1/0675 , H03M1/0673 , H03M1/0863 , H03M1/747
摘要： A digital to analog converting method insensitive to code-dependent distortions is implemented by a digital to analog converter (DAC) having a plurality of unit current sources. A plurality of binary-weighted input codes are received by the DAC and rotated to generate dynamic element matched (DEM) encoded signals. Between the adjacent DEM encoded signals is a purposely added pre-determined return-to-zero (RTZ) code. When the DAC generates analog outputs according to the alternately received DEM encoded signals and the RTZ codes, a zero-voltage phase during the level transition of the analog outputs is obtained by the RTZ codes. With the DEM encoded signals and the RTZ codes, each level transition is independent. Furthermore, code-dependent problems such as mismatch- and transient-related distortion are mitigated by the DEM encoded signals.
摘要翻译：对代码相关失真不敏感的数模转换方法由具有多个单位电流源的数模转换器（DAC）来实现。多个二进制加权输入代码由DAC接收并被旋转以产生动态元素匹配（DEM）编码信号。在相邻的DEM编码信号之间是有意添加的预定的归零（RTZ）码。当DAC根据交替接收的DEM编码信号和RTZ码产生模拟输出时，通过RTZ码获得模拟输出电平转换期间的零电压相位。使用DEM编码信号和RTZ码，每个级别的转换是独立的。此外，代码相关的问题，如不匹配和瞬态相关的失真由DEM编码信号减轻。

6. 发明公开

US20240171131A1 Level-shifting amplifier with gain error reduction 审中-公开
公开(公告)号：US20240171131A1
公开(公告)日：2024-05-23
申请号：US17991809
申请日：2022-11-21
申请人： National Cheng Kung University
发明人： Jia-Ching Wang , Tai-Haur Kuo
IPC分类号： H03F1/32
CPC分类号： H03F1/3247
摘要： An amplifier circuit includes an input terminal, configured to receive an input voltage; an output terminal, configured to output an output voltage; a multi-stage operational amplifier, coupled to the input terminal and the output terminal, and configured to amplify the input voltage to the output voltage, comprising a plurality of amplifiers; and a plurality of level-shifting networks, each coupled between two of the plurality of amplifiers, configured to reduce a gain error of each output of the plurality of amplifiers; and a feedback capacitor, coupled between the input terminal and the output terminal.

7. 发明授权

US11764742B2 Switching amplifier with adaptive supply-voltage scaling 有权
公开(公告)号：US11764742B2
公开(公告)日：2023-09-19
申请号：US17673822
申请日：2022-02-17
申请人： National Cheng Kung University
发明人： Tai-Haur Kuo
IPC分类号： H03F1/02 , H03F3/217
CPC分类号： H03F3/2173 , H03F1/0227 , H03F2200/03 , H03F2200/351 , H03F2200/462 , H03F2200/471
摘要： A switching amplifier comprises a controller, configured to receive an input signal and a reference signal, and to generate a control signal according to the input signal and the reference signal; a pulse-width modulation (PWM) modulator, coupled to the controller, configured to generate a PWM signal according to the input signal and the control signal; a power management unit, coupled to the controller, configured to receive a power supply and the control signal, and to provide an adaptive supply voltage according to the power supply and the control signal; and a switching power stage, coupled to the power management unit and the PWM modulator, configured to generate an output signal according to the PWM signal and the adaptive supply voltage.

8. 发明授权

US11616512B1 Series-connected delta-sigma modulator 有权
公开(公告)号：US11616512B1
公开(公告)日：2023-03-28
申请号：US17672728
申请日：2022-02-16
申请人： National Cheng Kung University
发明人： Tai-Haur Kuo
IPC分类号： H03M3/00 , H03F3/217
摘要： A series-connected delta-sigma modulator (DSM) comprises a first DSM, configured to receive an input signal, comprising a first loop filter, configured to generate a first processed signal; and a first quantizer, coupled to the first loop filter, configured to generate a first quantized signal, and to feed back the first quantized signal to the first loop filter, wherein the first quantized signal comprises a clipping error smaller than a first predetermined value; and a second DSM, coupled to the first DSM, configured to receive the first quantized signal from the first DSM, comprising a second loop filter, configured to generate a second processed signal; and a second quantizer, coupled to the second loop filter, configured to generate a second quantized signal, and to feed back the second quantized signal to the second loop filter, wherein the second quantized signal comprises a quantization error smaller than a second predetermined value.

9. 发明授权

US10120056B2 Method and apparatus of calibrating impedance-matching current sensor 有权
公开(公告)号：US10120056B2
公开(公告)日：2018-11-06
申请号：US15193807
申请日：2016-06-27
申请人： NATIONAL CHENG KUNG UNIVERSITY
发明人： Kuan-Yu Fang , Szu-Yu Huang , Tai-Haur Kuo
IPC分类号： G01R35/00 , H03H7/38
摘要： A method of calibrating an impedance-matching current sensor (IMCS) is provided. The IMCS has an equivalent sensing impedance and is connected in parallel to an object under test. The method includes steps of: using an alternating-current (AC) current source to provide a first AC current flowing through the object under test and provide a second AC current flowing through the IMCS; designing the equivalent sensing impedance to make the first AC current much greater than the second AC current; proportionally converting the second AC current into a sense voltage; and adjusting a magnitude of the sense voltage to be proportional to a magnitude of the first AC current. Accordingly, it is to significantly overcome problems of unreliability and instability of the DC-to-DC conversion system caused by temperature, aging, DC bias variation, or parasitic effect, thus maintaining correct sensed results of the current sensor in transient response optimization.

10. 发明授权

US10826513B1 Analog to digital converter with offset-adjustable comparators 有权
公开(公告)号：US10826513B1
公开(公告)日：2020-11-03
申请号：US16556770
申请日：2019-08-30
申请人： NATIONAL CHENG KUNG UNIVERSITY
发明人： Chung-Ming Yang , Tai-Haur Kuo
IPC分类号： H03M1/06 , H03K5/24 , H03M1/10
摘要： An analog to digital converter includes a coarse ADC circuit composed of L offset-adjustable comparators and a fine ADC circuit composed of M offset-adjustable comparators. Each offset-adjustable comparator in the coarse ADC circuit has a constant embedded offset. Each offset-adjustable comparator in the fine ADC circuit has an adaptive embedded offset digitally determined by outputs of the coarse ADC circuit. With the constant and adaptive embedded offsets, the analog to digital converter requires no resistor ladder. Therefore, power consumption and area of the analog to digital converter is reduced, and faster conversion speed is achieved.

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