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1. 发明授权

US10824368B2 Data storing method, memory control circuit unit and memory storage device 有权
公开(公告)号：US10824368B2
公开(公告)日：2020-11-03
申请号：US15729666
申请日：2017-10-10
申请人： PHISON ELECTRONICS CORP.
发明人： Chih-Kang Yeh
IPC分类号： G06F3/06 , G06F13/16
摘要： A data storing method, a memory control circuit unit and a memory storage device are provided. The method includes: receiving a first write command from a host system; determining whether to write a first data corresponding to the first write command by using a first mode or write the first data by using a second mode according to an available buffer memory state; writing the first data into a first physical erasing unit among a plurality of physical erasing units by using the first mode when the first data is determined to be written by using the first mode; and writing the first data into a second physical erasing unit among the physical erasing units by using the second mode when the first data is determined to be written by using the second mode.

2. 发明申请

US20200050399A1 DATA MERGE METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT 审中-公开
公开(公告)号：US20200050399A1
公开(公告)日：2020-02-13
申请号：US16141990
申请日：2018-09-26
申请人： PHISON ELECTRONICS CORP.
发明人： Chih-Kang Yeh
IPC分类号： G06F3/06
摘要： An exemplary embodiment of the disclosure provides a data merge method for a memory storage device. The method comprises: performing a data merge operation to store valid data collected from a source node comprising at least one first physical unit to a recycling node comprising a second physical unit. The data merge operation comprises: reading a first data from the at least one first physical unit by a first reading operation; performing a first stage programming operation on the second physical unit according to the first data; reading the first data from the at least one first physical unit again by a second reading operation after the first stage programming operation is performed; and performing a second stage programming operation on the second physical unit according to the first data read by the second reading operation.

3. 发明授权

US10169224B2 Data protecting method for preventing received data from losing, memory storage apparatus and memory control circuit unit 有权
公开(公告)号：US10169224B2
公开(公告)日：2019-01-01
申请号：US14243903
申请日：2014-04-03
申请人： PHISON ELECTRONICS CORP.
发明人： Chih-Kang Yeh
IPC分类号： G06F12/02
摘要： A data protecting method, a memory storage apparatus and a memory control circuit unit are provided. The method includes: determining whether a first procedure being executed or about to be executed by the memory storage device is a first type procedure; and if the first procedure being executed or about to be executed by the memory storage device is the first type procedure, temporarily stopping receiving a first data corresponding to a first write command before the first procedure is finished.

4. 发明授权

US10062418B2 Data programming method and memory storage device 有权
公开(公告)号：US10062418B2
公开(公告)日：2018-08-28
申请号：US14997575
申请日：2016-01-18
申请人： PHISON ELECTRONICS CORP.
发明人： Chih-Kang Yeh
IPC分类号： G11C7/00 , G06F11/10 , G11C29/52 , G06F3/06 , G06F12/02 , G11C16/34 , G11C29/42 , G11C11/56
CPC分类号： G11C7/00 , G06F3/0679 , G06F11/1068 , G06F12/0246 , G11C5/005 , G11C7/1006 , G11C11/5628 , G11C16/0483 , G11C16/10 , G11C16/345 , G11C29/42 , G11C29/52
摘要： A data programming method and a memory storage device are provided. The method includes: programming a plurality of first type physical units in a rewritable non-volatile memory module to store first data; encoding the first data to generate encoded data; receiving second data; and programming at least one of a plurality of second type physical units in the rewritable non-volatile memory module corresponding to the first type physical units to store at least a part of the second data after the first data is encoded. Therefore, the correcting ability for correcting errors in pair physical units in multi-channel programming procedure may be improved.

5. 发明申请

US20180129414A1 MEMORY MANAGEMENT METHOD, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE DEVICE 有权
公开(公告)号：US20180129414A1
公开(公告)日：2018-05-10
申请号：US15390547
申请日：2016-12-26
申请人： PHISON ELECTRONICS CORP.
发明人： Chih-Kang Yeh
IPC分类号： G06F3/06 , G06F12/02
CPC分类号： G06F3/061 , G06F3/0655 , G06F3/0679 , G06F12/0246 , G06F2212/7201
摘要： A memory management method, a memory control circuit unit and a memory storage device are provided, wherein the memory storage device includes a rewritable non-volatile memory module and a buffer memory. The method includes: loading at least one first address information of at least one first logical-physical mapping table from the rewritable non-volatile memory module to a first buffer area when the memory storage device is operated in a first mode, wherein the first address information has a first data quantity; and loading at least one second address information of at least one second logical-physical mapping table from the rewritable non-volatile memory module to the first buffer area when the memory storage device is operated in a second mode, wherein the second address information has a second data quantity, and the first data quantity is less than the second data quantity.

6. 发明授权

US09880742B2 Valid data merging method, memory controller and memory storage apparatus 有权
公开(公告)号：US09880742B2
公开(公告)日：2018-01-30
申请号：US14872154
申请日：2015-10-01
申请人： PHISON ELECTRONICS CORP.
发明人： Chih-Kang Yeh
IPC分类号： G06F12/00 , G06F3/06 , G06F12/02 , G06F12/1009
CPC分类号： G06F3/0608 , G06F3/0652 , G06F3/0679 , G06F12/0246 , G06F12/1009 , G06F2212/1044 , G06F2212/2022 , G06F2212/7201
摘要： A valid data merging method, a memory controller and a memory storage apparatus are provided. The method includes: selecting a first physical erasing unit, and loading a first logical address-physical address mapping table according to a physical address-logical address mapping table. The method also includes: updating the first logical address-physical address mapping table according to the physical address-logical address mapping table, and identifying valid data in the first physical erasing unit according to the physical address-logical address mapping table and the first logical address-physical address mapping table. The method further includes: storing the first logical address-physical address mapping table, copying the valid data to a second physical erasing unit, and performing an erasing operation for the first physical erasing unit.

7. 发明授权

US09778862B2 Data storing method for preventing data losing during flush operation, memory control circuit unit and memory storage apparatus 有权
公开(公告)号：US09778862B2
公开(公告)日：2017-10-03
申请号：US14195871
申请日：2014-03-04
申请人： PHISON ELECTRONICS CORP.
发明人： Chih-Kang Yeh
IPC分类号： G06F3/06 , G06F12/02 , G11C11/56
CPC分类号： G06F3/0619 , G06F3/0656 , G06F3/0679 , G06F12/02 , G06F12/0246 , G11C11/5628
摘要： A data storing method for storing data in a rewritable non-volatile memory module is provided. The method includes temporarily storing first data into a buffer memory; and starting a flush operation to write the first data from the buffer memory into a first physical programming unit. The method further includes determining whether the first physical programming unit is a lower physical programming unit; and if yes, writing second data into a second physical programming unit, wherein the second physical programming unit belongs to an upper physical programming unit, and the second physical programming unit and the first physical programming unit are formed by the same memory cells disposed on the same word line. Accordingly, the method can effectively prevent the data written during the flush operation from losing due to the programming fail occurred on other physical programming units.

8. 发明授权

US09613705B1 Method for managing programming mode of rewritable non-volatile memory module, and memory storage device and memory control circuit unit using the same 有权
公开(公告)号：US09613705B1
公开(公告)日：2017-04-04
申请号：US14997590
申请日：2016-01-18
申请人： PHISON ELECTRONICS CORP.
发明人： Chih-Kang Yeh
IPC分类号： G11C16/14 , G11C16/10
CPC分类号： G11C16/14 , G06F12/0246 , G06F2212/1024 , G06F2212/7201 , G06F2212/7203 , G06F2212/7204 , G11C11/5628 , G11C11/5635 , G11C16/10 , G11C2211/5641
摘要： In an exemplary embodiment, the method includes: determining whether a used capacity of first physical units initially configured to be programmed based on a first programming mode reaches a preset capacity and whether specific data stored in the first physical units matches a preset condition; and if the used capacity of the first physical units reaches the preset capacity and the specific data stored in the first physical units matches the preset condition, selecting at least one physical unit from second physical units initially configured to be programmed based on a second programming mode, and programming the selected physical unit based on the first programming mode. Accordingly, the writing speed decreased by the fully written buffer area may be improved.

9. 发明授权

US09600363B2 Data accessing method, memory controlling circuit unit and memory storage apparatus 有权
公开(公告)号：US09600363B2
公开(公告)日：2017-03-21
申请号：US14736284
申请日：2015-06-11
申请人： PHISON ELECTRONICS CORP.
发明人： Chih-Kang Yeh , Chang-Guang Lin
IPC分类号： G11B20/18 , G06F11/10 , G11C29/52 , H03M13/29 , G06F3/06
CPC分类号： G06F11/1068 , G06F3/0619 , G06F3/064 , G06F3/0679 , G06F11/1012 , G11C29/52 , G11C2029/0411 , H03M13/05 , H03M13/09 , H03M13/2906
摘要： A data accessing method for a memory storage apparatus is provided. The method includes using a first check code circuit to generate a first check code corresponding to a first data stream and generating a first data set based on the first data stream and the first check code. The method also includes using a second check code circuit to obtain the first data stream and the first check code from the first data set and check the first data stream according to the first check code. The method still includes using a third check code circuit to generate a second check code according to the checked first data stream and generating a data frame based on the checked first data stream and the second check code and thereby programming the data frame into a physical programming unit.

10. 发明申请

US20160320973A1 DATA WRITING METHOD, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE APPARATUS 有权
标题翻译：数据写入方法，存储器控制电路单元和存储器存储器
公开(公告)号：US20160320973A1
公开(公告)日：2016-11-03
申请号：US14751147
申请日：2015-06-26
申请人： PHISON ELECTRONICS CORP.
发明人： Chih-Kang Yeh
IPC分类号： G06F3/06
CPC分类号： G06F3/0604 , G06F3/0616 , G06F3/064 , G06F3/0647 , G06F3/0652 , G06F3/0679 , G06F12/0246 , G11C16/349 , G11C2211/5641
摘要： A data writing method for a rewritable non-volatile memory module, and a memory control circuit unit and a memory storage apparatus using the same are provided. The method includes grouping physical erasing units of the rewritable non-volatile memory module into a temporary area and a storage area. The method also includes selecting a first physical erasing unit from the temporary area, copying a plurality of valid data of the first physical erasing unit to a second physical erasing unit of the temporary area, and performing an erasing operation on the first physical erasing unit. The method further includes selecting a third physical erasing unit from the temporary area, copying a plurality of valid data of the third physical erasing unit to a forth physical erasing unit of the storage area, and performing the erasing operation on the third physical erasing unit.
摘要翻译：提供了一种用于可重写非易失性存储器模块的数据写入方法，以及存储器控制电路单元和使用其的存储器存储装置。该方法包括将可重写非易失性存储器模块的物理擦除单元分组成临时区域和存储区域。该方法还包括从临时区域选择第一物理擦除单元，将第一物理擦除单元的多个有效数据复制到临时区域的第二物理擦除单元，并对第一物理擦除单元进行擦除操作。该方法还包括从临时区域选择第三物理擦除单元，将第三物理擦除单元的多个有效数据复制到存储区域的第四物理擦除单元，以及对第三物理擦除单元进行擦除操作。

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