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1. 发明授权

US12016094B2 Multiple location load control system 有权
公开(公告)号：US12016094B2
公开(公告)日：2024-06-18
申请号：US18154907
申请日：2023-01-16
申请人： Lutron Technology Company LLC
发明人： Russell Weightman , Jonathan T. Lenz , Jaykrishna A. Shukla , Daniel Curtis Raneri
IPC分类号： H05B39/08 , G11C5/00 , G11C5/02 , G11C7/04 , G11C7/24 , G11C11/406 , G11C29/12 , H05B39/04 , H05B47/10 , H05B47/165 , H05B47/17 , H05B47/185
CPC分类号： H05B39/086 , G11C5/005 , G11C5/025 , G11C7/04 , G11C7/24 , G11C11/40626 , G11C29/12 , H05B39/04 , H05B47/10 , H05B47/165 , H05B47/17 , H05B47/185
摘要： A load control device may include a semiconductor switch, a control circuit, and first and second terminals adapted to be coupled to a remote device. The load control device may include a first switching circuit coupled to the second terminal, and a second switching circuit coupled between the first terminal and the second terminal. The control circuit may be configured to render the first switching circuit conductive to conduct a charging current from an AC power source to a power supply of the remote device during a first time period of a half-cycle of the AC power source, and further configured to render the first and second switching circuits conductive and non-conductive to communicate with the remote device via the second terminal during a second time period of the half-cycle of the AC power source.

2. 发明公开

US20240005962A1 DETECTING LASER-INJECTED FAULTS 审中-公开
公开(公告)号：US20240005962A1
公开(公告)日：2024-01-04
申请号：US17856897
申请日：2022-07-01
申请人： Intel Corporation
发明人： Minki Cho , Daniel Nemiroff , Carlos Tokunaga , James W. Tschanz , Kah Meng Yeem , Yaxin Shui
IPC分类号： G11C5/00
CPC分类号： G11C5/005
摘要： An integrated circuit (IC) die comprises a sensor, which includes a pulse generator and a pulse expander. The pulse generator comprises gate circuits coupled to each other in an in-series arrangement. An input of the pulse generator is coupled to receive a voltage and the pulse generator is to generate a first signal based on the voltage. The pulse generator is to generate a first pulse of the first signal based on an event wherein radiation from a laser is incident upon the pulse generator. The pulse expander is coupled to receive the first signal from the pulse generator and to generate a second signal based on the first signal, wherein a second pulse of the second signal is based on the first pulse. A first duration of the first pulse is less than a second duration of the second pulse.

3. 发明授权

US11854645B2 Memory system storage device with power loss protection circuit 有权
公开(公告)号：US11854645B2
公开(公告)日：2023-12-26
申请号：US17694946
申请日：2022-03-15
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Woosung Lee , Chunghyun Ryu , Hyoungtaek Lim
IPC分类号： G11C5/00 , G11C5/14
CPC分类号： G11C5/005 , G11C5/141
摘要： A memory system and storage device are provided, including: an auxiliary power device having at least one capacitor, wherein the at least one capacitor has a first path for leakage current; a charging circuit including a switch connected to the auxiliary power device; and a state determining circuit connected to the auxiliary power device, wherein the state determining circuit includes a path circuit connected in parallel with the at least one capacitor to form a second path having at least one of a resistance lower than a resistance of the first path or a current source.

4. 发明申请

US20190102261A1 CIRCUIT AND METHOD FOR STORING INFORMATION IN NON-VOLATILE MEMORY DURING A LOSS OF POWER EVENT 审中-公开
公开(公告)号：US20190102261A1
公开(公告)日：2019-04-04
申请号：US15720533
申请日：2017-09-29
申请人： Allegro MicroSystems, LLC
发明人： Juan Manuel Cesaretti , Alejandro Gabriel Milesi
IPC分类号： G06F11/14 , G11C5/00 , G11C16/22 , G06F1/30 , G06F1/28
CPC分类号： G06F11/1469 , G06F1/28 , G06F1/30 , G06F11/1456 , G11C5/005 , G11C5/143 , G11C5/148 , G11C16/225
摘要： A data storage circuit for storing data from volatile memory in response to a power loss, the data storage circuit including an input for receiving a power loss signal in response to a power loss from at least one power source, an input configured to receive data from a volatile memory, a single block of non-volatile matrix of memory cells and a driver circuit coupled to said single row of non-volatile matrix of memory cells. The driver circuit is configured to write data to and read data from said single block of non-volatile matrix of memory cells. The single block of non-volatile matrix of memory cells can be provided as a single row electrically erasable programmable read only memory (EEPROM).

5. 发明授权

US10019041B2 Solid state drive (SSD) housing and SSD housing assembly 有权
公开(公告)号：US10019041B2
公开(公告)日：2018-07-10
申请号：US15396946
申请日：2017-01-03
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Jung-Hyun Woo , Jae-Hong Park , Han-Hong Lee , Sung-Woo Joo , Chang-Hoon Han
IPC分类号： G06F1/18 , H05K5/02 , G11C5/00 , G06F1/16
CPC分类号： G06F1/18 , G06F1/1658 , G06F1/187 , G11C5/005 , H05K5/0269 , H05K5/0282
摘要： A solid state drive (SSD) housing assembly includes an SSD housing and an extension frame. The SSD housing includes a first extension joint and a first mounting joint. The first mounting joint is a mechanism by which the housing can be mounted to an external device. The SSD housing has the form of a rectangular case in which an SSD module is held. The extension frame includes a second extension joint and a second mounting joint. The second mounting joint is a mechanism by which the frame can be mounted to the external device. The extension frame is attachable to and detachable from the SSD housing by virtue of the first extension joint and the second extension joint.

6. 发明授权

US09940986B2 Electrostatic discharge protection structures for eFuses 有权
公开(公告)号：US09940986B2
公开(公告)日：2018-04-10
申请号：US14971644
申请日：2015-12-16
申请人： GLOBALFOUNDRIES INC.
发明人： Alain F. Loiseau , Joseph M. Lukaitis , Ephrem G. Gebreselasie , Richard A. Poro , Andreas D. Stricker , Ahmed Y. Ginawi
IPC分类号： H02H9/04 , G11C7/24 , H01L23/525 , H01L27/02 , H01L27/06 , H01L27/112 , G11C5/00 , G11C17/16
CPC分类号： G11C7/24 , G11C5/005 , G11C17/16 , H01L23/5256 , H01L27/0255 , H01L27/0266 , H01L27/0617 , H01L27/11206
摘要： The present disclosure relates to semiconductor structures and, more particularly, to electrostatic discharge (ESD) protection structures for eFuses. The structure includes an electrostatic discharge (ESD) protection structure operatively coupled to an eFuse, which is structured to prevent unintentional programming of the eFuse due to an ESD event originating at a source.

7. 发明授权

US09589598B1 Configurable spacecraft processor system 有权
标题翻译：可配置的航天器处理器系统
公开(公告)号：US09589598B1
公开(公告)日：2017-03-07
申请号：US13571240
申请日：2012-08-09
申请人： Daniel J. Gilley , Edwin Y. Wong , Gary L. Heinz
发明人： Daniel J. Gilley , Edwin Y. Wong , Gary L. Heinz
IPC分类号： G11C5/00 , H03K19/173 , G06F13/40
CPC分类号： G11C5/005 , G06F1/181 , G06F1/185 , G06F1/189 , G06F1/26 , G06F13/4081 , H03K19/173 , H05K7/1424
摘要： A configurable mission processor (CMP) is disclosed that includes a chassis with a plurality of reprogrammable processor modules (RPMs) disposed within the chassis. Each RPM has a baseboard with at least one field programmable gate array (FPGA) and a configuration manager configured to accept a configuration file through an externally accessible signal connector, store the configuration file, and selectably program the at least one FPGA using the configuration file. The RPM includes a power submodule that accepts unregulated power through an externally accessible power connector, generates regulated power at a plurality of voltages, and provide the regulated power to the RPM. The RPM may also include an input/output submodule configured to provide a communication channel between the at least one FPGA and external devices through its own externally accessible signal connector. The CMP also includes a backplane that provides only signal and ground interconnections between the baseboards.
摘要翻译：公开了一种可配置任务处理器（CMP），其包括具有设置在机架内的多个可重新编程处理器模块（RPM）的机架。每个RPM具有至少一个现场可编程门阵列（FPGA）和配置管理器的基板，配置管理器被配置为通过外部可访问的信号连接器接收配置文件，存储配置文件，并且使用配置文件可选地编程至少一个FPGA 。 RPM包括电源子模块，其通过外部可访问的电源连接器接受未调节的电力，在多个电压下产生调节功率，并向RPM提供调节功率。 RPM还可以包括被配置为通过其自己的外部可访问信号连接器在至少一个FPGA和外部设备之间提供通信信道的输入/输出子模块。 CMP还包括仅在底板之间提供信号和接地互连的背板。

8. 发明申请

US20160378148A1 Electromagnetic Pulse Protected Cable 审中-公开
标题翻译：电磁脉冲保护电缆
公开(公告)号：US20160378148A1
公开(公告)日：2016-12-29
申请号：US15237298
申请日：2016-08-15
申请人： Twin Harbor Labs, LLC
发明人： James D. Logan , Garrett Malagodi , Richard A Baker, JR. , David Lentini
IPC分类号： G06F1/18 , H01R24/64 , G11C5/00 , G02B6/42 , G11B33/14 , G06F1/16 , G02B6/38
CPC分类号： G11C5/005 , G02B6/3817 , G02B6/4246 , G02B6/4277 , G11B33/1493 , G11C5/14 , H01R24/64 , H01R2107/00
摘要： A computer storage system protected from electromagnetic pulses is described. The storage system utilizes either a hard drive or a solid state drive to hold the data. The device uses fiber optics to transfer data and is powered by either a Power over Fiber system or by a switched battery system. The device protects against radiation, magnetic pulses, and electronic pulses using an enclosure that incorporates a faraday cage, a radiation shield, and/or a magnetic shield.
摘要翻译：描述了防止电磁脉冲的计算机存储系统。存储系统使用硬盘驱动器或固态驱动器来保存数据。该设备使用光纤传输数据，并由Power over Fiber系统或交换式电池系统供电。该装置使用包含法拉第笼，辐射屏蔽和/或磁屏蔽的外壳来防止辐射，磁脉冲和电子脉冲。

9. 发明授权

US09454429B2 Protection against word line failure in memory devices 有权
公开(公告)号：US09454429B2
公开(公告)日：2016-09-27
申请号：US14595578
申请日：2015-01-13
申请人： Apple Inc.
发明人： Shai Ojalvo , Eyal Gurgi , Micha Anholt
IPC分类号： G06F11/10 , G11C29/00 , H03M13/00 , G11C7/10 , G11C5/00
CPC分类号： G06F11/1016 , G06F11/1004 , G06F11/1044 , G06F11/108 , G11C5/005 , G11C7/1006 , G11C2207/104
摘要： A method for data storage includes providing a mapping of data pages to physical pages, in which each physical page holds a non-integer number of the data pages, for storage of data in at least one memory block, including a plurality of the physical pages, in a memory device. The data pages that are mapped to the memory block are partitioned into groups, such that failure of any memory unit, which consists of a predefined number of the physical pages in the memory device, will produce errors in no more than one data page in each group. The data pages is stored in the physical pages of the memory block in accordance with the mapping, while a redundant storage scheme is applied among the data pages of each group.

10. 发明授权

US09395410B2 Integrated circuit with sensing unit and method for using the same 有权
标题翻译：具有感测单元的集成电路及其使用方法
公开(公告)号：US09395410B2
公开(公告)日：2016-07-19
申请号：US13153472
申请日：2011-06-06
申请人： Krishnakumar Mani
发明人： Krishnakumar Mani
IPC分类号： G01R27/08 , G01R31/28 , G01R31/30 , G11C5/00 , H01F1/00 , H01L21/00
CPC分类号： G01R31/2884 , G01R31/3004 , G11C5/00 , G11C5/005 , G11C11/1673 , G11C11/1677 , G11C29/50008 , G11C29/52 , H01F1/00 , H01L21/00
摘要： Integrated circuit comprising a sensing unit that includes a sensing circuit, two conductors and a magnetic storage element. The sensing circuit monitors a voltage drop across the element when a current is passed between the conductors with the element in between. The voltage drop is pre-calibrated to indicate a change in conductivity in the element that is caused by an external magnetic field. Advantageously, this indication is usable particularly for assessing a possible data corruption in a magnetic memory circuit in the integrated circuit, due to stray and external magnetic fields. Methods of using the sensing unit are also proposed.
摘要翻译：集成电路包括感测单元，其包括感测电路，两个导体和磁存储元件。当电流在导体之间通过元件之间时，感测电路监测元件两端的电压降。电压降被预校准，以指示由外部磁场引起的元件中的电导率的变化。有利地，该指示特别用于评估由于杂散和外部磁场而导致的集成电路中的磁存储器电路中可能的数据损坏。还提出了使用感测单元的方法。

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