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1. 发明授权

US07805623B2 Power-save circuit for computer 有权
标题翻译：电脑节电电路
公开(公告)号：US07805623B2
公开(公告)日：2010-09-28
申请号：US11765452
申请日：2007-06-20
申请人： Qi-Zhong Jia , Ze-Shu Ren
发明人： Qi-Zhong Jia , Ze-Shu Ren
IPC分类号： G06F1/26 , G06F1/32
CPC分类号： G06F1/3203 , G06F1/3287 , Y02D10/171
摘要： A circuit adopted in a computer includes a power supply (20) with an output (PS_+5VSB) for providing a standby voltage, a motherboard (10) with a pin (MB_+5VSB) for receiving the standby voltage, a switch circuit (30) connected between the output of the power supply and the pin of the motherboard. The switch circuit has a control terminal fed with a S5# signal which is at high level to turn on the switch circuit, and at low level to turn off the switch circuit when the computer is in a S5 power state to cut off the standby voltage supply from the power supply to the motherboard for reducing power consumption of the motherboard; the control terminal of the switch circuit further being supplied with an inverted PWRBTN# signal for turning on the switch circuit when the PWRBTN# signal is at low level for switching on or off the computer.
摘要翻译：在计算机中采用的电路包括具有用于提供备用电压的输出（PS_ + 5VSB）的电源（20），具有用于接收待机电压的引脚（MB_ + 5VSB）的母板（10），开关电路 30）连接在电源的输出和主板的引脚之间。开关电路具有馈送有高电平的S5＃信号的控制端子以接通开关电路，并且在计算机处于S5功率状态以切断待机电压时处于低电平以关闭开关电路从电源供应到主板以降低主板的功耗; 当PWRBTN＃信号处于低电平以打开或关闭计算机时，开关电路的控制端还被提供有反相PWRBTN＃信号，用于接通开关电路。

2. 发明授权

US07783904B2 Circuit for protecting computer system 有权
标题翻译：保护计算机系统的电路
公开(公告)号：US07783904B2
公开(公告)日：2010-08-24
申请号：US11767481
申请日：2007-06-23
申请人： Ze-Shu Ren
发明人： Ze-Shu Ren
IPC分类号： G06F13/00
CPC分类号： G06F1/26
摘要： A circuit for preventing a computer from being powered on before a CPU of the computer has been properly installed, the circuit includes a power supply (70) for the computer, a controller (60) connected to the power supply configured for controlling the power supply, a switch (10) exposed outside the computer for convenient operation, and a switching device (Q1). The controller includes a terminal for receiving a computer startup signal. The switch is connected to the terminal of the controller for sending the computer startup signal to the controller when the switch is triggered, wherein when the computer startup signal is sent to the sensing terminal of the controller, the controller controls the power supply to provide power to the computer. The switching device includes a control terminal configured for sensing if the CPU is installed to control conduction of the switching device.
摘要翻译：一种用于在计算机的CPU正确安装之前防止计算机通电的电路，该电路包括用于计算机的电源（70），连接到被配置为控制电源的电源的控制器（60），暴露在计算机外部以便于操作的开关（10）和开关装置（Q1）。控制器包括用于接收计算机启动信号的终端。开关连接到控制器的端子，当触发开关时将计算机启动信号发送到控制器，其中当计算机启动信号被发送到控制器的感测端子时，控制器控制电源以提供电力到电脑开关装置包括控制端子，被配置为感测CPU是否被安装以控制开关装置的导通。

3. 发明申请

US20070157034A1 CIRCUIT FOR PROTECTING MOTHERBOARD 失效
标题翻译：保护母板电路
公开(公告)号：US20070157034A1
公开(公告)日：2007-07-05
申请号：US11308750
申请日：2006-04-28
申请人： Ze-Shu Ren , Qi-Jie Chen
发明人： Ze-Shu Ren , Qi-Jie Chen
IPC分类号： G06F1/00
CPC分类号： G06F1/30
摘要： An assembly includes a circuit board (20) with a component attached thereon, a power supply (10) for providing power to the circuit board and the component separately, an ACPI chipset (65) for controlling the power supply, a protecting circuit (61) connected to the component, an I/O controller (64), and an enable circuit (62) for activating the I/O controller. The protecting circuit generates a protecting signal while the component is not connected properly to its power source. The I/O controller is responsive to the protecting signal to send a control signal to the ACPI chipset for shutting off the power supply.
摘要翻译：一种组件包括其上附着有部件的电路板（20），用于向电路板和组件单独提供电力的电源（10），用于控制电源的ACPI芯片组（65），保护电路（61）），I / O控制器（64）和用于激活I / O控制器的使能电路（62）。保护电路在组件未正确连接到其电源时产生保护信号。 I / O控制器响应于保护信号向ACPI芯片组发送控制信号以关闭电源。

4. 发明授权

US07590878B2 Circuit and method for protecting motherboard 失效
标题翻译：保护主板的电路及方法
公开(公告)号：US07590878B2
公开(公告)日：2009-09-15
申请号：US11748506
申请日：2007-05-15
申请人： Ze-Shu Ren
发明人： Ze-Shu Ren
IPC分类号： G06F1/00 , G06F11/30
CPC分类号： G06F1/30
摘要： A circuit for protecting a motherboard includes a first transistor (Q1), a second transistor (Q2), a third transistor (Q3), and a power control circuit (200). The power control circuit includes a power controller (10), and a power supply (20), and a fourth transistor (Q4) connected therebetween. The first transistor is supplied with a CPU power signal on the motherboard. The second and third transistors are jointly supplied with a sleep signal and turned on if the CPU power signal is at low level after the power supply is turned on, thereby turning off the fourth transistor and grounding a PWRBTN# pin of the power controller to turn off the power supply for protecting the motherboard from damage due to no CPU power-on voltage applied thereto after the power supply is turned on.
摘要翻译：用于保护母板的电路包括第一晶体管（Q1），第二晶体管（Q2），第三晶体管（Q3）和功率控制电路（200）。功率控制电路包括功率控制器（10）和电源（20）以及连接在它们之间的第四晶体管（Q4）。第一个晶体管在主板上提供了CPU电源信号。第二和第三晶体管共同提供睡眠信号，如果在电源接通后CPU功率信号为低电平，则断开第四晶体管，并将功率控制器的PWRBTN＃引脚接地关闭电源，以防止在电源接通之后由于不施加CPU上电电压而损坏主板。

5. 发明授权

US07493507B2 System for protecting a motherboard while a component is not connected properly to its power source 失效
标题翻译：组件未正确连接到电源时用于保护主板的系统
公开(公告)号：US07493507B2
公开(公告)日：2009-02-17
申请号：US11308750
申请日：2006-04-28
申请人： Ze-Shu Ren , Qi-Jie Chen
发明人： Ze-Shu Ren , Qi-Jie Chen
IPC分类号： G06F1/00 , G06F11/30
CPC分类号： G06F1/30
摘要： An assembly includes a circuit board (20) with a component attached thereon, a power supply (10) for providing power to the circuit board and the component separately, an ACPI chipset (65) for controlling the power supply, a protecting circuit (61) connected to the component, an I/O controller (64), and an enable circuit (62) for activating the I/O controller. The protecting circuit generates a protecting signal while the component is not connected properly to its power source. The I/O controller is responsive to the protecting signal to send a control signal to the ACPI chipset for shutting off the power supply.
摘要翻译：一种组件包括其上附着有部件的电路板（20），用于向电路板和组件单独提供电力的电源（10），用于控制电源的ACPI芯片组（65），保护电路（61）），I / O控制器（64）和用于激活I / O控制器的使能电路（62）。保护电路在组件未正确连接到其电源时产生保护信号。 I / O控制器响应于保护信号向ACPI芯片组发送控制信号以关闭电源。

6. 发明授权

US07679224B2 Circuit for protecting computer 失效
标题翻译：保护电脑的电路
公开(公告)号：US07679224B2
公开(公告)日：2010-03-16
申请号：US11778084
申请日：2007-07-16
申请人： Ze-Shu Ren
发明人： Ze-Shu Ren
IPC分类号： H01H83/00 , H02H3/00
CPC分类号： G06F1/26 , Y10T307/858
摘要： A circuit is used for preventing a computer from being powered up before a CPU voltage of the computer is prepared properly. The circuit includes a power supply for providing power to the computer, a power button for powering on the computer system, a power controller, and a switch. The power controller includes an input terminal connected to the power button and an output terminal for electrical connection to the power supply. The input terminal receives a PWRBT# signal when the power button is momentarily triggered, and the output terminal outputs a PSON# signal to the power supply to control the power supply to provide the electrical power to the computer in response to the received PWRBT# signal. The switch is serially connected between the output terminal and the power supply. The switch includes a control terminal monitoring if the CPU voltage is prepared properly so as to control conduction of the switch and further to control connection between the output terminal and the power supply.
摘要翻译：在正确准备计算机的CPU电压之前，电路用于防止计算机上电。该电路包括用于向计算机提供电力的电源，用于为计算机系统供电的电源按钮，功率控制器和开关。功率控制器包括连接到电源按钮的输入端子和用于与电源电连接的输出端子。当电源按钮被瞬间触发时，输入端子接收PWRBT＃信号，输出端子向电源输出PSON＃信号，以控制电源，以响应于接收的PWRBT＃信号向计算机提供电力。开关串联连接在输出端子和电源之间。该开关包括控制端子，监视CPU电压是否正确准备，以便控制开关的导通，并进一步控制输出端子和电源之间的连接。

7. 发明授权

US07518429B2 Delay circuit 失效
标题翻译：延时电路
公开(公告)号：US07518429B2
公开(公告)日：2009-04-14
申请号：US11767478
申请日：2007-06-23
申请人： Bai-Hong Liu , Ze-Shu Ren
发明人： Bai-Hong Liu , Ze-Shu Ren
IPC分类号： H03H11/26
CPC分类号： H03H11/26 , H03K4/50 , H03K5/06
摘要： A delay circuit (12) includes a resistor (R1), a capacitor (C), and a discharging circuit (14). The discharging circuit includes a PNP transistor (Q1) and an NPN transistor (Q2). The capacitor has one terminal connected to one terminal of the resistor, and the other terminal connected to ground. The PNP transistor has a base connected to the other terminal of the resistor, a collector, and an emitter connected to a voltage source. The NPN transistor has a base connected to the collector of the PNP transistor, an emitter connected to ground, and a collector connected to the one terminal of the resistor.
摘要翻译：延迟电路（12）包括电阻器（R1），电容器（C）和放电电路（14）。放电电路包括PNP晶体管（Q1）和NPN晶体管（Q2）。电容器有一个端子连接到电阻的一个端子，另一个端子连接到地。 PNP晶体管具有连接到电阻器的另一个端子的基极，集电极和连接到电压源的发射极。 NPN晶体管具有连接到PNP晶体管的集电极的基极，连接到地的发射极和连接到电阻器的一个端子的集电极。

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