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1. 发明申请

US20130249109A1 INTERPOSER FOR HERMETIC SEALING OF SENSOR CHIPS AND FOR THEIR INTEGRATION WITH INTEGRATED CIRCUIT CHIPS 有权
标题翻译：传感器盖的密封和用于集成电路卡的集成的间隔器
公开(公告)号：US20130249109A1
公开(公告)日：2013-09-26
申请号：US13631744
申请日：2012-09-28
申请人： Qing MA , Johanna M. SWAN , Min TAO , Charles A. GEALER , Edward A. ZARBOCK
发明人： Qing MA , Johanna M. SWAN , Min TAO , Charles A. GEALER , Edward A. ZARBOCK
IPC分类号： H01L23/48 , H01L23/00
CPC分类号： B81C1/00301 , B81B7/007 , B81C1/00238 , B81C2203/0145 , G01P15/0802 , H01L23/481 , H01L23/49816 , H01L23/5384 , H01L24/03 , H01L25/0652 , H01L2224/0401 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/73204 , H01L2924/01327 , H01L2924/07811 , H01L2924/12042 , H01L2924/1461 , H01L2924/00 , H01L2924/014
摘要： Integration of sensor chips with integrated circuit (IC) chips. At least a first sensor chip including a first sensor is affixed to a first side of an interposer to hermitically seal the first sensor within a first cavity. An IC chip is affixed to a second side of the interposer opposite the first sensor, the IC chip is electrically coupled to the first sensor by a through via in the interposer. In embodiments, the first sensor includes a MEMS device and the IC chip comprises a circuit to amplify a signal from the MEMS device. The interposer may be made of glass, with the first sensor chip and the IC chip flip-chip bonded to the interposer by compression or solder. Lateral interconnect traces provide I/O between the devices on the interposer and/or a PCB upon which the interpose is affixed.
摘要翻译：传感器芯片与集成电路（IC）芯片的集成。至少包括第一传感器的第一传感器芯片固定到插入件的第一侧，以将第一传感器密封在第一腔内。 IC芯片被固定到与第一传感器相对的插入件的第二侧，IC芯片通过插入器中的通孔电耦合到第一传感器。在实施例中，第一传感器包括MEMS器件，并且IC芯片包括放大来自MEMS器件的信号的电路。插入器可以由玻璃制成，其中第一传感器芯片和IC芯片倒装芯片通过压缩或焊接接合到插入器。横向互连迹线在插入件上的器件和/或其上插入插入物的PCB之间提供I / O。

2. 发明申请

US20140165723A1 INDUCTIVE INERTIAL SENSOR ARCHITECTURE & FABRICATION IN PACKAGING BUILD-UP LAYERS 有权
标题翻译：感应式传感器结构与制造包装建筑层
公开(公告)号：US20140165723A1
公开(公告)日：2014-06-19
申请号：US13720876
申请日：2012-12-19
申请人： Qing MA , Feras EID , Kevin LIN , Johanna M. SWAN , Weng Hong TEH , Valluri R. RAO
发明人： Qing MA , Feras EID , Kevin LIN , Johanna M. SWAN , Weng Hong TEH , Valluri R. RAO
IPC分类号： G01C19/5635
CPC分类号： G01C19/56 , G01C19/5776
摘要： This invention relates to inductive inertial sensors employing a magnetic drive and/or sense architecture. In embodiments, translational gyroscopes utilize a conductive coil made to vibrate in a first dimension as a function of a time varying current driven through the coil in the presence of a magnetic field. Sense coils register an inductance that varies as a function of an angular velocity in a second dimension. In embodiments, the vibrating coil causes first and second mutual inductances in the sense coils to deviate from each other as a function of the angular velocity. In embodiments, self-inductances associated with a pair of meandering coils vary as a function of an angular velocity in a second dimension. In embodiments, package build-up layers are utilized to fabricate the inductive inertial sensors, enabling package-level integrated inertial sensing advantageous in small form factor computing platforms, such as mobile devices.
摘要翻译：本发明涉及采用磁驱动和/或感测架构的感应惯性传感器。在实施例中，平移陀螺仪利用在第一维度中制成的导电线圈作为在存在磁场的情况下驱动通过线圈的时变电流的函数。感应线圈记录在第二维度上作为角速度的函数变化的电感。在实施例中，振动线圈使得感测线圈中的第一和第二互感器作为角速度的函数彼此偏离。在实施例中，与一对曲折线圈相关联的自感量作为第二维度中的角速度的函数而变化。在实施例中，使用封装积层来制造感应惯性传感器，使得能够在诸如移动设备的小尺寸计算平台中有利的封装级集成惯性感测。

3. 发明申请

US20140091440A1 SYSTEM IN PACKAGE WITH EMBEDDED RF DIE IN CORELESS SUBSTRATE 审中-公开
标题翻译：系统在无源基板上嵌入式RF模块的封装
公开(公告)号：US20140091440A1
公开(公告)日：2014-04-03
申请号：US13631982
申请日：2012-09-29
申请人： Vijay K. NAIR , John S. GUZEK , Johanna M. SWAN
发明人： Vijay K. NAIR , John S. GUZEK , Johanna M. SWAN
IPC分类号： H01L23/60 , H01L21/50
CPC分类号： H01L23/552 , H01L23/5383 , H01L23/5389 , H01L23/66 , H01L24/16 , H01L24/24 , H01L24/48 , H01L25/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73253 , H01L2224/73265 , H01L2224/83193 , H01L2924/00014 , H01L2924/15192 , H01L2924/181 , H01L2924/3025 , H01L2924/00 , H01L2224/45099
摘要： Electronic assemblies and their manufacture are described. One assembly includes a coreless substrate comprising a plurality of dielectric layers and electrically conductive pathways, the coreless substrate including a first side and a second side opposite the first side. The assembly includes a first die embedded in the coreless substrate, the first die comprising an RF die, the first die positioned in a dielectric layer that extends to the first side of the coreless substrate. The assembly includes a second die positioned on first side, the second die positioned on the first die. In another aspect, a molding material may be positioned on the die side, wherein the first die and the second die are covered by the molding material. In another aspect, an electrical shielding layer may be positioned over the first side. Other embodiments are described and claimed.
摘要翻译：描述了电子组件及其制造。一个组件包括包括多个电介质层和导电通路的无芯衬底，所述无芯衬底包括第一侧和与第一侧相对的第二侧。组件包括嵌入在无芯基板中的第一模具，第一模具包括RF模头，第一模具位于延伸到无芯基板的第一侧的电介质层中。组件包括位于第一侧上的第二模具，第二模具定位在第一模具上。另一方面，成型材料可以位于模具侧，其中第一模具和第二模具被模制材料覆盖。另一方面，电屏蔽层可以位于第一侧上。描述和要求保护其他实施例。

4. 发明申请

US20190204508A1 CRIMPED MM-WAVE WAVEGUIDE TAP CONNECTOR 审中-公开
公开(公告)号：US20190204508A1
公开(公告)日：2019-07-04
申请号：US15859477
申请日：2017-12-30
申请人： Adel A. ELSHERBINI , Georgios C. DOGIAMIS , Sasha N. OSTER , Erich N. EWY , Telesphor KAMGAING , Johanna M. SWAN
发明人： Adel A. ELSHERBINI , Georgios C. DOGIAMIS , Sasha N. OSTER , Erich N. EWY , Telesphor KAMGAING , Johanna M. SWAN
IPC分类号： G02B6/28 , G02B6/38 , G02B6/12
CPC分类号： H01P5/107 , G05D1/00 , H01Q1/32 , H04L12/40189 , H04L2012/40273 , H04W4/38 , H04W4/40
摘要： Embodiments include a sensor node, a method of forming the sensor node, and a vehicle with a communication system that includes sensor nodes. A sensor node includes an interconnect with an input connector, an output connector, and an opening on one or more sidewalls. The sensor node also includes a package with one or more sidewalls, a top surface, and a bottom surface, where at least one of the sidewalls of the package is disposed on the opening of interconnect. The sensor node may have a control circuit on the package, a first millimeter-wave launcher on the package, and a sensor coupled to the control circuit, where the sensor is coupled to the control circuit with an electrical cable. The sensor node may include that at least one of the sidewalls of the package is crimped by the opening and adjacent and co-planar to an inner wall of the interconnect.

5. 发明申请

US20150279774A1 SPACE TRANSFORMER 有权
标题翻译：空间变压器
公开(公告)号：US20150279774A1
公开(公告)日：2015-10-01
申请号：US14229405
申请日：2014-03-28
申请人： Aleksandar ALEKSOV , Johanna M. SWAN
发明人： Aleksandar ALEKSOV , Johanna M. SWAN
IPC分类号： H01L23/498 , H01L21/48 , H01L23/00
CPC分类号： H01L24/11 , H01L21/4853 , H01L21/4857 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L24/03 , H01L24/06 , H01L24/17 , H01L24/81 , H01L24/92 , H01L25/0657 , H01L2224/06181 , H01L2224/13022 , H01L2224/13023 , H01L2224/131 , H01L2224/13111 , H01L2224/16145 , H01L2224/16225 , H01L2224/17181 , H01L2224/81801 , H01L2224/9202 , H01L2224/94 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/2064 , H01L2924/00 , H01L2224/81 , H01L2924/014 , H01L2224/11 , H01L2924/00014
摘要： An apparatus including a planar semiconductor substrate including a plurality of devices and a first pattern of electrical contacts formed on the first surface of the semiconductor substrate; and a plurality of layers of conductive material alternating between dielectric material on the first surface of the semiconductor substrate, the plurality of layers of conductive material including a wiring layer including a second pattern of electrical contacts, wherein the second surface of the semiconductor substrate includes openings to the first pattern of electrical contacts. A method including forming a space transformer including a semiconductor substrate including, on a device side, a device region, a first pattern of electrical contacts, and at least one routing layer and a pad layer including a second pattern of electrical contacts; and forming openings through the space transformer to the first pattern of electrical contacts on the semiconductor substrate.
摘要翻译：一种包括形成在所述半导体衬底的所述第一表面上的多个器件的平面半导体衬底和电接触的第一图案的设备; 以及在所述半导体衬底的所述第一表面上的电介质材料之间交替的多层导电材料，所述多层导电材料包括包括第二电接触图案的布线层，其中所述半导体衬底的所述第二表面包括开口到第一个电触点模式。一种包括形成包括半导体衬底的空间变换器的方法，该半导体衬底在器件侧包括器件区域，第一电接触图案，以及至少一个布线层和包括第二电触点图案的衬垫层; 以及通过所述空间变压器形成到所述半导体衬底上的所述第一图形的电触点的开口。

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