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1. 发明授权

US10969987B2 Memory device, memory system including the memory device, and method of operating the memory system 有权
公开(公告)号：US10969987B2
公开(公告)日：2021-04-06
申请号：US16395890
申请日：2019-04-26
申请人： SK hynix Inc.
发明人： Hyun Woo Lee , Young Gyun Kim
IPC分类号： G06F3/06 , G06F11/10 , G11C29/52 , G11C16/34 , G06F12/02 , G11C11/56 , G11C16/26 , G11C13/00 , G11C16/16
摘要： A memory system includes: a memory cell array including a plurality of memory blocks; a peripheral circuit configured to perform a read operation on a selected memory block among the plurality of memory blocks and a backup program operation on a backup block among the plurality of memory blocks; and a control circuit configured to control the peripheral circuit to backup data of logical pages included in the selected memory block in the backup block, when a read count of a selected physical page of the selected memory block is equal to or larger than a set value in the read operation on the selected memory block.

2. 发明授权

US11442655B2 Semiconductor device and method of operating the same 有权
公开(公告)号：US11442655B2
公开(公告)日：2022-09-13
申请号：US17083500
申请日：2020-10-29
申请人： SK hynix Inc.
发明人： Young Gyun Kim , Ki Woong Lee , Sang Jin Lee
IPC分类号： G06F3/00 , G06F3/06 , G11C7/04
摘要： The present technology relates to a semiconductor device and a method of operating the same. The semiconductor device includes a sensing voltage generator configured to generate a temperature voltage having a voltage level determined according to an internal temperature of the semiconductor device and a reference voltage having a constant voltage level, a code generator configured to generate a temporary code including a sensing code value corresponding to the internal temperature and a boundary value indicating whether the internal temperature is included in a boundary portion associated with at least one temperature range corresponding to the sensing code value based on the temperature voltage and the reference voltage, and a code correction component configured to generate a correction code for generating an operation voltage of the semiconductor device by correcting the temporary code, based on the temporary code and a previously generated correction code.

3. 发明授权

US11315650B2 Memory system, memory controller, and method of operating memory system 有权
公开(公告)号：US11315650B2
公开(公告)日：2022-04-26
申请号：US17155655
申请日：2021-01-22
申请人： SK hynix Inc.
发明人： Ju Yong Kim , Young Gyun Kim , Ki Woong Lee
IPC分类号： G11C11/34 , G11C16/34 , G11C16/30 , G11C16/26 , G11C16/10
摘要： A memory system is provided to include a memory device and a memory controller configured to control the memory device. The memory device includes a first data latch storing information about a state of the memory cell and is configured to: execute a first verification operation and a second verification operation on the memory cell in response to receiving, from the memory controller, a suspend command to suspend a program operation being performed on the memory cell; store, in the first data latch, a temporary value obtained based on a result value of the first verification operation and a result value of the second verification operation; and execute, a resumption command to resume the program operation, a third verification operation, and restore the result value of the first verification operation and the result value of the second verification operation.

4. 发明授权

US10679705B2 Controller and operating method thereof 有权
公开(公告)号：US10679705B2
公开(公告)日：2020-06-09
申请号：US15879517
申请日：2018-01-25
申请人： SK hynix Inc.
发明人： Geu Rim Lee , Young Gyun Kim
IPC分类号： G11C16/10 , G06F11/10 , G06F12/02 , G11C7/10 , G11C16/26 , G11C16/04 , G11C11/56
摘要： A controller controls a semiconductor memory device including a plurality of memory blocks. The controller may include a controller control unit and a storing unit. The controller control unit compares the number of times of a read of an original memory block among the plurality of memory blocks with a predetermined copy generation reference value, determines whether to generate copy data of original data stored in the original memory block, and generates a command corresponding to the determination. The storage unit stores the copy generation reference value and address information about the original memory block.

5. 发明授权

US09965205B2 Data storage device performing a scramble operation and operating method thereof 有权
公开(公告)号：US09965205B2
公开(公告)日：2018-05-08
申请号：US14657711
申请日：2015-03-13
申请人： SK hynix Inc.
发明人： Young Gyun Kim , Tae Hoon Kim
IPC分类号： G06F3/06 , G06F21/00 , H04L9/06 , H04L29/06 , H04L9/00
CPC分类号： G06F3/0623 , G06F3/0604 , G06F3/064 , G06F3/0652 , G06F3/0673 , G06F3/0679 , G06F21/00 , G06F21/79 , H04L9/008 , H04L9/06 , H04L9/0618 , H04L63/0428 , H04L63/0435
摘要： A data storage device includes a conversion block suitable for performing a scramble operation on write data, and generating random write data, wherein the scramble operation includes inversion/non-inversion processing and calculation processing based on a random pattern.

6. 发明授权

US11372563B2 Storage device and operating method thereof 有权
公开(公告)号：US11372563B2
公开(公告)日：2022-06-28
申请号：US16549437
申请日：2019-08-23
申请人： SK hynix Inc.
发明人： Hyun Woo Lee , Young Gyun Kim
IPC分类号： G06F3/06 , G06F12/02
摘要： A storage device having an improved operation speed includes a memory controller for controlling a memory device. The memory controller includes a parameter data generator for generating parameter data for changing a parameter value related to an operation of the memory device, and a parameter controller for outputting the parameter data. The parameter data includes an error protection field associated with the parameter value.

7. 发明授权

US11023175B2 Semiconductor memory device including program operation status flag cells 有权
公开(公告)号：US11023175B2
公开(公告)日：2021-06-01
申请号：US16578770
申请日：2019-09-23
申请人： SK hynix Inc.
发明人： Young Gyun Kim
IPC分类号： G11C16/10 , G11C16/08 , G11C16/34 , G11C16/26 , G11C29/42 , G11C11/56 , G11C16/04 , G06F3/06
摘要： A semiconductor memory device may include: a memory cell array including a plurality of memory cells; a peripheral circuit for performing a program operation on the memory cell array; and a control logic for controlling the peripheral circuit to perform the program operation on the memory cell array. The control logic may control the peripheral circuit to perform a program operation on memory cells included in a selected physical page among the plurality memory cells, in response to a program command, and control the peripheral circuit to perform an additional program operation on at least one memory cell among the memory cells included in the selected physical page, based on whether the program operation has passed.

8. 发明申请

US20200233608A1 SEMICONDUCTOR MEMORY DEVICE, CONTROLLER, AND OPERATING METHOD THEREOF 审中-公开
公开(公告)号：US20200233608A1
公开(公告)日：2020-07-23
申请号：US16578770
申请日：2019-09-23
申请人： SK hynix Inc.
发明人： Young Gyun Kim
IPC分类号： G06F3/06 , G11C16/10 , G11C16/08 , G11C16/34 , G11C16/26 , G11C29/42
摘要： A semiconductor memory device may include: a memory cell array including a plurality of memory cells; a peripheral circuit for performing a program operation on the memory cell array; and a control logic for controlling the peripheral circuit to perform the program operation on the memory cell array. The control logic may control the peripheral circuit to perform a program operation on memory cells included in a selected physical page among the plurality memory cells, in response to a program command, and control the peripheral circuit to perform an additional program operation on at least one memory cell among the memory cells included in the selected physical page, based on whether the program operation has passed.

9. 发明授权

US09355715B1 Memory system and method of operating the same 有权
标题翻译：内存系统及其操作方法
公开(公告)号：US09355715B1
公开(公告)日：2016-05-31
申请号：US14709114
申请日：2015-05-11
申请人： SK hynix Inc.
发明人： Young Gyun Kim
IPC分类号： G11C8/12 , G11C11/56 , G11C7/10 , G11C16/10
CPC分类号： G11C11/5628 , G11C7/1021 , G11C8/12 , G11C11/5642 , G11C16/10
摘要： A memory system and a method of operating the same are provided. The method includes reading least significant bit (LSB) data of a first physical page based on a first pre-read voltage and performing a most significant bit (MSB) program based on the LSB data of the first physical page when the MSB program is performed on the first physical page, defining a management area by comparing the number of error bits included in MSB data of the first physical page with a first threshold value, preforming an LSB program on a second physical page of the management area, reading LSB data of the second physical page based on a second pre-read voltage, which is lower than the first pre-read voltage, and performing the MSB program on the second physical page based on the LSB data of the second physical page.
摘要翻译：提供了一种存储系统及其操作方法。该方法包括基于第一预读电压读取第一物理页的最低有效位（LSB）数据，并且当执行MSB程序时，基于第一物理页的LSB数据执行最高有效位（MSB）程序在第一物理页面上，通过将包含在第一物理页面的MSB数据中的错误位数与第一阈值进行比较来定义管理区域，在管理区域的第二物理页面上执行LSB程序，读取LSB数据所述第二物理页基于低于所述第一预读电压的第二预读电压，以及基于所述第二物理页的LSB数据在所述第二物理页上执行所述MSB程序。

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