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1. 发明授权

US09419748B2 Advance clocking scheme for ECC in storage 有权
标题翻译： ECC存储中的高级时钟方案
公开(公告)号：US09419748B2
公开(公告)日：2016-08-16
申请号：US14454057
申请日：2014-08-07
申请人： SK hynix memory solutions inc.
发明人： Kwok W. Yeung , Kin Man Ng , Kin Ming Chan
IPC分类号： G06F11/00 , H04L1/00 , G06F11/10 , H03M13/11 , H03M13/29 , H03M13/37 , H03M13/00 , H03M13/41
CPC分类号： H04L1/004 , G06F11/10 , H03M13/1111 , H03M13/2933 , H03M13/3715 , H03M13/3738 , H03M13/4138 , H03M13/6502 , H03M13/6508 , H04L1/005 , H04L1/0053
摘要： A system for clocking a decoder is disclosed. The system includes: a channel front end configured to receive input data, a first clock configured to provide a first clock signal as input to the channel front end, a decoder configured to receive intermediate data associated with the output of the channel front end, and a second clock configured to provide a second clock signal as input to the decoder. In some embodiments, the second clock signal is not derived from the first clock signal.
摘要翻译：公开了一种用于对解码器进行计时的系统。该系统包括：被配置为接收输入数据的通道前端，被配置为提供作为到通道前端的输入的第一时钟信号的第一时钟，被配置为接收与通道前端的输出相关联的中间数据的解码器，以及第二时钟，被配置为提供第二时钟信号作为解码器的输入。在一些实施例中，第二时钟信号不是从第一时钟信号导出的。

2. 发明申请

US20150033093A1 ADVANCE CLOCKING SCHEME FOR ECC IN STORAGE 审中-公开
标题翻译：用于存储ECC的高级时钟方案
公开(公告)号：US20150033093A1
公开(公告)日：2015-01-29
申请号：US14454057
申请日：2014-08-07
申请人： SK Hynix memory solutions inc.
发明人： Kwok W. Yeung , Kin Man Ng , Kin Ming Chan
IPC分类号： H04L1/00 , G06F11/10
CPC分类号： H04L1/004 , G06F11/10 , H03M13/1111 , H03M13/2933 , H03M13/3715 , H03M13/3738 , H03M13/4138 , H03M13/6502 , H03M13/6508 , H04L1/005 , H04L1/0053
摘要： A system for clocking a decoder is disclosed. The system includes: a channel front end configured to receive input data, a first clock configured to provide a first clock signal as input to the channel front end, a decoder configured to receive intermediate data associated with the output of the channel front end, and a second clock configured to provide a second clock signal as input to the decoder. In some embodiments, the second clock signal is not derived from the first clock signal.
摘要翻译：公开了一种用于对解码器进行计时的系统。该系统包括：被配置为接收输入数据的通道前端，被配置为提供作为到通道前端的输入的第一时钟信号的第一时钟，被配置为接收与通道前端的输出相关联的中间数据的解码器，以及第二时钟，被配置为提供第二时钟信号作为解码器的输入。在一些实施例中，第二时钟信号不是从第一时钟信号导出的。

3. 发明申请

US20140122965A1 MULTIPLE INTERLEAVERS IN A CODING SYSTEM 有权
标题翻译：编码系统中的多个交互器
公开(公告)号：US20140122965A1
公开(公告)日：2014-05-01
申请号：US14053023
申请日：2013-10-14
申请人： SK Hynix Memory Solutions Inc.
发明人： Lingqi Zeng , Yu Kou , Kin Man Ng
IPC分类号： H03M13/27
CPC分类号： H03M13/27 , H03M13/1102 , H03M13/1515 , H03M13/152 , H03M13/23 , H03M13/29 , H03M13/2957
摘要： Second interleaved data is de-interleaved using a second interleaving mapping to obtain encoded data. The second interleaved data includes a copy of constrained data in the same sequence and having the same values as the constrained data. Also, the portion of the second interleaved data that includes the copy of the constrained data satisfies a modulation constraint associated with limiting a number of consecutive events to a maximum number of consecutive events. The encoded data is decoded to obtain first interleaved data and the first interleaved data is de-interleaved using a first interleaving mapping to obtain the constrained data, a copy of which is included in the second interleaved data, where the constrained data satisfies the modulation constraint.
摘要翻译：使用第二交织映射对第二交错数据进行解交织以获得编码数据。第二交错数据包括相同序列中的约束数据的副本并且具有与受约束数据相同的值。此外，包括约束数据的副本的第二交错数据的部分满足与将连续事件的数量限制为最大数量的连续事件相关联的调制约束。编码数据被解码以获得第一交错数据，并且使用第一交织映射对第一交错数据进行解交织，以获得受限数据，其副本被包括在第二交织数据中，其中约束数据满足调制约束。

4. 发明授权

US08984364B2 Multiple interleavers in a coding system 有权
标题翻译：编码系统中的多个交织器
公开(公告)号：US08984364B2
公开(公告)日：2015-03-17
申请号：US14053023
申请日：2013-10-14
申请人： SK Hynix Memory Solutions Inc.
发明人： Lingqi Zeng , Yu Kou , Kin Man Ng
IPC分类号： H03M13/00 , H03M13/27 , H03M13/29 , H03M13/11 , H03M13/15 , H03M13/23
CPC分类号： H03M13/27 , H03M13/1102 , H03M13/1515 , H03M13/152 , H03M13/23 , H03M13/29 , H03M13/2957
摘要： Second interleaved data is de-interleaved using a second interleaving mapping to obtain encoded data. The second interleaved data includes a copy of constrained data in the same sequence and having the same values as the constrained data. Also, the portion of the second interleaved data that includes the copy of the constrained data satisfies a modulation constraint associated with limiting a number of consecutive events to a maximum number of consecutive events. The encoded data is decoded to obtain first interleaved data and the first interleaved data is de-interleaved using a first interleaving mapping to obtain the constrained data, a copy of which is included in the second interleaved data, where the constrained data satisfies the modulation constraint.
摘要翻译：使用第二交织映射对第二交错数据进行解交织以获得编码数据。第二交错数据包括相同序列中的约束数据的副本并且具有与受约束数据相同的值。此外，包括约束数据的副本的第二交错数据的部分满足与将连续事件的数量限制为最大数量的连续事件相关联的调制约束。编码数据被解码以获得第一交错数据，并且使用第一交织映射对第一交错数据进行解交织，以获得受限数据，其副本被包括在第二交织数据中，其中约束数据满足调制约束。

5. 发明授权

US08650453B2 LDPC selective decoding scheduling using a cost function 有权
标题翻译：使用成本函数的LDPC选择性解码调度
公开(公告)号：US08650453B2
公开(公告)日：2014-02-11
申请号：US13781361
申请日：2013-02-28
申请人： SK hynix memory solutions inc.
发明人： Kin Man Ng , Lingqi Zeng , Yu Kou , Kwok W. Yeung
IPC分类号： H03M13/00
CPC分类号： H03M13/05 , H03M13/114
摘要： A cost function is obtained. For each of a plurality of groups of nodes, the cost function is evaluated by obtaining, for a given group of nodes, one or more reliability values associated with the given group of nodes; the one or more reliability values include sign and magnitude. For a given group of nodes, a reliability value with a smallest magnitude is selected where the evaluated cost function for the given group of nodes is set to the smallest magnitude. One of the plurality of groups of nodes is selected based at least in part on the evaluated cost functions. Error correction decoding related processing is performed on the selected group of nodes.
摘要翻译：获得成本函数。对于多个节点组中的每一个，通过为给定的节点组获得与给定的节点组相关联的一个或多个可靠性值来评估成本函数; 一个或多个可靠性值包括符号和幅度。对于给定的节点组，选择具有最小幅度的可靠性值，其中将给定节点组的估计成本函数设置为最小量级。至少部分地基于所评估的成本函数来选择所述多个节点组中的一个。对所选择的节点组执行纠错解码相关处理。

6. 发明申请

US20130246880A1 LDPC SELECTIVE DECODING SCHEDULING USING A COST FUNCTION 有权
标题翻译：使用成本函数的LDPC选择性解码调度
公开(公告)号：US20130246880A1
公开(公告)日：2013-09-19
申请号：US13781361
申请日：2013-02-28
申请人： SK HYNIX MEMORY SOLUTIONS INC.
发明人： Kin Man Ng , Lingqi Zeng , Yu Kou , Kwok W. Yeung
IPC分类号： H03M13/05
CPC分类号： H03M13/05 , H03M13/114
摘要： A cost function is obtained. For each of a plurality of groups of nodes, the cost function is evaluated by obtaining, for a given group of nodes, one or more reliability values associated with the given group of nodes; the one or more reliability values include sign and magnitude. For a given group of nodes, a reliability value with a smallest magnitude is selected where the evaluated cost function for the given group of nodes is set to the smallest magnitude. One of the plurality of groups of nodes is selected based at least in part on the evaluated cost functions. Error correction decoding related processing is performed on the selected group of nodes.
摘要翻译：获得成本函数。对于多个节点组中的每一个，通过为给定的节点组获得与给定的节点组相关联的一个或多个可靠性值来评估成本函数; 一个或多个可靠性值包括符号和幅度。对于给定的节点组，选择具有最小幅度的可靠性值，其中将给定节点组的估计成本函数设置为最小量级。至少部分地基于所评估的成本函数来选择所述多个节点组中的一个。对所选择的节点组执行纠错解码相关处理。

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