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    • 1. 发明授权
    • Apparatus and method for decoding in mobile communication system
    • 移动通信系统中的解码装置及方法
    • US08793562B2
    • 2014-07-29
    • US12248500
    • 2008-10-09
    • Se-Hyoung KimHan-Ju Kim
    • Se-Hyoung KimHan-Ju Kim
    • G08C25/00H04L1/00H04L1/20H04L1/18
    • H04L1/1845H04L1/0053H04L1/20H04L1/201
    • An apparatus and method for reducing power consumption of a receiver by performing a Hybrid Automatic Repeat reQuest (HARQ) according to a detected decoding error are provided. The apparatus includes a decoding reliability metric generator for setting a decoding result as a decoding reliability metric, which is a reference value for determining a code block having a decoding error, based on a decoding result, a decoding reliability metric buffer for storing the decoding reliability metric set by the decoding reliability metric generator and a code block controller for, when the decoding error occurs, identifying code blocks having the decoding error by checking the decoding reliability metric and for controlling to decode the identified code blocks.
    • 提供了一种通过根据检测到的解码错误执行混合自动重复请求(HARQ)来降低接收机功耗的装置和方法。 该装置包括解码可靠性度量发生器,用于将解码结果设置为解码可靠性度量,该解码可靠性度量是用于基于解码结果确定具有解码错误的码块的参考值,用于存储解码可靠性的解码可靠性度量缓冲器 由解码可靠性度量发生器和码块控制器设置的度量,当解码错误发生时,通过检查解码可靠性度量来识别具有解码错误的码块,并用于控制解码所识别的码块。
    • 2. 发明申请
    • APPARATUS AND METHOD FOR DECODING IN MOBILE COMMUNICATION SYSTEM
    • 用于解码移动通信系统的装置和方法
    • US20090106635A1
    • 2009-04-23
    • US12248500
    • 2008-10-09
    • Se-Hyoung KimHan-Ju Kim
    • Se-Hyoung KimHan-Ju Kim
    • G06F11/07
    • H04L1/1845H04L1/0053H04L1/20H04L1/201
    • An apparatus and method for reducing power consumption of a receiver by performing a Hybrid Automatic Repeat reQuest (HARQ) according to a detected decoding error are provided. The apparatus includes a decoding reliability metric generator for setting a decoding result as a decoding reliability metric, which is a reference value for determining a code block having a decoding error, based on a decoding result, a decoding reliability metric buffer for storing the decoding reliability metric set by the decoding reliability metric generator and a code block controller for, when the decoding error occurs, identifying code blocks having the decoding error by checking the decoding reliability metric and for controlling to decode the identified code blocks.
    • 提供了一种通过根据检测到的解码错误执行混合自动重复请求(HARQ)来降低接收机功耗的装置和方法。 该装置包括解码可靠性度量发生器,用于将解码结果设置为解码可靠性度量,该解码可靠性度量是用于基于解码结果确定具有解码错误的码块的参考值,用于存储解码可靠性的解码可靠性度量缓冲器 由解码可靠性度量发生器和码块控制器设置的度量,当解码错误发生时,通过检查解码可靠性度量来识别具有解码错误的码块,并用于控制解码所识别的码块。
    • 4. 发明申请
    • Apparatus and method for decoding burst in an OFDMA mobile communication system
    • 用于在OFDMA移动通信系统中解码突发的装置和方法
    • US20070079215A1
    • 2007-04-05
    • US11519779
    • 2006-09-13
    • Han-Ju KimYoung-Mo GuDong-Woon JungMin-Goo Kim
    • Han-Ju KimYoung-Mo GuDong-Woon JungMin-Goo Kim
    • H03M13/00
    • H04L27/2647H04L1/0054H04L1/0059H04L1/0071H04L1/0072H04L1/08H04L5/023
    • A decoding apparatus in an Orthogonal Frequency Division Multiple Access (OFDMA) mobile communication system is provided. In the apparatus comprises, a first combiner performs first combining on an input burst a first number of times. A deinterleaver deinterleaves an output of the first combiner and outputs a burst having a repeated structure. A second combiner performs second combining on the burst having the repeated structure a second number of times. A decoder decodes the combined burst. A signal detector stores a second internal memory state value of the decoder for an instance where a first decoded bit is extracted from the decoded data, stores a second internal memory state value of the decoder for an instance where a last decoded bit is extracted from the decoded data, compares the first and second stored internal memory state values of the decoder, and sets a burst quality indicator (BQI) according to the comparison result.
    • 提供了一种正交频分多址(OFDMA)移动通信系统中的解码装置。 在该装置中,第一组合器在输入突发上执行第一次合并。 解交织器对第一组合器的输出进行解交织并输出具有重复结构的脉冲串。 第二组合器在具有重复结构的脉冲串上执行第二次组合第二次。 解码器解码组合突发。 信号检测器存储解码器的第二内部存储器状态值,用于从解码数据中提取第一解码位的情况,存储解码器的第二内部存储器状态值,用于从其中提取最后一个解码位的情况 解码数据,比较解码器的第一和第二存储的内部存储器状态值,并根据比较结果设置突发质量指示符(BQI)。
    • 8. 发明申请
    • Apparatus and method for decoding low density parity check codes
    • 解码低密度奇偶校验码的装置和方法
    • US20050262420A1
    • 2005-11-24
    • US11133287
    • 2005-05-20
    • Sung-Jin ParkMin-Goo KimNam YuHan-Ju Kim
    • Sung-Jin ParkMin-Goo KimNam YuHan-Ju Kim
    • H04L27/18H03M13/00H03M13/11
    • H03M13/6566H03M13/1137
    • An apparatus and method for decoding low density parity check (LDPC) codes are provided. A memory module configured by a plurality of unit memories stores a reliability value. Variable node processors perform a computation associated with a variable node, and update data of the memory module in a column direction, respectively. Check node processors perform a computation associated with a check node, and update data of the memory module in a row direction, respectively. A parity checker determines if all errors have been corrected such that an iterative decoding process is performed. A memory access control module selects a unit memory to be updated by a variable node processor or a check node processor.
    • 提供了一种用于解码低密度奇偶校验(LDPC)码的装置和方法。 由多个单元存储器构成的存储器模块存储可靠性值。 可变节点处理器执行与变量节点相关联的计算,并且分别在列方向上更新存储器模块的数据。 检查节点处理器执行与校验节点相关联的计算,并分别更新存储器模块在行方向上的数据。 奇偶校验器确定所有错误是否已经被校正,使得执行迭代解码过程。 存储器访问控制模块选择要由可变节点处理器或校验节点处理器更新的单元存储器。
    • 9. 发明授权
    • Apparatus and method for decoding burst in an OFDMA mobile communication system
    • 用于在OFDMA移动通信系统中解码突发的装置和方法
    • US07747931B2
    • 2010-06-29
    • US11519779
    • 2006-09-13
    • Han-Ju KimYoung-Mo GuDong-Woon JungMin-Goo Kim
    • Han-Ju KimYoung-Mo GuDong-Woon JungMin-Goo Kim
    • H03M13/03
    • H04L27/2647H04L1/0054H04L1/0059H04L1/0071H04L1/0072H04L1/08H04L5/023
    • A decoding apparatus in an Orthogonal Frequency Division Multiple Access (OFDMA) mobile communication system is provided. In the apparatus comprises, a first combiner performs first combining on an input burst a first number of times. A deinterleaver deinterleaves an output of the first combiner and outputs a burst having a repeated structure. A second combiner performs second combining on the burst having the repeated structure a second number of times. A decoder decodes the combined burst. A signal detector stores a second internal memory state value of the decoder for an instance where a first decoded bit is extracted from the decoded data, stores a second internal memory state value of the decoder for an instance where a last decoded bit is extracted from the decoded data, compares the first and second stored internal memory state values of the decoder, and sets a burst quality indicator (BQI) according to the comparison result.
    • 提供了一种正交频分多址(OFDMA)移动通信系统中的解码装置。 在该装置中,第一组合器在输入突发上执行第一次合并。 解交织器对第一组合器的输出进行解交织并输出具有重复结构的脉冲串。 第二组合器在具有重复结构的脉冲串上执行第二次组合第二次。 解码器解码组合突发。 信号检测器存储解码器的第二内部存储器状态值,用于从解码数据中提取第一解码位的情况,存储解码器的第二内部存储器状态值,用于从其中提取最后一个解码位的情况 解码数据,比较解码器的第一和第二存储的内部存储器状态值,并根据比较结果设置突发质量指示符(BQI)。
    • 10. 发明申请
    • Method and apparatus for efficiently decoding low density parity check code
    • 用于有效解码低密度奇偶校验码的方法和装置
    • US20060107193A1
    • 2006-05-18
    • US11247188
    • 2005-10-12
    • Sung-Jin ParkSang-Hyo KimHan-Ju KimMin-Goo Kim
    • Sung-Jin ParkSang-Hyo KimHan-Ju KimMin-Goo Kim
    • G06F11/00H03M13/00
    • H03M13/1145H03M13/1105H03M13/1111H03M13/1134H03M13/1137
    • A method and apparatus are provided for decoding a forward error correction code in a mobile communication system using a LDPC code. A check node processor performs check node processing on information received with a plurality of check nodes and an accumulator accumulates check node output values from the check node processor with previous accumulated values. An edge memory stores the check node output values, and two accumulation memories separately store accumulated values from the accumulator and the previous accumulated values. A subtractor subtracts the check node output values from the accumulated values, and a hard-decision block performs hard-decision on the received information and the output value of the subtractor. A bit buffer stores the hard-decision result, and a parity check block performs parity check on the hard-decision result to determine whether to stop iterative decoding. A multiplexer delivers the subtraction result values to both the check node processor and the hard-decision block.
    • 提供一种用于使用LDPC码对移动通信系统中的前向纠错码进行解码的方法和装置。 校验节点处理器对由多个校验节点接收的信息执行校验节点处理,并且累加器从具有先前累积值的校验节点处理器累加校验节点输出值。 边缘存储器存储校验节点输出值,并且两个累积存储器分别存储来自累加器的累加值和先前累积值。 减法器从累加值中减去校验节点输出值,硬判决块对接收到的信息和减法器的输出值进行硬判决。 位缓冲器存储硬判决结果,奇偶校验块对硬判决结果执行奇偶校验,以确定是否停止迭代解码。 多路复用器将减法结果值递送给校验节点处理器和硬判决块。