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1. 发明授权

US07747931B2 Apparatus and method for decoding burst in an OFDMA mobile communication system 有权
标题翻译：用于在OFDMA移动通信系统中解码突发的装置和方法
公开(公告)号：US07747931B2
公开(公告)日：2010-06-29
申请号：US11519779
申请日：2006-09-13
申请人： Han-Ju Kim , Young-Mo Gu , Dong-Woon Jung , Min-Goo Kim
发明人： Han-Ju Kim , Young-Mo Gu , Dong-Woon Jung , Min-Goo Kim
IPC分类号： H03M13/03
CPC分类号： H04L27/2647 , H04L1/0054 , H04L1/0059 , H04L1/0071 , H04L1/0072 , H04L1/08 , H04L5/023
摘要： A decoding apparatus in an Orthogonal Frequency Division Multiple Access (OFDMA) mobile communication system is provided. In the apparatus comprises, a first combiner performs first combining on an input burst a first number of times. A deinterleaver deinterleaves an output of the first combiner and outputs a burst having a repeated structure. A second combiner performs second combining on the burst having the repeated structure a second number of times. A decoder decodes the combined burst. A signal detector stores a second internal memory state value of the decoder for an instance where a first decoded bit is extracted from the decoded data, stores a second internal memory state value of the decoder for an instance where a last decoded bit is extracted from the decoded data, compares the first and second stored internal memory state values of the decoder, and sets a burst quality indicator (BQI) according to the comparison result.
摘要翻译：提供了一种正交频分多址（OFDMA）移动通信系统中的解码装置。在该装置中，第一组合器在输入突发上执行第一次合并。解交织器对第一组合器的输出进行解交织并输出具有重复结构的脉冲串。第二组合器在具有重复结构的脉冲串上执行第二次组合第二次。解码器解码组合突发。信号检测器存储解码器的第二内部存储器状态值，用于从解码数据中提取第一解码位的情况，存储解码器的第二内部存储器状态值，用于从其中提取最后一个解码位的情况解码数据，比较解码器的第一和第二存储的内部存储器状态值，并根据比较结果设置突发质量指示符（BQI）。

2. 发明申请

US20060107193A1 Method and apparatus for efficiently decoding low density parity check code 审中-公开
标题翻译：用于有效解码低密度奇偶校验码的方法和装置
公开(公告)号：US20060107193A1
公开(公告)日：2006-05-18
申请号：US11247188
申请日：2005-10-12
申请人： Sung-Jin Park , Sang-Hyo Kim , Han-Ju Kim , Min-Goo Kim
发明人： Sung-Jin Park , Sang-Hyo Kim , Han-Ju Kim , Min-Goo Kim
IPC分类号： G06F11/00 , H03M13/00
CPC分类号： H03M13/1145 , H03M13/1105 , H03M13/1111 , H03M13/1134 , H03M13/1137
摘要： A method and apparatus are provided for decoding a forward error correction code in a mobile communication system using a LDPC code. A check node processor performs check node processing on information received with a plurality of check nodes and an accumulator accumulates check node output values from the check node processor with previous accumulated values. An edge memory stores the check node output values, and two accumulation memories separately store accumulated values from the accumulator and the previous accumulated values. A subtractor subtracts the check node output values from the accumulated values, and a hard-decision block performs hard-decision on the received information and the output value of the subtractor. A bit buffer stores the hard-decision result, and a parity check block performs parity check on the hard-decision result to determine whether to stop iterative decoding. A multiplexer delivers the subtraction result values to both the check node processor and the hard-decision block.
摘要翻译：提供一种用于使用LDPC码对移动通信系统中的前向纠错码进行解码的方法和装置。校验节点处理器对由多个校验节点接收的信息执行校验节点处理，并且累加器从具有先前累积值的校验节点处理器累加校验节点输出值。边缘存储器存储校验节点输出值，并且两个累积存储器分别存储来自累加器的累加值和先前累积值。减法器从累加值中减去校验节点输出值，硬判决块对接收到的信息和减法器的输出值进行硬判决。位缓冲器存储硬判决结果，奇偶校验块对硬判决结果执行奇偶校验，以确定是否停止迭代解码。多路复用器将减法结果值递送给校验节点处理器和硬判决块。

3. 发明申请

US20130324117A1 METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING CONTROL INFORMATION IN WIRELESS COMMUNICATION SYSTEM 审中-公开
标题翻译：在无线通信系统中发送和接收控制信息的方法和装置
公开(公告)号：US20130324117A1
公开(公告)日：2013-12-05
申请号：US13543108
申请日：2012-07-06
申请人： Han-Ju KIM , Chae-Man LIM , Min-Goo KIM , Jong-Han LIM , Hyuk-Joon KWON , Jung-Won LEE
发明人： Han-Ju KIM , Chae-Man LIM , Min-Goo KIM , Jong-Han LIM , Hyuk-Joon KWON , Jung-Won LEE
IPC分类号： H04W48/16
摘要： Methods, a Base Station (BS), and a User Equipment (UE) in a wireless communication system for transmitting and receiving control information are provided. The method for transmitting control information by a BS in a wireless communication system includes receiving information related to a signal transmitted by a second BS that the second BS which is a neighboring BS of the first BS, determining whether a second UE using an identical resource to that used by a first UE included in a cell of the first BS exists within a cell of the second BS based on the received information, when the second UE exists, generating control information for controlling a signal transmitted to the second UE by the second BS based on the received information, and transmitting the generated control information to the first UE through a control channel.
摘要翻译：提供了一种用于发送和接收控制信息的无线通信系统中的方法，基站（BS）和用户设备（UE）。用于在无线通信系统中由BS发送控制信息的方法包括：接收与由第二BS发送的信号相关的信息，作为第一BS的相邻BS的第二BS，确定是否使用相同资源的第二UE 包括在第一BS的小区中的第一UE使用的第二UE在第二UE存在时，基于接收的信息存在于第二BS的小区内，生成用于控制由第二BS发送到第二UE的信号的控制信息基于所接收的信息，并且通过控制信道将生成的控制信息发送到第一UE。

4. 发明授权

US07631241B2 Apparatus and method for decoding low density parity check codes 有权
标题翻译：解码低密度奇偶校验码的装置和方法
公开(公告)号：US07631241B2
公开(公告)日：2009-12-08
申请号：US11133287
申请日：2005-05-20
申请人： Sung-Jin Park , Min-Goo Kim , Nam Yul Yu , Han-Ju Kim
发明人： Sung-Jin Park , Min-Goo Kim , Nam Yul Yu , Han-Ju Kim
IPC分类号： H03M13/00
CPC分类号： H03M13/6566 , H03M13/1137
摘要： An apparatus and method for decoding low density parity check (LDPC) codes are provided. A memory module configured by a plurality of unit memories stores a reliability value. Variable node processors perform a computation associated with a variable node, and update data of the memory module in a column direction, respectively. Check node processors perform a computation associated with a check node, and update data of the memory module in a row direction, respectively. A parity checker determines if all errors have been corrected such that an iterative decoding process is performed. A memory access control module selects a unit memory to be updated by a variable node processor or a check node processor.
摘要翻译：提供了一种用于解码低密度奇偶校验（LDPC）码的装置和方法。由多个单元存储器构成的存储器模块存储可靠性值。可变节点处理器执行与变量节点相关联的计算，并且分别在列方向上更新存储器模块的数据。检查节点处理器执行与校验节点相关联的计算，并分别更新存储器模块在行方向上的数据。奇偶校验器确定所有错误是否已经被校正，使得执行迭代解码过程。存储器访问控制模块选择要由可变节点处理器或校验节点处理器更新的单元存储器。

5. 发明授权

US07536623B2 Method and apparatus for generating a low-density parity check code 有权
标题翻译：用于生成低密度奇偶校验码的方法和装置
公开(公告)号：US07536623B2
公开(公告)日：2009-05-19
申请号：US11289300
申请日：2005-11-30
申请人： Sang-Hyo Kim , Han-Ju Kim , Min-Goo Kim , Young-Mo Gu
发明人： Sang-Hyo Kim , Han-Ju Kim , Min-Goo Kim , Young-Mo Gu
IPC分类号： H03M13/13
CPC分类号： H03M13/6362 , H03M13/116 , H03M13/118 , H03M13/1185 , H03M13/1188
摘要： A low density parity check (LDPC) code generating method and apparatus are provided. A parity check matrix with (N−K) rows for check nodes and N columns for variable nodes are formed to encode an information sequence of length K to a codeword of length N. The parity check matrix is divided into an information part matrix with K columns and a parity part matrix with (N−k) columns. The parity part is divided into P×P subblocks. P is a divisor of (N−K). First and second diagonals are defined in the parity part matrix and the second diagonal is a shift of the first diagonal by f subblocks. Shifted identity matrices are placed on the first and second diagonals and zero matrices are filled elsewhere. An odd number of delta matrices each having only one element of 1 are placed in one subblock column of the parity part matrix. The parity check matrix is stored.
摘要翻译：提供了一种低密度奇偶校验（LDPC）码生成方法和装置。形成具有用于校验节点的（NK）行和用于可变节点的N列的奇偶校验矩阵，以将长度为K的信息序列编码为长度为N的码字。奇偶校验矩阵被划分为具有K列的信息部分矩阵，具有（Nk）列的奇偶校验部分矩阵。奇偶校验部分分为PxP子块。 P是（N-K）的除数。在奇偶校验部分矩阵中定义第一和第二对角线，第二对角线是第一对角线由f子块的移位。移位的身份矩阵放置在第一和第二个对角线上，零矩阵填充到别处。每个仅具有1个元素的奇数数量的Δ矩阵被放置在奇偶校验部分矩阵的一个子块列中。存储奇偶校验矩阵。

6. 发明申请

US20090106635A1 APPARATUS AND METHOD FOR DECODING IN MOBILE COMMUNICATION SYSTEM 有权
标题翻译：用于解码移动通信系统的装置和方法
公开(公告)号：US20090106635A1
公开(公告)日：2009-04-23
申请号：US12248500
申请日：2008-10-09
申请人： Se-Hyoung Kim , Han-Ju Kim
发明人： Se-Hyoung Kim , Han-Ju Kim
IPC分类号： G06F11/07
CPC分类号： H04L1/1845 , H04L1/0053 , H04L1/20 , H04L1/201
摘要： An apparatus and method for reducing power consumption of a receiver by performing a Hybrid Automatic Repeat reQuest (HARQ) according to a detected decoding error are provided. The apparatus includes a decoding reliability metric generator for setting a decoding result as a decoding reliability metric, which is a reference value for determining a code block having a decoding error, based on a decoding result, a decoding reliability metric buffer for storing the decoding reliability metric set by the decoding reliability metric generator and a code block controller for, when the decoding error occurs, identifying code blocks having the decoding error by checking the decoding reliability metric and for controlling to decode the identified code blocks.
摘要翻译：提供了一种通过根据检测到的解码错误执行混合自动重复请求（HARQ）来降低接收机功耗的装置和方法。该装置包括解码可靠性度量发生器，用于将解码结果设置为解码可靠性度量，该解码可靠性度量是用于基于解码结果确定具有解码错误的码块的参考值，用于存储解码可靠性的解码可靠性度量缓冲器由解码可靠性度量发生器和码块控制器设置的度量，当解码错误发生时，通过检查解码可靠性度量来识别具有解码错误的码块，并用于控制解码所识别的码块。

7. 发明授权

US07454685B2 Method and apparatus for decoding low density parity check code using united node processing 有权
标题翻译：使用联合节点处理解码低密度奇偶校验码的方法和装置
公开(公告)号：US07454685B2
公开(公告)日：2008-11-18
申请号：US11283732
申请日：2005-11-22
申请人： Sang-Hyo Kim , Sung-Jin Park , Han-Ju Kim , Min-Goo Kim
发明人： Sang-Hyo Kim , Sung-Jin Park , Han-Ju Kim , Min-Goo Kim
IPC分类号： H03M13/00
CPC分类号： H03M13/1137 , H03M13/1114 , H03M13/114 , H03M13/116
摘要： A method and apparatus are provided for decoding an LDPC code including a plurality of check nodes and a plurality of variable nodes. The apparatus includes a check node selection scheduler that selects at least one of the check nodes, an LLR memory that stores an input LLR value for the variable nodes as an initial LLR value and stores updated LLR values for variable nodes connected to the selected check node, and a check node message memory that stores a check node message indicating a result value of check node processing on the selected check node. The apparatus further includes at least one united node processor that generates a variable node message by subtracting the check node message of the selected check node from corresponding LLR values read from the LLR memory, performs check node processing on the variable node message, calculates an LLR value updated by adding the variable node message to the check node processing result value, and delivers the calculated LLR value to the LLR memory.
摘要翻译：提供了一种解码包括多个校验节点和多个可变节点的LDPC码的方法和装置。该装置包括校验节点选择调度器，该校验节点选择调度器选择校验节点中的至少一个，将可变节点的输入LLR值存储为初始LLR值的LLR存储器，并且存储用于连接到所选校验节点的变量节点的更新的LLR值以及检查节点消息存储器，其将选择的校验节点上指示校验节点处理的结果值的校验节点消息存储。该装置还包括至少一个联合节点处理器，其通过从从LLR存储器读取的相应LLR值中减去所选择的校验节点的校验节点消息来生成变量节点消息，对变量节点消息执行校验节点处理，计算LLR 通过将变量节点消息添加到校验节点处理结果值来更新值，并将计算出的LLR值传递给LLR存储器。

8. 发明申请

US20070038922A1 Method and apparatus for efficiently decoding concatenated burst in a WiBro system 有权
标题翻译：用于在WiBro系统中有效解码级联突发的方法和装置
公开(公告)号：US20070038922A1
公开(公告)日：2007-02-15
申请号：US11495631
申请日：2006-07-31
申请人： Han-Ju Kim , Young-Mo Gu , Eun-Ok Lee
发明人： Han-Ju Kim , Young-Mo Gu , Eun-Ok Lee
IPC分类号： H03M13/00
CPC分类号： H04L1/1829 , H03M13/2975 , H03M13/2996 , H04L1/005 , H04L1/0061 , H04L1/0066 , H04L1/203 , H04L27/2601
摘要： A method and apparatus for decoding a concatenated burst in a WiBro system are provided. A concatenated decoder fragments a received burst into fragment blocks, decodes at least one of the fragment blocks, and determines whether the decoded fragment block satisfies a circular state. A concatenated decoding controller determines burst quality information of the received burst according to a circular state check result on the decoded fragment block, and determines whether to stop decoding on the received burst according to the burst quality information.
摘要翻译：提供了一种用于解码WiBro系统中的级联突发的方法和装置。连接的解码器将接收的脉冲串分段成片段块，对至少一个片段块进行解码，并且确定解码的片段块是否满足圆形状态。级联解码控制器根据解码的片段块上的循环状态检查结果来确定接收到的突发的突发质量信息，并且根据突发质量信息确定是否停止对所接收的突发的解码。

9. 发明申请

US20060123318A1 Method and apparatus for decoding low density parity check code using united node processing 有权
标题翻译：使用联合节点处理解码低密度奇偶校验码的方法和装置
公开(公告)号：US20060123318A1
公开(公告)日：2006-06-08
申请号：US11283732
申请日：2005-11-22
申请人： Sang-Hyo Kim , Sung-Jin Park , Han-Ju Kim , Min-Goo Kim
发明人： Sang-Hyo Kim , Sung-Jin Park , Han-Ju Kim , Min-Goo Kim
IPC分类号： H03M13/00
CPC分类号： H03M13/1137 , H03M13/1114 , H03M13/114 , H03M13/116
摘要： A method and apparatus are provided for decoding an LDPC code including a plurality of check nodes and a plurality of variable nodes. The apparatus includes a check node selection scheduler that selects at least one of the check nodes, an LLR memory that stores an input LLR value for the variable nodes as an initial LLR value and stores updated LLR values for variable nodes connected to the selected check node, and a check node message memory that stores a check node message indicating a result value of check node processing on the selected check node. The apparatus further includes at least one united node processor that generates a variable node message by subtracting the check node message of the selected check node from corresponding LLR values read from the LLR memory, performs check node processing on the variable node message, calculates an LLR value updated by adding the variable node message to the check node processing result value, and delivers the calculated LLR value to the LLR memory.
摘要翻译：提供了一种解码包括多个校验节点和多个可变节点的LDPC码的方法和装置。该装置包括校验节点选择调度器，该校验节点选择调度器选择校验节点中的至少一个，将可变节点的输入LLR值存储为初始LLR值的LLR存储器，并且存储用于连接到所选校验节点的变量节点的更新的LLR值以及检查节点消息存储器，其将选择的校验节点上指示校验节点处理的结果值的校验节点消息存储。该装置还包括至少一个联合节点处理器，其通过从从LLR存储器读取的相应LLR值中减去所选择的校验节点的校验节点消息来生成变量节点消息，对变量节点消息执行校验节点处理，计算LLR 通过将变量节点消息添加到校验节点处理结果值来更新值，并将计算出的LLR值传递给LLR存储器。

10. 发明授权

US09788261B2 Method and apparatus for transmitting and receiving a signal in a wireless communication system to reduce inter-cell interference 有权
公开(公告)号：US09788261B2
公开(公告)日：2017-10-10
申请号：US13543177
申请日：2012-07-06
申请人： Han-Ju Kim , Hyuk-Joon Kwon , Chae-Man Lim , Jung-Won Lee , In-Yup Kang
发明人： Han-Ju Kim , Hyuk-Joon Kwon , Chae-Man Lim , Jung-Won Lee , In-Yup Kang
IPC分类号： H04B7/00 , H04W48/12 , H04L5/00 , H04W72/00
CPC分类号： H04W48/12 , H04L5/0035 , H04L5/005 , H04L5/0073 , H04W72/00
摘要： Methods, a Base Station (BS), and a User Equipment (UE) in a wireless communication system for transmitting and receiving a signal are provided. The method for transmitting a signal by a first BS in a wireless communication system includes receiving control information including information related to transmission of a Reference Signal (RS) by one or more second BSs, from the one or more second BSs which are neighboring BSs of the first BS, and transmitting signals to a UE based on information as to a second resource identified in the received control information, wherein the second resource corresponds to an identical resource to that used by the one or more second BSs for transmitting the RS.

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