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1. 发明授权

US08018962B1 Chip-to-chip interface for 1000 BASE T gigabit physical layer device 有权
标题翻译：千兆比特物理层设备的芯片到芯片接口
公开(公告)号：US08018962B1
公开(公告)日：2011-09-13
申请号：US12723915
申请日：2010-03-15
申请人： Sehat Sutardja , William Lo
发明人： Sehat Sutardja , William Lo
IPC分类号： H04L12/56
CPC分类号： H04L47/25 , H04J3/18 , H04L12/2874 , H04L25/0262 , H04L49/3054 , H04L49/351 , H04L69/24
摘要： A physical layer interface for a switch. The physical layer interface includes an auto-negotiation circuit, a transceiver, and a serial interface. The auto-negotiation circuit is configured to negotiate a first data transmission rate with a network client. The transceiver is configured to communicate with the network client at the data transmission rate. The serializer interface is configured to communicate with a media access controller (MAC) at a second data transmission rate that is different than the first data transmission rate.
摘要翻译：交换机的物理层接口。物理层接口包括自动协商电路，收发器和串行接口。自动协商电路被配置为与网络客户端协商第一数据传输速率。收发器被配置为以数据传输速率与网络客户端进行通信。序列化器接口被配置为以与第一数据传输速率不同的第二数据传输速率与媒体接入控制器（MAC）进行通信。

2. 发明授权

US06816505B1 Chip-to-chip interface for 1000 BASE T gigabit physical layer device 失效
标题翻译：千兆比特物理层设备的芯片到芯片接口
公开(公告)号：US06816505B1
公开(公告)日：2004-11-09
申请号：US09501556
申请日：2000-02-09
申请人： Sehat Sutardja , William Lo
发明人： Sehat Sutardja , William Lo
IPC分类号： H04L1266
CPC分类号： H04L47/25 , H04J3/18 , H04L12/2874 , H04L25/0262 , H04L49/3054 , H04L49/351 , H04L69/24
摘要： A network device comprises a first integrated circuit having fabricated thereon a media access controller and a first serializer interface in communication with the media access controller. A second integrated circuit is provided comprising a physical layer interface in communication with an external device and a second serializer interface in communication with physical layer interface and the first serializer interface. The first and second serializer interfaces each comprise a fiber channel physical layer device implemented in accordance with 1000 BASE-X.
摘要翻译：网络设备包括其上制造有媒体访问控制器的第一集成电路和与媒体访问控制器通信的第一串行器接口。提供了第二集成电路，其包括与外部设备通信的物理层接口和与物理层接口和第一串行器接口通信的第二串行器接口。第一和第二串行器接口各自包括根据1000BASE-X实现的光纤通道物理层设备。

3. 发明授权

US08619571B1 Chip-to-chip interface for 1000base-T gigabit physical layer device 有权
标题翻译： 1000base-T千兆物理层设备的芯片到芯片接口
公开(公告)号：US08619571B1
公开(公告)日：2013-12-31
申请号：US13230769
申请日：2011-09-12
申请人： Sehat Sutardja , William Lo
发明人： Sehat Sutardja , William Lo
IPC分类号： H04L12/26
CPC分类号： H04L47/25 , H04J3/18 , H04L12/2874 , H04L25/0262 , H04L49/3054 , H04L49/351 , H04L69/24
摘要： A physical layer interface including an auto-negotiation circuit configured to negotiate a first data transmission rate with a network client; a transceiver configured to communicate with the network client at the first data transmission rate; and a serializer interface configured to communicate with a media access controller at a second data transmission rate that is different than the first data transmission rate. The serializer interface includes a transmitter configured to replicate data received from the network client in response to the first data transmission rate being lower than the second data transmission rate.
摘要翻译：一种物理层接口，包括被配置为与网络客户端协商第一数据传输速率的自动协商电路; 收发器，被配置为以所述第一数据传输速率与所述网络客户端进行通信; 以及串行接口，被配置为以与第一数据传输速率不同的第二数据传输速率与媒体接入控制器进行通信。串行器接口包括发射机，其被配置为响应于第一数据传输速率低于第二数据传输速率来复制从网络客户端接收的数据。

4. 发明授权

US07730349B2 Self-reparable semiconductor and method thereof 有权
标题翻译：自修复半导体及其方法
公开(公告)号：US07730349B2
公开(公告)日：2010-06-01
申请号：US12074557
申请日：2008-03-04
申请人： Sehat Sutardja , Pantas Sutardja , William Lo
发明人： Sehat Sutardja , Pantas Sutardja , William Lo
IPC分类号： G06F11/00
CPC分类号： G01R31/317 , G01R31/31718 , G01R31/3172 , G11C29/848 , H01L22/22 , H01L2924/0002 , H01L2924/00
摘要： A self-reparable semiconductor includes M functional units each including N sub-functional units. Each of the M functional units performs the same function. First ones of the N sub-functional units communicate with second ones of the N sub-functional units over a signal path that passes through third ones of the N sub-functional units. P spare sub-functional units are functionally interchangeable with P of the N sub-functional units. M, N and P are integers greater than one. Switching devices selectively replace at least one of the N sub-functional units of at least one of the M functional units with at least one of the P spare sub-functional units. Corresponding ones of the N sub-functional units of the M functional units perform the same function. The N sub-functional units within each of the M functional units perform different functions.
摘要翻译：自修复半导体包括各自包括N个子功能单元的M个功能单元。每个M个功能单元执行相同的功能。 N个子功能单元中的第一个与通过N个子功能单元中的第三个的信号路径与N个子功能单元中的第二个功能单元通信。 P个备用子功能单元与N个子功能单元的P功能上可互换。 M，N和P是大于1的整数。交换设备选择性地用至少一个P备用子功能单元替换M个功能单元中的至少一个的N个子功能单元中的至少一个。 M个功能单元的N个子功能单元中的相应的功能单元执行相同的功能。每个M个功能单元中的N个子功能单元执行不同的功能。

5. 发明授权

US07680146B1 Chip-to-chip interface for 1000 BASE T gigabit physical layer device 有权
标题翻译：千兆比特物理层设备的芯片到芯片接口
公开(公告)号：US07680146B1
公开(公告)日：2010-03-16
申请号：US11516359
申请日：2006-09-06
申请人： Sehat Sutardja , William Lo
发明人： Sehat Sutardja , William Lo
IPC分类号： H04L12/66
CPC分类号： H04L47/25 , H04J3/18 , H04L12/2874 , H04L25/0262 , H04L49/3054 , H04L49/351 , H04L69/24
摘要： An integrated circuit comprises a physical layer interface that is implemented by the integrated circuit, that is associated with a network device, and that communicates with an external device via a medium. A first serializer interface implemented by the integrated circuit communicates with the physical layer interface and with a second serializer interface associated with a medium access controller. The first serializer interface communicates with the second serializer interface at a predetermined data transmission rate that is independent of a negotiated transmission rate between the network device and the external device.
摘要翻译：集成电路包括由集成电路实现的与网络设备相关联并且经由介质与外部设备通信的物理层接口。由集成电路实现的第一串行器接口与物理层接口和与介质访问控制器相关联的第二串行器接口进行通信。第一串行器接口以与网络设备和外部设备之间协商的传输速率无关的预定数据传输速率与第二串行接口通信。

6. 发明授权

US08576865B1 Physical layer devices for network switches 有权
标题翻译：网络交换机的物理层设备
公开(公告)号：US08576865B1
公开(公告)日：2013-11-05
申请号：US13174096
申请日：2011-06-30
申请人： William Lo , Sehat Sutardja
发明人： William Lo , Sehat Sutardja
IPC分类号： H04L12/28 , H04L12/56 , H04L12/66
CPC分类号： H04L49/557 , H04L49/30
摘要： A switch includes a first IC and a second IC. The first IC includes a first set of (N+1) serializer/deserializer (SERDES) modules communicating with a first set of (N+1) SERDES modules of a switch IC; a first set of N SERDES modules communicating with a first set of N ports; and a first set of N multiplexer modules communicating with (i) the first set of N SERDES modules and (ii) the first set of (N+1) SERDES modules of the first IC. The second IC includes a second set of (N+1) SERDES modules communicating with a second set of (N+1) SERDES modules of the switch IC; a second set of N SERDES modules communicating with a second set of N ports; and a second set of N multiplexer modules communicating with (i) the second set of N SERDES modules and (ii) the second set of (N+1) SERDES modules of the second IC.
摘要翻译：开关包括第一IC和第二IC。第一IC包括与开关IC的第一组（N + 1）SERDES模块通信的第一组（N + 1）串行器/解串器（SERDES）模块; 与第一组N个端口通信的第一组N SERDES模块; 以及与（i）第一组N个SERDES模块和（ii）第一IC的第（N + 1）个SERDES模块组通信的第一组N个多路复用器模块。第二IC包括与开关IC的第（N + 1）个SERDES模块通信的第二组（N + 1）SERDES模块; 与第二组N个端口通信的第二组N SERDES模块; 以及第二组N个多路复用器模块，其与（i）第二组N个SERDES模块和（ii）第二IC的第（N + 1）个SERDES模块组通信。

7. 发明申请

US20060001669A1 Self-reparable semiconductor and method thereof 审中-公开
标题翻译：自修复半导体及其方法
公开(公告)号：US20060001669A1
公开(公告)日：2006-01-05
申请号：US11196651
申请日：2005-08-03
申请人： Sehat Sutardja , Pantas Sutardja , William Lo
发明人： Sehat Sutardja , Pantas Sutardja , William Lo
IPC分类号： G06F15/16
CPC分类号： G06F11/2033 , G01R31/318536 , G06F11/2007 , G06F11/2038 , G06F11/2041 , G11C29/848 , H01L27/14603
摘要： A self-reparable semiconductor including a graphics processing unit includes a first pixel processor that performs a first function and a first spare pixel processor. The first and first spare pixel processors are functionally interchangeable. Switching devices communicate with the first and first spare pixel processors and replace the first pixel processor with the first spare pixel processor when the first pixel processor is inoperable. A controller identifies at least one inoperable pixel processor and generates configuration data for configuring the switching devices to replace the inoperable pixel processor. Memory that is located on the self-reparable semiconductor stores the configuration data for the switching devices. A second pixel processor is functionally interchangeable with the first and first spare pixel processors. The first spare pixel processor is located one of between the first and second pixel processors or adjacent to one of the first or the second pixel processors.
摘要翻译：包括图形处理单元的自修复半导体包括执行第一功能的第一像素处理器和第一备用像素处理器。第一和第一备用像素处理器在功能上是可互换的。当第一像素处理器不可操作时，开关装置与第一和第一备用像素处理器进行通信，并用第一备用像素处理器替换第一像素处理器。控制器识别至少一个不可操作的像素处理器，并且生成用于配置切换装置以替换不可操作的像素处理器的配置数据。位于自修复半导体的存储器存储开关器件的配置数据。第二像素处理器在功能上可与第一和第一备用像素处理器互换。第一备用像素处理器位于第一和第二像素处理器之一之间或与第一或第二像素处理器之一相邻。

8. 发明授权

US08718079B1 Physical layer devices for network switches 有权
标题翻译：网络交换机的物理层设备
公开(公告)号：US08718079B1
公开(公告)日：2014-05-06
申请号：US13155085
申请日：2011-06-07
申请人： William Lo , Sehat Sutardja
发明人： William Lo , Sehat Sutardja
IPC分类号： H04L12/28 , H04L12/56 , H04J3/16 , H04J3/22 , H04J3/04
CPC分类号： H04L49/557 , H04L49/30
摘要： A first integrated circuit (IC) includes a first set of M serializer/deserializer (SERDES) modules configured to communicate with a first set of M SERDES modules of a switch IC of a switch, respectively, where M is an integer greater than 1. The first IC includes a first set of N SERDES modules configured to communicate with a first set of N ports of the switch, respectively, where N=(M−1). The first IC includes a first set of N multiplexer modules configured to communicate with (i) the N SERDES modules in the first set of N SERDES modules, respectively, and (ii) the M SERDES modules in the first set of M SERDES modules of the first IC. Each of the N multiplexer modules is configured to communicate with a pair of SERDES modules in the first set of M SERDES modules of the first IC.
摘要翻译：第一集成电路（IC）包括第一组M串行器/解串器（SERDES）模块，其被配置为分别与开关的开关IC的第一组M SERDES模块通信，其中M是大于1的整数。第一IC包括第一组N SERDES模块，其被配置为分别与开关的N个端口的第一组通信，其中N =（M-1）。第一IC包括第一组N个多路复用器模块，其被配置为分别与（i）第一组N个SERDES模块中的N个SERDES模块进行通信，以及（ii）第一组M SERDES模块中的M个SERDES模块第一个IC。 N个多路复用器模块中的每一个被配置为与第一IC的第一组M SERDES模块中的一对SERDES模块通信。

9. 发明申请

US20080215914A1 Self-reparable semiconductor and method thereof 有权
标题翻译：自修复半导体及其方法
公开(公告)号：US20080215914A1
公开(公告)日：2008-09-04
申请号：US12074557
申请日：2008-03-04
申请人： Sehat Sutardja , Pantas Sutardja , William Lo
发明人： Sehat Sutardja , Pantas Sutardja , William Lo
IPC分类号： G06F11/20
CPC分类号： G01R31/317 , G01R31/31718 , G01R31/3172 , G11C29/848 , H01L22/22 , H01L2924/0002 , H01L2924/00
摘要： A self-reparable semiconductor includes multiple functional units that perform the same function and that include sub-functional units. The semiconductor includes one or more full or partial spare functional units that are integrated into the semiconductor. If a defect in a sub-functional unit is detected, then that sub-functional unit is switched out and replaced with a sub-functional unit in the full or partial spare functional unit. The reconfiguration is realized with switching devices that are associated with the sub-functional units. Defective functional or sub-functional units can be detected after assembly, during power up, periodically during operation, and/or manually.
摘要翻译：自修复半导体包括执行相同功能并且包括子功能单元的多个功能单元。半导体包括集成到半导体中的一个或多个全部或部分备用功能单元。如果检测到子功能单元中的缺陷，那么该子功能单元被切换并且被全部或部分备用功能单元中的子功能单元替换。通过与子功能单元相关联的开关设备来实现重新配置。可以在组装，上电，定期运行和/或手动期间检测功能或子功能单元的不良。

10. 发明授权

US07173942B1 Chip-to-chip interface for 1000 base T gigabit physical layer device 有权
标题翻译：芯片到芯片接口，用于1000 Base T吉比特物理层设备
公开(公告)号：US07173942B1
公开(公告)日：2007-02-06
申请号：US10892356
申请日：2004-07-16
申请人： Sehat Sutardja , William Lo
发明人： Sehat Sutardja , William Lo
IPC分类号： H04L12/66 , H04Q7/24
CPC分类号： H04L47/25 , H04J3/18 , H04L12/2874 , H04L25/0262 , H04L49/3054 , H04L49/351 , H04L69/24
摘要： A network device includes a first integrated circuit and a second integrated circuit. The first integrated circuit includes a media access controller and a first serializer interface in communication with the media access controller. The second integrated circuit includes a physical layer interface in communication with an external device. The second integrated circuit also includes a second serializer interface in communication with the physical layer interface and the first serializer interface. The second serializer interface communicates with the first serializer interface at a predetermined data transmission rate regardless of a negotiated transmission rate between the network device and the external device.
摘要翻译：网络设备包括第一集成电路和第二集成电路。第一集成电路包括媒体访问控制器和与媒体访问控制器通信的第一串行器接口。第二集成电路包括与外部设备通信的物理层接口。第二集成电路还包括与物理层接口和第一串行器接口通信的第二串行器接口。第二串行器接口以预定的数据传输速率与第一串行器接口通信，而不管网络设备和外部设备之间的协商传输速率如何。

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