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1. 发明授权

US09543295B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09543295B2
公开(公告)日：2017-01-10
申请号：US14841773
申请日：2015-09-01
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Yoshitaka Yamamoto , Masayuki Sakakura , Tetsuhiro Tanaka , Daisuke Matsubayashi
IPC分类号： H01L27/07 , H01L29/786 , H01L27/06 , H01L49/02 , H01L23/522 , H01L27/115 , H01L21/8258
CPC分类号： H01L27/0688 , H01L21/8258 , H01L23/5223 , H01L27/1156 , H01L28/40 , H01L29/7869 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device that includes transistors with different threshold voltages is provided. Alternatively, a semiconductor device including a plurality of kinds of circuits and transistors whose electrical characteristics are different between the circuits is provided. The semiconductor device includes a first transistor and a second transistor. The first transistor includes an oxide semiconductor, a conductor, a first insulator, a second insulator, and a third insulator. The conductor has a region where the conductor and the oxide semiconductor overlap with each other. The first insulator is positioned between the conductor and the oxide semiconductor. The second insulator is positioned between the conductor and the first insulator. The third insulator is positioned between the conductor and the second insulator. The second insulator has a negatively charged region.
摘要翻译：提供了包括具有不同阈值电压的晶体管的半导体器件。或者，提供包括电路的电特性不同的多种电路和晶体管的半导体器件。半导体器件包括第一晶体管和第二晶体管。第一晶体管包括氧化物半导体，导体，第一绝缘体，第二绝缘体和第三绝缘体。导体具有导体和氧化物半导体彼此重叠的区域。第一绝缘体位于导体和氧化物半导体之间。第二绝缘体位于导体和第一绝缘体之间。第三绝缘体位于导体和第二绝缘体之间。第二绝缘体具有带负电荷的区域。

2. 发明授权

US08853697B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08853697B2
公开(公告)日：2014-10-07
申请号：US13776999
申请日：2013-02-26
申请人： Semiconductor Energy Laboratory Co., Ltd. , Sharp Kabushiki Kaisha
发明人： Kenichi Okazaki , Takuya Matsuo , Yoshitaka Yamamoto , Hiroshi Matsukizono , Yosuke Kanzaki
IPC分类号： H01L29/04 , H01L31/036 , H01L31/0376 , H01L31/20 , H01L29/786
CPC分类号： H01L29/7869 , H01L29/78603
摘要： To inhibit a metal element contained in a glass substrate from being diffused into a gate insulating film or an oxide semiconductor film. A semiconductor device includes a glass substrate, a base insulating film formed using metal oxide over the glass substrate, a gate electrode formed over the base insulating film, a gate insulating film formed over the gate electrode, an oxide semiconductor film which is formed over the gate insulating film and overlapping with the gate electrode, and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film. In a region of the base insulating film that is present in a range of 3 nm or less from a surface of the base insulating film, the concentration of a metal element contained in the glass substrate is less than or equal to 1×1018 atoms/cm3.
摘要翻译：抑制包含在玻璃基板中的金属元素扩散到栅极绝缘膜或氧化物半导体膜中。半导体器件包括玻璃衬底，在玻璃衬底上形成的使用金属氧化物的基底绝缘膜，形成在基底绝缘膜上的栅极电极，形成在栅电极上的栅极绝缘膜，形成在该绝缘膜上的氧化物半导体膜，栅极绝缘膜并与栅电极重叠，以及与氧化物半导体膜电连接的源电极和漏电极。在基极绝缘膜的与基底绝缘膜的表面存在3nm以下的范围的区域中，玻璃基板中所含的金属元素的浓度小于或等于1×1018原子/ cm3。

3. 发明授权

US09947800B2 Transistor, method for manufacturing transistor, semiconductor device, and electronic device 有权
公开(公告)号：US09947800B2
公开(公告)日：2018-04-17
申请号：US15610683
申请日：2017-06-01
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei Yamazaki , Yoshitaka Yamamoto
IPC分类号： H01L29/10 , H01L29/786 , H01L29/66 , H01L29/24 , H01L21/02 , H01L29/06 , H01L21/477
CPC分类号： H01L29/7869 , H01L21/02554 , H01L21/02565 , H01L21/0262 , H01L21/477 , H01L27/1207 , H01L27/1225 , H01L27/1255 , H01L29/0684 , H01L29/24 , H01L29/66969 , H01L29/78696 , H01L29/8611
摘要： A transistor with favorable electrical characteristics, a transistor with stable electrical characteristics, or a highly integrated semiconductor device is provided. In a top-gate transistor in which an oxide semiconductor is used for a semiconductor layer where a channel is formed, elements are introduced to the semiconductor layer in a self-aligned manner after a gate electrode is formed. After that, a side surface of the gate electrode is covered with a structure body. The structure body preferably contains silicon oxide. A first insulating layer is formed to cover the semiconductor layer, the gate electrode, and the structure body. A second insulating layer is formed by a sputtering method over the first insulating layer. Oxygen is introduced to the first insulating layer when the second insulating layer is formed.

4. 发明授权

US09312349B2 Semiconductor device and method for manufacturing semiconductor device 有权
标题翻译：半导体装置及半导体装置的制造方法
公开(公告)号：US09312349B2
公开(公告)日：2016-04-12
申请号：US14322555
申请日：2014-07-02
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Tetsuhiro Tanaka , Takayuki Inoue , Yoshitaka Yamamoto , Hideomi Suzawa , Tamae Moriwaka
IPC分类号： H01L21/00 , H01L29/423 , H01L29/49 , H01L29/786
CPC分类号： H01L29/4234 , H01L29/4908 , H01L29/7869 , H01L29/78696
摘要： To provide a semiconductor device in which the threshold value is controlled. Furthermore, to provide a semiconductor device in which a deterioration in electrical characteristics which becomes more noticeable as a transistor is miniaturized can be suppressed. The semiconductor device includes a first semiconductor film, a source electrode and a drain electrode electrically connected to the first semiconductor film, a gate insulating film, and a gate electrode in contact with the gate insulating film. The gate insulating film includes a first insulating film and a trap film, and charge is trapped in a charge trap state in an interface between the first insulating film and the trap film or inside the trap film.
摘要翻译：提供其中控制阈值的半导体器件。此外，为了提供一种半导体器件，其中可以抑制作为晶体管变得更显着的电特性的劣化小型化。半导体器件包括与栅极绝缘膜接触的第一半导体膜，与第一半导体膜电连接的栅极绝缘膜和栅电极的源电极和漏电极。栅极绝缘膜包括第一绝缘膜和陷阱膜，并且在第一绝缘膜和陷阱膜之间的界面内或捕获膜内部的电荷陷阱状态下捕获电荷。

5. 发明授权

US09685560B2 Transistor, method for manufacturing transistor, semiconductor device, and electronic device 有权
公开(公告)号：US09685560B2
公开(公告)日：2017-06-20
申请号：US15057364
申请日：2016-03-01
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei Yamazaki , Yoshitaka Yamamoto
IPC分类号： H01L29/10 , H01L29/786 , H01L29/66 , H01L29/24 , H01L21/02 , H01L29/06 , H01L21/477
CPC分类号： H01L29/7869 , H01L21/02554 , H01L21/02565 , H01L21/0262 , H01L21/477 , H01L27/1207 , H01L27/1225 , H01L27/1255 , H01L29/0684 , H01L29/24 , H01L29/66969 , H01L29/78696 , H01L29/8611
摘要： A transistor with favorable electrical characteristics, a transistor with stable electrical characteristics, or a highly integrated semiconductor device is provided. In a top-gate transistor in which an oxide semiconductor is used for a semiconductor layer where a channel is formed, elements are introduced to the semiconductor layer in a self-aligned manner after a gate electrode is formed. After that, a side surface of the gate electrode is covered with a structure body. The structure body preferably contains silicon oxide. A first insulating layer is formed to cover the semiconductor layer, the gate electrode, and the structure body. A second insulating layer is formed by a sputtering method over the first insulating layer. Oxygen is introduced to the first insulating layer when the second insulating layer is formed.

6. 发明申请

US20150179803A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20150179803A1
公开(公告)日：2015-06-25
申请号：US14571981
申请日：2014-12-16
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei Yamazaki , Akihisa Shimomura , Yuhei Sato , Yasumasa Yamane , Yoshitaka Yamamoto , Hideomi Suzawa , Tetsuhiro Tanaka , Yutaka Okazaki , Naoki Okuno , Takahisa Ishiyama
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L29/41733 , H01L29/78606 , H01L29/78696
摘要： To provide a transistor having a high on-state current. A semiconductor device includes a first insulator containing excess oxygen, a first oxide semiconductor over the first insulator, a second oxide semiconductor over the first oxide semiconductor, a first conductor and a second conductor which are over the second oxide semiconductor and are separated from each other, a third oxide semiconductor in contact with side surfaces of the first oxide semiconductor, a top surface and side surfaces of the second oxide semiconductor, a top surface of the first conductor, and a top surface of the second conductor, a second insulator over the third oxide semiconductor, and a third conductor facing a top surface and side surfaces of the second oxide semiconductor with the second insulator and the third oxide semiconductor therebetween. The first oxide semiconductor has a higher oxygen-transmitting property than the third oxide semiconductor.
摘要翻译：提供具有高导通电流的晶体管。半导体器件包括含有过量氧的第一绝缘体，在第一绝缘体上的第一氧化物半导体，第一氧化物半导体上的第二氧化物半导体，在第二氧化物半导体之上并且彼此分离的第一导体和第二导体与第一氧化物半导体的侧表面接触的第三氧化物半导体，第二氧化物半导体的顶表面和侧表面，第一导体的顶表面和第二导体的顶表面，第二绝缘体第三氧化物半导体以及与第二绝缘体和第三氧化物半导体相对的第二氧化物半导体的顶表面和侧表面的第三导体。第一氧化物半导体具有比第三氧化物半导体更高的透氧性。

7. 发明申请

US20150011048A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：US20150011048A1
公开(公告)日：2015-01-08
申请号：US14322555
申请日：2014-07-02
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Tetsuhiro Tanaka , Takayuki Inoue , Yoshitaka Yamamoto , Hideomi Suzawa , Tamae Moriwaka
IPC分类号： H01L29/66 , H01L29/423
CPC分类号： H01L29/4234 , H01L29/4908 , H01L29/7869 , H01L29/78696
摘要： To provide a semiconductor device in which the threshold value is controlled. Furthermore, to provide a semiconductor device in which a deterioration in electrical characteristics which becomes more noticeable as a transistor is miniaturized can be suppressed. The semiconductor device includes a first semiconductor film, a source electrode and a drain electrode electrically connected to the first semiconductor film, a gate insulating film, and a gate electrode in contact with the gate insulating film. The gate insulating film includes a first insulating film and a trap film, and charge is trapped in a charge trap state in an interface between the first insulating film and the trap film or inside the trap film.
摘要翻译：提供其中控制阈值的半导体器件。此外，为了提供一种半导体器件，其中可以抑制作为晶体管变得更显着的电特性的劣化小型化。半导体器件包括与栅极绝缘膜接触的第一半导体膜，与第一半导体膜电连接的栅极绝缘膜和栅电极的源电极和漏电极。栅极绝缘膜包括第一绝缘膜和陷阱膜，并且在第一绝缘膜和陷阱膜之间的界面内或捕获膜内部的电荷陷阱状态下捕获电荷。

8. 发明授权

US09882059B2 Semiconductor device 有权
公开(公告)号：US09882059B2
公开(公告)日：2018-01-30
申请号：US14571981
申请日：2014-12-16
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei Yamazaki , Akihisa Shimomura , Yuhei Sato , Yasumasa Yamane , Yoshitaka Yamamoto , Hideomi Suzawa , Tetsuhiro Tanaka , Yutaka Okazaki , Naoki Okuno , Takahisa Ishiyama
IPC分类号： H01L29/786 , H01L29/417
CPC分类号： H01L29/7869 , H01L29/41733 , H01L29/78606 , H01L29/78696
摘要： To provide a transistor having a high on-state current. A semiconductor device includes a first insulator containing excess oxygen, a first oxide semiconductor over the first insulator, a second oxide semiconductor over the first oxide semiconductor, a first conductor and a second conductor which are over the second oxide semiconductor and are separated from each other, a third oxide semiconductor in contact with side surfaces of the first oxide semiconductor, a top surface and side surfaces of the second oxide semiconductor, a top surface of the first conductor, and a top surface of the second conductor, a second insulator over the third oxide semiconductor, and a third conductor facing a top surface and side surfaces of the second oxide semiconductor with the second insulator and the third oxide semiconductor therebetween. The first oxide semiconductor has a higher oxygen-transmitting property than the third oxide semiconductor.

9. 发明授权

US09450080B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US09450080B2
公开(公告)日：2016-09-20
申请号：US14570422
申请日：2014-12-15
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei Yamazaki , Naoto Yamade , Yoshitaka Yamamoto , Hideomi Suzawa , Masayuki Sakakura , Yuhei Sato , Yasumasa Yamane
IPC分类号： H01L21/00 , H01L29/66 , H01L29/786 , H01L21/02 , H01L21/477 , H01L21/465 , H01L21/441 , H01L21/425 , H01L21/383
CPC分类号： H01L29/66969 , H01L21/02554 , H01L21/02565 , H01L21/0262 , H01L21/02631 , H01L21/383 , H01L21/425 , H01L21/441 , H01L21/465 , H01L21/477 , H01L29/78648 , H01L29/7869 , H01L29/78696
摘要： The semiconductor device is manufactured by the following method. A first oxide semiconductor film is formed over a first gate electrode and a first insulating film, oxygen is added to the first oxide semiconductor film, and then a second oxide semiconductor film is formed over the first oxide semiconductor film. Then, heat treatment is performed. Next, part of the first insulating film, part of the first oxide semiconductor film, and part of the second oxide semiconductor film are etched to form a first gate insulating film having a projection. Next, a pair of electrodes is formed over the second oxide semiconductor film, and a third oxide semiconductor film is formed over the second oxide semiconductor film and the pair of electrodes. Then, a second gate insulating film is formed over the third oxide semiconductor film, and a second gate electrode is formed over the second gate insulating film.
摘要翻译：半导体器件通过以下方法制造。在第一栅电极和第一绝缘膜上形成第一氧化物半导体膜，在第一氧化物半导体膜上添加氧，然后在第一氧化物半导体膜上形成第二氧化物半导体膜。然后进行热处理。接下来，蚀刻第一绝缘膜的一部分，第一氧化物半导体膜的一部分和第二氧化物半导体膜的一部分，以形成具有突起的第一栅极绝缘膜。接着，在第二氧化物半导体膜上形成一对电极，在第二氧化物半导体膜和一对电极上形成第三氧化物半导体膜。然后，在第三氧化物半导体膜上形成第二栅极绝缘膜，在第二栅极绝缘膜上形成第二栅电极。

10. 发明授权

US09449853B2 Method for manufacturing semiconductor device comprising electron trap layer 有权
标题翻译：用于制造包括电子陷阱层的半导体器件的方法
公开(公告)号：US09449853B2
公开(公告)日：2016-09-20
申请号：US14471766
申请日：2014-08-28
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Yoshitaka Yamamoto , Tetsuhiro Tanaka , Takayuki Inoue , Hideomi Suzawa
IPC分类号： H01L21/336 , H01L21/441 , H01L21/473 , H01L29/786 , H01L29/51 , H01L21/02 , H01L29/66 , H01L29/423 , H01L21/28 , H01L29/792 , H01L21/311 , H01L21/3213 , H01L21/465 , H01L29/49 , H01L27/12 , H01L21/316
CPC分类号： H01L29/7869 , H01L21/0214 , H01L21/02181 , H01L21/02266 , H01L21/02274 , H01L21/28194 , H01L21/28282 , H01L21/31116 , H01L21/31122 , H01L21/31645 , H01L21/32136 , H01L21/441 , H01L21/465 , H01L21/473 , H01L27/1225 , H01L29/24 , H01L29/42384 , H01L29/4908 , H01L29/517 , H01L29/66969 , H01L29/78648 , H01L29/78693 , H01L29/78696 , H01L29/792
摘要： A semiconductor device in which the threshold is adjusted is provided. In a transistor including a semiconductor, a source or drain electrode electrically connected to the semiconductor, a gate electrode, and an electron trap layer between the gate electrode and the semiconductor, the electron trap layer includes crystallized hafnium oxide. The crystallized hafnium oxide is deposited by a sputtering method using hafnium oxide as a target. When the substrate temperature is Tsub (° C.) and the proportion of oxygen in an atmosphere is P (%) in the sputtering method, P≧45−0.15×Tsub is satisfied. The crystallized hafnium oxide has excellent electron trapping properties. By the trap of an appropriate number of electrons, the threshold of the semiconductor device can be adjusted.
摘要翻译：提供其中调整阈值的半导体器件。在包括半导体，与半导体电连接的源电极或漏电极，栅电极和栅电极和半导体之间的电子捕获层的晶体管中，电子捕获层包括结晶的氧化铪。通过使用氧化铪作为靶的溅射法沉积结晶的氧化铪。溅射法中，衬底温度为Tsub（℃），气氛中氧的比例为P（％）时，P≥45〜0.15×Tsub。结晶的氧化铪具有优异的电子捕获性能。通过适当数量的电子的陷阱，可以调整半导体器件的阈值。

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