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1. 发明申请

US20110291157A1 LATERAL INSULATED GATE BIPOLAR TRANSISTOR 审中-公开
标题翻译：横向绝缘门双极晶体管
公开(公告)号：US20110291157A1
公开(公告)日：2011-12-01
申请号：US13114148
申请日：2011-05-24
申请人： Shigeki TAKAHASHI , Norihito Tokura , Satoshi Shiraki , Youichi Ashida , Akio Nakagawa
发明人： Shigeki TAKAHASHI , Norihito Tokura , Satoshi Shiraki , Youichi Ashida , Akio Nakagawa
IPC分类号： H01L29/739
CPC分类号： H01L29/7393 , H01L29/0696 , H01L29/0834 , H01L29/1095 , H01L29/405 , H01L29/7394
摘要： A lateral insulated gate bipolar transistor includes a semiconductor substrate including a drift layer, a collector region, a channel layer, an emitter region, a gate insulating layer, a gate electrode, a collector electrode, an emitter electrode, and a barrier layer. The barrier layer is disposed along either side of the collector region and is located to a depth deeper than a bottom of the channel layer. The barrier layer has an impurity concentration that is higher than an impurity concentration of the drift layer. The barrier layer has a first end close to the collector region and a second end far from the collector region. The first end is located between the channel layer and the collector region, and the second end is located on the bottom of the channel layer.
摘要翻译：横向绝缘栅双极晶体管包括包括漂移层，集电极区域，沟道层，发射极区域，栅极绝缘层，栅电极，集电极，发射极和阻挡层的半导体衬底。阻挡层沿着集电极区域的两侧设置，并且位于比通道层的底部更深的深度。阻挡层的杂质浓度高于漂移层的杂质浓度。阻挡层具有靠近集电极区域的第一端和远离集电极区域的第二端。第一端位于沟道层和集电极区之间，第二端位于沟道层的底部。

2. 发明申请

US20120074511A1 MAGNETIC MEMORY AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：磁记忆及其制造方法
公开(公告)号：US20120074511A1
公开(公告)日：2012-03-29
申请号：US13231894
申请日：2011-09-13
申请人： Shigeki TAKAHASHI , Yuichi OHSAWA , Junichi ITO , Chikayoshi KAMATA , Saori KASHIWADA , Minoru AMANO , Hiroaki YODA
发明人： Shigeki TAKAHASHI , Yuichi OHSAWA , Junichi ITO , Chikayoshi KAMATA , Saori KASHIWADA , Minoru AMANO , Hiroaki YODA
IPC分类号： H01L27/22 , H01L43/12 , H01L43/02
CPC分类号： H01L43/12 , H01L27/228 , H01L43/08 , H01L43/10
摘要： A magnetic memory according to an embodiment includes: at least one memory cell comprising a magnetoresistive element as a memory element, and first and second electrodes that energize the magnetoresistive element. The magnetoresistive element includes: a first magnetic layer having a variable magnetization direction perpendicular to a film plane; a tunnel barrier layer on the first magnetic layer; and a second magnetic layer on the tunnel barrier layer, and having a fixed magnetization direction perpendicular to the film plane. The first magnetic layer including: a first region; and a second region outside the first region so as to surround the first region, and having a smaller perpendicular magnetic anisotropy energy than that of the first region. The second magnetic layer including: a third region; and a fourth region outside the third region, and having a smaller perpendicular magnetic anisotropy energy than that of the third region.
摘要翻译：根据实施例的磁存储器包括：包括作为存储元件的磁阻元件的至少一个存储单元，以及激励磁阻元件的第一和第二电极。磁阻元件包括：具有与膜平面垂直的可变磁化方向的第一磁性层; 在第一磁性层上的隧道阻挡层; 以及隧道势垒层上的第二磁性层，并且具有与膜平面垂直的固定的磁化方向。所述第一磁性层包括：第一区域; 以及围绕第一区域的第一区域外的第二区域，并且具有比第一区域小的垂直磁各向异性能量。第二磁性层包括：第三区域; 以及第三区域外的第四区域，并且具有比第三区域小的垂直磁各向异性能量。

3. 发明申请

US20100078763A1 RESISTANCE-CHANGE MEMORY HAVING RESISTANCE-CHANGE ELEMENT AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：具有电阻变化元件的电阻变化记忆及其制造方法
公开(公告)号：US20100078763A1
公开(公告)日：2010-04-01
申请号：US12559446
申请日：2009-09-14
申请人： Keiji HOSOTANI , Yoshiaki ASAO , Kuniaki SUGIURA , Masatoshi YOSHIKAWA , Sumio IKEGAWA , Shigeki TAKAHASHI , Minoru AMANO
发明人： Keiji HOSOTANI , Yoshiaki ASAO , Kuniaki SUGIURA , Masatoshi YOSHIKAWA , Sumio IKEGAWA , Shigeki TAKAHASHI , Minoru AMANO
IPC分类号： H01L29/86 , H01L21/8239
CPC分类号： H01L43/08 , G11C11/161
摘要： A resistance-change memory includes an interlayer insulating film, a lower electrode layer, a fixed layer, a first insulating film, a recording layer, a second insulating film, a conducting layer and an interconnect. The interlayer insulating film is formed on a semiconductor substrate and has a step. The lower electrode layer is formed on the interlayer insulating film including the step. The fixed layer is formed on the lower electrode layer and has invariable magnetization. The first insulating film is formed on the fixed layer. The recording layer is formed on part of the first insulating film and has variable magnetization. The second insulating film is over the recording layer and in contact with the first insulating film. The conducting layer is formed on the second insulating film. The interconnect is connected to the conducting layer.
摘要翻译：电阻变化存储器包括层间绝缘膜，下电极层，固定层，第一绝缘膜，记录层，第二绝缘膜，导电层和互连。层间绝缘膜形成在半导体基板上并具有台阶。包括该步骤的层间绝缘膜上形成下电极层。固定层形成在下电极层上，具有不变的磁化。第一绝缘膜形成在固定层上。记录层形成在第一绝缘膜的一部分上并且具有可变的磁化强度。第二绝缘膜在记录层上方并与第一绝缘膜接触。导电层形成在第二绝缘膜上。互连连接到导电层。

4. 发明申请

US20090296830A1 SIGNAL RECEIVER FOR RECEIVING DIFFERENTIAL SIGNAL VIA TRANSMISSION LINE 有权
标题翻译：用于通过传输线接收差分信号的信号接收器
公开(公告)号：US20090296830A1
公开(公告)日：2009-12-03
申请号：US12389691
申请日：2009-02-20
申请人： Youichirou SUZUKI , Noboru MAEDA , Shigeki TAKAHASHI , Koji KONDO , Kazuyoshi NAGASE , Takahisa KOYASU
发明人： Youichirou SUZUKI , Noboru MAEDA , Shigeki TAKAHASHI , Koji KONDO , Kazuyoshi NAGASE , Takahisa KOYASU
IPC分类号： H04B3/00
CPC分类号： H04M3/18 , H04L25/0272 , H04L25/0292 , H04L25/085
摘要： A signal receiver includes: a receiving circuit that receives a differential signal via a transmission line, which includes a pair of signal wires for transmitting the differential signal; and an impedance control circuit that controls an input impedance so as to reduce a common mode noise. The impedance control circuit includes a detection element for detecting at least one of a voltage, a current and an electric power of the common mode noise. The impedance control circuit controls the input impedance in accordance with change of the at least one of the voltages the current and the electric power of the common mode noise.
摘要翻译：信号接收机包括：接收电路，经由传输线接收差分信号，该传输线包括用于发送差分信号的一对信号线; 以及阻抗控制电路，其控制输入阻抗以减小共模噪声。阻抗控制电路包括用于检测共模噪声的电压，电流和电功率中的至少一个的检测元件。阻抗控制电路根据共模噪声的电流和电功率的至少一个电压的变化来控制输入阻抗。

5. 发明申请

US20120230091A1 MAGNETIC MEMORY 有权
标题翻译：磁记忆
公开(公告)号：US20120230091A1
公开(公告)日：2012-09-13
申请号：US13426139
申请日：2012-03-21
申请人： Satoshi YANAGI , Eiji KITAGAWA , Masahiko NAKAYAMA , Jyunichi OZEKI , Hisanori AIKAWA , Naoharu SHIMOMURA , Masatoshi YOSHIKAWA , Minoru AMANO , Shigeki TAKAHASHI , Hiroaki YODA
发明人： Satoshi YANAGI , Eiji KITAGAWA , Masahiko NAKAYAMA , Jyunichi OZEKI , Hisanori AIKAWA , Naoharu SHIMOMURA , Masatoshi YOSHIKAWA , Minoru AMANO , Shigeki TAKAHASHI , Hiroaki YODA
IPC分类号： H01L29/82 , G11C11/15
CPC分类号： H01L27/228 , B82Y25/00 , G11C11/161 , H01F10/3254 , H01F10/3286 , H01L43/08
摘要： According to one embodiment, a magnetic memory includes at least one memory cell including a magnetoresistive element, and first and second electrodes. The element includes a first magnetic layer, a tunnel barrier layer, a second magnetic layer, and a third magnetic layer provided on the second magnetic layer and having a magnetization antiparallel to the magnetization direction of the second magnetic layer. A diameter of an upper surface of the first magnetic layer is smaller than that of a lower surface of the tunnel barrier layer. A diameter of a lower surface of the second magnetic layer is not more than that of an upper surface of the tunnel barrier layer.
摘要翻译：根据一个实施例，磁存储器包括至少一个包括磁阻元件的存储单元以及第一和第二电极。元件包括第一磁性层，隧道势垒层，第二磁性层和设置在第二磁性层上并且具有与第二磁性层的磁化方向反平行的磁化的第三磁性层。第一磁性层的上表面的直径小于隧道势垒层的下表面的直径。第二磁性层的下表面的直径不大于隧道势垒层的上表面的直径。

6. 发明申请

US20110084730A1 TRANSMISSION APPARATUS FOR DIFFERENTIAL COMMUNICATION 有权
标题翻译：传输装置用于差分通信
公开(公告)号：US20110084730A1
公开(公告)日：2011-04-14
申请号：US12902255
申请日：2010-10-12
申请人： Youichirou SUZUKI , Noboru MAEDA , Shigeki TAKAHASHI , Takahisa KOYASU , Kazuyoshi NAGASE , Tomohisa KISHIGAMI
发明人： Youichirou SUZUKI , Noboru MAEDA , Shigeki TAKAHASHI , Takahisa KOYASU , Kazuyoshi NAGASE , Tomohisa KISHIGAMI
IPC分类号： H03K19/0175
CPC分类号： H04L25/0278 , H04L25/028
摘要： A transmission apparatus for differential communication includes a driver bridge circuit and a pair of noise protection circuits. The driver bridge circuit includes four output devices that are independently connected between each of a pair of transmission lines and a power line or a ground line. Each noise protection circuit is provided to a corresponding transmission lines. Each noise protection circuit includes a ground potential detector and an impedance controller. The ground potential detector detects a potential of the corresponding transmission line with respect to the ground line. The impedance controller causes an impedance of the corresponding transmission line with respect to the ground line to become equal to an impedance of the other transmission line with respect to the ground line, when the detected potential becomes outside a predetermined potential range.
摘要翻译：用于差分通信的传输装置包括驱动器桥电路和一对噪声保护电路。驱动器桥电路包括独立地连接在一对传输线中的每一个与电源线或接地线之间的四个输出装置。每个噪声保护电路提供给相应的传输线。每个噪声保护电路包括接地电位检测器和阻抗控制器。接地电位检测器检测相对于接地线的相应传输线的电位。当检测到的电位超出预定电位范围时，阻抗控制器使对应的传输线相对于接地线的阻抗变得等于另一条传输线相对于接地线的阻抗。

7. 发明申请

US20110053518A1 WIRELESS COMMUNICATION PERFORMANCE TEST METHOD, WIRELESS COMMUNICATION TEST-USE MEASUREMENT DEVICE, AND WIRELESS COMMUNICATION PERFORMANCE TEST SYSTEM 审中-公开
标题翻译：无线通信性能测试方法，无线通信测试使用测量设备和无线通信性能测试系统
公开(公告)号：US20110053518A1
公开(公告)日：2011-03-03
申请号：US12869030
申请日：2010-08-26
申请人： Noriaki SHINDO , Shigeki TAKAHASHI , Akio SASAKI , Mitsuhiko MANPO , Kunifumi TAMACHI
发明人： Noriaki SHINDO , Shigeki TAKAHASHI , Akio SASAKI , Mitsuhiko MANPO , Kunifumi TAMACHI
IPC分类号： H04W24/00
CPC分类号： H04W24/06 , H04B17/0085
摘要： A wireless communication performance test method for testing a performance of a wireless processor which is arranged in a wireless transmission device for performing a transmission and reception operation of a wireless signal, includes operations of transmitting, performing, and measuring. The operation of transmitting is for transmitting, to the wireless processor, a wireless signal including control information for controlling the transmission and reception operation performed by the wireless processor from a wireless transmission test use measurement device for measuring a wireless transmission performance of the wireless processor. The operation of performing is for performing the transmission and reception operation in the wireless processor based on the control information extracted from the wireless signal transmitted from the wireless transmission test use measurement device. The operation of measuring is for measuring the wireless signal transmitted and received in the transmission and reception operation performed by the wireless processor.
摘要翻译：一种无线通信性能测试方法，用于测试布置在用于执行无线信号的发送和接收操作的无线传输设备中的无线处理器的性能，包括发送，执行和测量的操作。发送操作是用于向无线处理器发送无线信号，该无线信号包括用于测量无线处理器的无线传输性能的无线传输测试使用测量设备来控制由无线处理器执行的发送和接收操作的控制信息。执行操作是基于从无线传输测试用测量设备发送的无线信号中提取的控制信息在无线处理器中执行发送和接收操作。测量的操作是用于测量由无线处理器执行的发送和接收操作中发送和接收的无线信号。

8. 发明申请

US20170330668A1 PERPENDICULAR MAGNETIC LAYER AND MAGNETIC DEVICE INCLUDING THE SAME 审中-公开
公开(公告)号：US20170330668A1
公开(公告)日：2017-11-16
申请号：US15591348
申请日：2017-05-10
申请人： Shigeki TAKAHASHI , Yoshiaki SONOBE , Hiroaki SUKEGAWA , Hwachol LEE , Kazuhiro HONO , Seiji MITANI , Jun LIU
发明人： Shigeki TAKAHASHI , Yoshiaki SONOBE , Hiroaki SUKEGAWA , Hwachol LEE , Kazuhiro HONO , Seiji MITANI , Jun LIU
IPC分类号： H01F10/12 , H01L43/08 , H01F10/06 , H01F10/26 , H01L43/12 , H01L43/10
CPC分类号： H01F10/12 , H01F10/06 , H01F10/123 , H01F10/26 , H01F10/30 , H01F10/3254 , H01F10/3286 , H01L43/08 , H01L43/10 , H01L43/12
摘要： Embodiments of the inventive concepts provide a flat perpendicular magnetic layer having a low saturation magnetization and a perpendicular magnetization-type tunnel magnetoresistive element using the same. The perpendicular magnetic layer is a nitrogen-poor (Mn1−xGax)Ny layer (0

9. 发明申请

US20130029431A1 METHOD FOR MANUFACTURING NONVOLATILE MEMORY DEVICE 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US20130029431A1
公开(公告)日：2013-01-31
申请号：US13534673
申请日：2012-06-27
申请人： Shigeki TAKAHASHI , Kyoichi SUGURO , Junichi ITO , Yuichi OHSAWA , Hiroaki YODA
发明人： Shigeki TAKAHASHI , Kyoichi SUGURO , Junichi ITO , Yuichi OHSAWA , Hiroaki YODA
IPC分类号： H01L21/306
CPC分类号： H01L43/12
摘要： According to one embodiment, a method for manufacturing a nonvolatile memory device including a plurality of memory cells is disclosed. Each of the plurality of memory cells includes a base layer including a first electrode, a magnetic tunnel junction device provided on the base layer, and a second electrode provided on the magnetic tunnel junction device. The magnetic tunnel junction device includes a first magnetic layer, a tunneling barrier layer provided on the first magnetic layer, and a second magnetic layer provided on the tunneling barrier layer. The method can include etching a portion of the second magnetic layer and a portion of the first magnetic layer by irradiating gas clusters onto a portion of a surface of the second magnetic layer or a portion of a surface of the first magnetic layer.
摘要翻译：根据一个实施例，公开了一种用于制造包括多个存储单元的非易失性存储器件的方法。多个存储单元中的每一个包括基底层，其包括第一电极，设置在基底层上的磁性隧道结器件和设置在磁性隧道结装置上的第二电极。磁隧道结装置包括第一磁性层，设置在第一磁性层上的隧道势垒层，以及设置在隧道势垒层上的第二磁性层。该方法可以包括通过将气体簇照射到第二磁性层的表面的一部分或第一磁性层的表面的一部分上来蚀刻第二磁性层的一部分和第一磁性层的一部分。

10. 发明申请

US20100197044A1 METHOD OF MANUFACTURING A MAGNETIC RANDOM ACCESS MEMORY, METHOD OF MANUFACTURING AN EMBEDDED MEMORY, AND TEMPLATE 有权
标题翻译：制造磁性随机存取存储器的方法，制造嵌入式存储器的方法和模板
公开(公告)号：US20100197044A1
公开(公告)日：2010-08-05
申请号：US12699721
申请日：2010-02-03
申请人： Takeshi KAJIYAMA , Yoshiaki ASAO , Minoru AMANO , Shigeki TAKAHASHI , Masayoshi IWAYAMA , Kuniaki SUGIURA
发明人： Takeshi KAJIYAMA , Yoshiaki ASAO , Minoru AMANO , Shigeki TAKAHASHI , Masayoshi IWAYAMA , Kuniaki SUGIURA
IPC分类号： H01L21/28 , B28B17/00
CPC分类号： H01L43/12 , G11C11/161 , H01L27/228
摘要： A magnetic material of a magnetoresistive element is formed on a lower electrode. An upper electrode is formed on the magnetic material. A resist for nano-imprint lithography is formed on the upper electrode. A first pattern or a second pattern is formed in the resist by setting a first template or a second template into contact with the resist and curing the resist. The first template has the first pattern that corresponds to the magnetoresistive element and the lower electrode. The second template has the second pattern that corresponds to the magnetoresistive element and the upper electrode. The magnetic material and the lower electrode are patterned at the same time by using the resist having the first pattern, or the magnetic material and the upper electrode are patterned at the same time by using the resist having the second pattern.
摘要翻译：磁阻元件的磁性材料形成在下电极上。在磁性材料上形成上部电极。在上电极上形成用于纳米压印光刻的抗蚀剂。通过将第一模板或第二模板与抗蚀剂接触并固化抗蚀剂，在抗蚀剂中形成第一图案或第二图案。第一模板具有对应于磁阻元件和下电极的第一图案。第二模板具有对应于磁阻元件和上电极的第二图案。通过使用具有第一图案的抗蚀剂，同时对磁性材料和下电极进行图案化，或者通过使用具有第二图案的抗蚀剂同时对磁性材料和上部电极进行图案化。

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