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    • 3. 发明申请
    • SEMICONDUCTOR DEVICE HAVING LATERAL DIODE
    • 具有横向二极管的半导体器件
    • US20120032313A1
    • 2012-02-09
    • US13197719
    • 2011-08-03
    • Takao YAMAMOTONorihito TokuraHisato KatoAkio Nakagawa
    • Takao YAMAMOTONorihito TokuraHisato KatoAkio Nakagawa
    • H01L29/861
    • H01L29/868H01L27/0664H01L29/0615H01L29/0692H01L29/0878H01L29/1095H01L29/405H01L29/42368H01L29/7394H01L29/7824
    • A semiconductor device having a lateral diode includes a semiconductor layer, a first semiconductor region in the semiconductor layer, a contact region having an impurity concentration greater than that of the first semiconductor region, a second semiconductor region located in the semiconductor layer and separated from the contact region, a first electrode electrically connected through the contact region to the first semiconductor region, and a second electrode electrically connected to the second semiconductor region. The second semiconductor region includes a low impurity concentration portion, a high impurity concentration portion, and an extension portion. The second electrode forms an ohmic contact with the high impurity concentration portion. The extension portion has an impurity concentration greater than that of the low impurity concentration portion and extends in a thickness direction of the semiconductor layer.
    • 具有横向二极管的半导体器件包括半导体层,半导体层中的第一半导体区域,具有大于第一半导体区域的杂质浓度的杂质浓度的接触区域,位于半导体层中并与该半导体层分离的第二半导体区域 接触区域,通过接触区域电连接到第一半导体区域的第一电极和与第二半导体区域电连接的第二电极。 第二半导体区域包括低杂质浓度部分,高杂质浓度部分和延伸部分。 第二电极与高杂质浓度部分形成欧姆接触。 延伸部分的杂质浓度大于低杂质浓度部分的杂质浓度,并且在半导体层的厚度方向上延伸。
    • 6. 发明授权
    • Trench-gated MOSFET including schottky diode therein
    • 沟槽栅MOSFET,其中包括肖特基二极管
    • US07564097B2
    • 2009-07-21
    • US11740045
    • 2007-04-25
    • Syotaro OnoAkio NakagawaYusuke KawaguchiYoshihiro Yamaguchi
    • Syotaro OnoAkio NakagawaYusuke KawaguchiYoshihiro Yamaguchi
    • H01L29/94
    • H01L29/7813H01L29/1095
    • Disclosed is a trench MOSFET, including: a trench gate structure having a gate electrode and a gate insulating film; an n-type diffusion layer formed to face the gate electrode via the gate insulating film at an upper portion of the trench; a p-type base layer formed to face the gate electrode via the gate insulating film at a lower portion than the upper portion; an n-type epitaxial layer locating to face the gate electrode via the gate insulating film at a further lower portion than the lower portion; a metal layer formed departing from the trench in parallel with a depth direction of the trench, penetrating the n-type diffusion layer and the p-type base layer, to reach the n-type epitaxial layer; and a p-type layer with higher impurity concentration than the p-type base layer, locating to be in contact with the p-type base layer and the metal layer.
    • 公开了一种沟槽MOSFET,其包括:具有栅极电极和栅极绝缘膜的沟槽栅极结构; 形成为在沟槽的上部经由栅极绝缘膜与栅电极对置的n型扩散层; p型基底层,其在比上部更低的一部分处经由栅极绝缘膜形成为面对栅电极; n型外延层,其定位成在比下部更下方的一部分经由栅极绝缘膜面对栅电极; 与沟槽的深度方向平行地形成的穿过n型扩散层和p型基底层的金属层,以到达n型外延层; 以及比p型基底层高的杂质浓度的p型层,与p型基底层和金属层接触。
    • 8. 发明授权
    • Semiconductor device with horizontal MOSFET and Schottky barrier diode provided on single substrate
    • 在单个基板上提供具有水平MOSFET和肖特基势垒二极管的半导体器件
    • US07432579B2
    • 2008-10-07
    • US10959201
    • 2004-10-07
    • Tomoko MatsudaiKazutoshi NakamuraAkio Nakagawa
    • Tomoko MatsudaiKazutoshi NakamuraAkio Nakagawa
    • H01L29/47H01L29/872
    • H01L27/0727
    • A MOS field-effect transistor includes a semiconductor substrate of a first-conductivity type, a semiconductor layer of the first-conductivity type, a source region of a second-conductivity type, a first drain region of the second-conductivity type, a resurf layer of the second-conductivity type provided in the surface of the semiconductor layer between the source region and the first drain region in contact with the first drain region, and having a lower impurity concentration than the first drain region, a gate insulation film, and a gate electrode provided on the gate insulation film between the source region and resurf layer. A Schottky barrier diode includes a second drain region of the second-conductivity type provided in the surface of the semiconductor layer separate from the first drain region in a direction away from the gate electrode, and a Schottky electrode provided on the semiconductor layer between the first and second drain regions.
    • MOS场效应晶体管包括第一导电类型的半导体衬底,第一导电类型的半导体层,第二导电类型的源极区域,第二导电类型的第一漏极区域,第二导电类型的半导体层, 所述第二导电型层设置在与所述第一漏极区域接触的所述源极区域和所述第一漏极区域之间的所述半导体层的表面中,并且具有比所述第一漏极区域低的杂质浓度,栅极绝缘膜和 栅电极,设置在源极区域和复合层之间的栅极绝缘膜上。 肖特基势垒二极管包括设置在半导体层的表面上的第二导电类型的第二漏极区域,该第二漏极区域在远离栅极电极的方向上与第一漏极区域分开,以及肖特基电极,设置在第一 和第二漏区。
    • 9. 发明申请
    • INSULATED GATE BIPOLAR TRANSISTOR AND METHOD FOR MANUFACTURING SAME
    • 绝缘栅双极晶体管及其制造方法
    • US20070290237A1
    • 2007-12-20
    • US11763558
    • 2007-06-15
    • Akio NAKAGAWA
    • Akio NAKAGAWA
    • H01L29/80
    • H01L29/7397H01L29/0834H01L29/36
    • An insulated gate bipolar transistor has a p-type emitter layer; an n-type buffer layer provided on the p-type emitter layer; an n-type base layer provided on the n-type buffer layer and having a higher resistivity than the n-type buffer layer; a p-type base layer provided in part of an upper surface of the n-type base layer; an n-type source layer provided in part of an upper surface of the p-type base layer; a trench extending through the n-type source layer and the p-type base layer to the n-type base layer; a gate electrode provided in the trench; and a gate insulating film provided between the gate electrode and an inner surface of the trench. The p-type emitter layer has a thickness of 5 to 50 μm and a dopant concentration of 2×1016 to 1×1018 cm−3.
    • 绝缘栅双极晶体管具有p型发射极层; 设置在p型发射极层上的n型缓冲层; 设置在n型缓冲层上并具有比n型缓冲层更高的电阻率的n型基极层; 设置在n型基底层的上表面的一部分的p型基底层; 设置在p型基底层的上表面的一部分的n型源极层; 通过n型源极层和p型基极层延伸到n型基极层的沟槽; 设置在沟槽中的栅电极; 以及栅极绝缘膜,设置在所述栅电极和所述沟槽的内表面之间。 p型发射极层的厚度为5〜50μm,掺杂剂浓度为2×10 16〜1×10 8 cm -3以下。