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1. 发明授权

US09451193B2 Electronic apparatus, control method, and image sensor 有权
标题翻译：电子设备，控制方法和图像传感器
公开(公告)号：US09451193B2
公开(公告)日：2016-09-20
申请号：US14165715
申请日：2014-01-28
申请人： Sony Corporation
发明人： Yuuki Yamagata , Shizunori Matsumoto
IPC分类号： H04N5/378 , H04N5/351 , H04N5/359
CPC分类号： H04N5/378 , H04N5/351 , H04N5/3598
摘要： An electronic apparatus includes: a reference-signal output section that outputs a reference signal; a comparator that compares an electrical signal output from a pixel with the reference signal; a counter that obtains a count value as an AD conversion result of the electrical signal, the count value being obtained by counting time taken for the reference signal to change until the electrical signal and the reference signal match each other; and an auto-zero control section that performs control so that auto zero processing for setting the comparator is completed in a reset period, in which the pixel is reset, so that a comparison result indicating that two input signals supplied to the comparator match each other.
摘要翻译：电子设备包括：参考信号输出部分，其输出参考信号; 比较器，将来自像素的电信号与参考信号进行比较; 获得作为电信号的AD转换结果的计数值的计数器，所述计数值是通过对所述参考信号进行改变直到所述电信号和所述参考信号彼此匹配来计算时间而获得的; 以及自动归零控制部，其进行控制，使得在复位周期中完成用于设置比较器的自动零处理，其中像素被复位，使得指示提供给比较器的两个输入信号的比较结果彼此匹配。

2. 发明申请

US20140240568A1 ELECTRONIC APPARATUS, CONTROL METHOD, AND IMAGE SENSOR 有权
标题翻译：电子设备，控制方法和图像传感器
公开(公告)号：US20140240568A1
公开(公告)日：2014-08-28
申请号：US14165715
申请日：2014-01-28
申请人： Sony Corporation
发明人： Yuuki Yamagata , Shizunori Matsumoto
IPC分类号： H04N5/378 , H04N5/374 , H04N5/372
CPC分类号： H04N5/378 , H04N5/351 , H04N5/3598
摘要： An electronic apparatus includes: a reference-signal output section that outputs a reference signal; a comparator that compares an electrical signal output from a pixel with the reference signal; a counter that obtains a count value as an AD conversion result of the electrical signal, the count value being obtained by counting time taken for the reference signal to change until the electrical signal and the reference signal match each other; and an auto-zero control section that performs control so that auto zero processing for setting the comparator is completed in a reset period, in which the pixel is reset, so that a comparison result indicating that two input signals supplied to the comparator match each other.
摘要翻译：电子设备包括：参考信号输出部分，其输出参考信号; 比较器，将来自像素的电信号与参考信号进行比较; 获得作为电信号的AD转换结果的计数值的计数器，所述计数值是通过对所述参考信号进行改变直到所述电信号和所述参考信号彼此匹配来计算时间而获得的; 以及自动归零控制部，其进行控制，使得在复位周期中完成用于设置比较器的自动零处理，其中像素被复位，使得指示提供给比较器的两个输入信号的比较结果彼此匹配。

3. 发明授权

US10484634B2 Image pickup element, control method, and image pickup device 有权
公开(公告)号：US10484634B2
公开(公告)日：2019-11-19
申请号：US15119636
申请日：2015-02-24
申请人： SONY CORPORATION
发明人： Naoki Kawazu , Atsushi Suzuki , Takashi Shoji , Masashi Akamatsu , Nobutaka Shimamura , Hayato Wakabayashi , Yuuki Yamagata , Norihiro Nikai , Tohru Kikawada , Takumi Oka , Toshiki Kainuma
IPC分类号： H04N5/374 , H04N5/378 , H04N5/345 , H04N5/347 , H04N5/3745 , H04N9/04
摘要： The present technology relates to an image pickup element, a control method, and an image pickup device which realize easier and more diversified data output. In one aspect of the present technology, a plurality of signal lines for transmitting a pixel signal read from a pixel is allocated to each column, and different reading modes of the pixel signals are respectively allocated to the signal lines of each column. Regarding each column of the pixel array connected to the pixel corresponding to the mode, the pixel signal is read from the pixel connected to the signal line corresponding to the reading mode of the pixel signal in the mode, and the read pixel signal is transmitted via the signal line. The present technology is applied to, for example, an image pickup element and an image pickup device.

4. 发明授权

US09077919B2 Solid-state imaging device, imaging device, electronic equipment, A/D converter and A/D conversion method 有权
标题翻译：固态成像装置，成像装置，电子设备，A / D转换器和A / D转换方法
公开(公告)号：US09077919B2
公开(公告)日：2015-07-07
申请号：US14244482
申请日：2014-04-03
申请人： Sony Corporation
发明人： Hayato Wakabayashi , Masaru Kikuchi , Hiroshi Iwasa , Yuuki Yamagata
IPC分类号： H04N5/357 , H04N5/335 , H03M1/06 , H03M1/10 , H04N5/378 , H03M1/34 , H03M1/08 , H04N5/3745 , H03M1/12 , H03M1/56 , H03M1/74
CPC分类号： H04N5/357 , H03M1/0658 , H03M1/08 , H03M1/1023 , H03M1/1205 , H03M1/123 , H03M1/129 , H03M1/34 , H03M1/56 , H03M1/745 , H04N5/335 , H04N5/37455 , H04N5/378
摘要： In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage Vx are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage Vx, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become √W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.
摘要翻译：在参考信号比较AD转换方案中，比较参考信号SLP_ADC和像素信号电压Vx的P和D相位中的每一个。基于比较结果对计数时钟CKcnt1进行计数。计数结果数据被转换为信号数据Dsig，也就是也经历CDS的P相和D相之间的差。此时，对像素信号电压Vx的P相和D相进行n位AD转换，然后进行数字积分的求和。这可以防止可能由模拟域中的相加引起的任何可能的有害影响。虽然信号数据变为W倍，噪声可能会增加到更多的√W倍。这减轻了AD转换产生的随机噪声的问题，例如量化噪声和模拟域中不存在的电路噪声，从而降低噪声。

5. 发明申请

US20140211055A1 SOLID-STATE IMAGING DEVICE, IMAGING DEVICE, ELECTRONIC EQUIPMENT, A/D CONVERTER AND A/D CONVERSION METHOD 审中-公开
标题翻译：固态成像装置，成像装置，电子设备，A / D转换器和A / D转换方法
公开(公告)号：US20140211055A1
公开(公告)日：2014-07-31
申请号：US14244482
申请日：2014-04-03
申请人： Sony Corporation
发明人： Hayato Wakabayashi , Masaru Kikuchi , Hiroshi Iwasa , Yuuki Yamagata
IPC分类号： H04N5/357 , H04N5/3745 , H03M1/08
CPC分类号： H04N5/357 , H03M1/0658 , H03M1/08 , H03M1/1023 , H03M1/1205 , H03M1/123 , H03M1/129 , H03M1/34 , H03M1/56 , H03M1/745 , H04N5/335 , H04N5/37455 , H04N5/378
摘要： In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage Vx are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage Vx, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become √W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.
摘要翻译：在参考信号比较AD转换方案中，比较参考信号SLP_ADC和像素信号电压Vx的P和D相位中的每一个。基于比较结果对计数时钟CKcnt1进行计数。计数结果数据被转换为信号数据Dsig，也就是也经历CDS的P相和D相之间的差。此时，对像素信号电压Vx的P相和D相进行n位AD转换，然后进行数字积分的求和。这可以防止可能由模拟域中的相加引起的任何可能的有害影响。虽然信号数据变为W倍，噪声可能会增加到更多的√W倍。这减轻了AD转换产生的随机噪声的问题，例如量化噪声和模拟域中不存在的电路噪声，从而降低噪声。

6. 发明授权

US08743254B2 Solid-state imaging device, imaging device, electronic equipment, A/D converter and A/D conversion method 有权
标题翻译：固态成像装置，成像装置，电子设备，A / D转换器和A / D转换方法
公开(公告)号：US08743254B2
公开(公告)日：2014-06-03
申请号：US13936563
申请日：2013-07-08
申请人： Sony Corporation
发明人： Hayato Wakabayashi , Masaru Kikuchi , Hiroshi Iwasa , Yuuki Yamagata
IPC分类号： H04N5/335 , H01L27/00
CPC分类号： H04N5/357 , H03M1/0658 , H03M1/08 , H03M1/1023 , H03M1/1205 , H03M1/123 , H03M1/129 , H03M1/34 , H03M1/56 , H03M1/745 , H04N5/335 , H04N5/37455 , H04N5/378
摘要： In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage VX are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage VX, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become √W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.
摘要翻译：在参考信号比较AD转换方案中，比较参考信号SLP_ADC和像素信号电压VX的P和D相位中的每一个。基于比较结果对计数时钟CKcnt1进行计数。计数结果数据被转换为信号数据Dsig，也就是也经历CDS的P相和D相之间的差。此时，对像素信号电压VX的P相和D相进行n位AD转换，然后进行数字积分的求和。这可以防止可能由模拟域中的相加引起的任何可能的有害影响。虽然信号数据变为W倍，噪声可能会增加到更多的√W倍。这减轻了AD转换产生的随机噪声的问题，例如量化噪声和模拟域中不存在的电路噪声，从而降低噪声。

7. 发明申请

US20130293754A1 SOLID-STATE IMAGING DEVICE, IMAGING DEVICE, ELECTRONIC EQUIPMENT, A/D CONVERTER AND A/D CONVERSION METHOD 有权
标题翻译：固态成像装置，成像装置，电子设备，A / D转换器和A / D转换方法
公开(公告)号：US20130293754A1
公开(公告)日：2013-11-07
申请号：US13936563
申请日：2013-07-08
申请人： Sony Corporation
发明人： Hayato Wakabayashi , Masaru Kikuchi , Hiroshi Iwasa , Yuuki Yamagata
IPC分类号： H04N5/357 , H03M1/34 , H04N5/378
CPC分类号： H04N5/357 , H03M1/0658 , H03M1/08 , H03M1/1023 , H03M1/1205 , H03M1/123 , H03M1/129 , H03M1/34 , H03M1/56 , H03M1/745 , H04N5/335 , H04N5/37455 , H04N5/378
摘要： In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage VX are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage VX, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become √W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.
摘要翻译：在参考信号比较AD转换方案中，比较参考信号SLP_ADC和像素信号电压VX的P和D相位中的每一个。基于比较结果对计数时钟CKcnt1进行计数。计数结果数据被转换为信号数据Dsig，也就是也经历CDS的P相和D相之间的差。此时，对像素信号电压VX的P相和D相进行n位AD转换，然后进行数字积分的求和。这可以防止可能由模拟域中的相加引起的任何可能的有害影响。虽然信号数据变为W倍，噪声可能会增加到更多的√W倍。这减轻了AD转换产生的随机噪声的问题，例如量化噪声和模拟域中不存在的电路噪声，从而降低噪声。

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