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1. 发明申请

US20100309718A1 SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：半导体存储器件
公开(公告)号：US20100309718A1
公开(公告)日：2010-12-09
申请号：US12492434
申请日：2009-06-26
申请人： Young-Hoon Oh , Sung-Yeon Lee
发明人： Young-Hoon Oh , Sung-Yeon Lee
IPC分类号： G11C11/14 , G11C7/00 , G11C5/14 , G11C8/08
CPC分类号： G11C5/147 , G11C7/04 , G11C11/1655 , G11C11/1659 , G11C11/1675 , G11C11/1697
摘要： A semiconductor memory device uses a magnetic tunnel junction device (MTJ) and includes a memory cell connected between a first driving line and a second driving line and configured to store data having a data state that is determined based on a direction of a current flowing through the first and the second driving lines, and a current controlling block configured to control a supply current provided to the first and second driving lines in response to temperature information in a writing operation.
摘要翻译：半导体存储器件使用磁性隧道结器件（MTJ），并且包括连接在第一驱动线和第二驱动线之间的存储单元，并被配置为存储具有基于流过的电流的方向确定的数据状态的数据第一驱动线和第二驱动线，以及电流控制块，被配置为响应于写入操作中的温度信息来控制提供给第一和第二驱动线的电源电流。

2. 发明授权

US08018787B2 Semiconductor memory device capable of controlling a supply current of a memory cell and method thereof 有权
标题翻译：能够控制存储单元的供电电流的半导体存储器件及其方法
公开(公告)号：US08018787B2
公开(公告)日：2011-09-13
申请号：US12492434
申请日：2009-06-26
申请人： Young-Hoon Oh , Sung-Yeon Lee
发明人： Young-Hoon Oh , Sung-Yeon Lee
IPC分类号： G11C7/00
CPC分类号： G11C5/147 , G11C7/04 , G11C11/1655 , G11C11/1659 , G11C11/1675 , G11C11/1697
摘要： A semiconductor memory device uses a magnetic tunnel junction device (MTJ) and includes a memory cell connected between a first driving line and a second driving line and configured to store data having a data state that is determined based on a direction of a current flowing through the first and the second driving lines, and a current controlling block configured to control a supply current provided to the first and second driving lines in response to temperature information in a writing operation.
摘要翻译：半导体存储器件使用磁性隧道结器件（MTJ），并且包括连接在第一驱动线和第二驱动线之间的存储单元，并被配置为存储具有基于流过的电流的方向确定的数据状态的数据第一驱动线和第二驱动线，以及电流控制块，被配置为响应于写入操作中的温度信息来控制提供给第一和第二驱动线的电源电流。

3. 发明申请

US20100277975A1 SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：半导体存储器件
公开(公告)号：US20100277975A1
公开(公告)日：2010-11-04
申请号：US12488632
申请日：2009-06-22
申请人： Sung-Yeon Lee , Young-Hoon Oh
发明人： Sung-Yeon Lee , Young-Hoon Oh
IPC分类号： G11C11/14 , G11C7/02 , G11C5/14
CPC分类号： G11C11/4099 , G11C5/147 , G11C11/1657 , G11C11/1659 , G11C11/1673 , G11C11/1675
摘要： A semiconductor memory device includes a plurality of memory cells configured to correspond to each of a plurality of word lines for storing data; a plurality of reference memory cells configured to include first and second magnetic memory devices, whose lower electrodes are commonly connected to each other, to generate a reference current corresponding to each of the memory cells; and a sense amplification unit configured to sense and amplify the reference current and a data current corresponding to a memory cell connected to an activated word line among the word lines.
摘要翻译：半导体存储器件包括配置为对应于用于存储数据的多个字线中的每一个的多个存储器单元; 多个参考存储单元，被配置为包括第一和第二磁存储器件，其下电极彼此共同连接，以产生与每个存储单元相对应的参考电流; 以及感测放大单元，被配置为感测和放大参考电流以及与连接到字线之间的激活字线的存储单元相对应的数据电流。

4. 发明授权

US08189417B2 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US08189417B2
公开(公告)日：2012-05-29
申请号：US13188728
申请日：2011-07-22
申请人： Young-Hoon Oh , Sung-Yeon Lee
发明人： Young-Hoon Oh , Sung-Yeon Lee
IPC分类号： G11C7/00
CPC分类号： G11C5/147 , G11C7/04 , G11C11/1655 , G11C11/1659 , G11C11/1675 , G11C11/1697
摘要： A semiconductor memory device uses a magnetic tunnel junction device (MTJ) and includes a memory cell connected between a first driving line and a second driving line and configured to store data having a data state that is determined based on a direction of a current flowing through the first and the second driving lines, and a current controlling block configured to control a supply current provided to the first and second driving lines in response to temperature information in a writing operation.
摘要翻译：半导体存储器件使用磁性隧道结器件（MTJ）并且包括连接在第一驱动线和第二驱动线之间的存储单元，并被配置为存储具有基于流过的电流的方向确定的数据状态的数据第一驱动线和第二驱动线，以及电流控制块，被配置为响应于写入操作中的温度信息来控制提供给第一和第二驱动线的电源电流。

5. 发明申请

US20110280062A1 SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：半导体存储器件
公开(公告)号：US20110280062A1
公开(公告)日：2011-11-17
申请号：US13188728
申请日：2011-07-22
申请人： Young-Hoon Oh , Sung-Yeon Lee
发明人： Young-Hoon Oh , Sung-Yeon Lee
IPC分类号： G11C11/00
CPC分类号： G11C5/147 , G11C7/04 , G11C11/1655 , G11C11/1659 , G11C11/1675 , G11C11/1697
摘要： A semiconductor memory device uses a magnetic tunnel junction device (MTJ) and includes a memory cell connected between a first driving line and a second driving line and configured to store data having a data state that is determined based on a direction of a current flowing through the first and the second driving lines, and a current controlling block configured to control a supply current provided to the first and second driving lines in response to temperature information in a writing operation.
摘要翻译：半导体存储器件使用磁性隧道结器件（MTJ），并且包括连接在第一驱动线和第二驱动线之间的存储单元，并被配置为存储具有基于流过的电流的方向确定的数据状态的数据第一驱动线和第二驱动线，以及电流控制块，被配置为响应于写入操作中的温度信息来控制提供给第一和第二驱动线的电源电流。

6. 发明授权

US08059480B2 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US08059480B2
公开(公告)日：2011-11-15
申请号：US12488632
申请日：2009-06-22
申请人： Sung-Yeon Lee , Young-Hoon Oh
发明人： Sung-Yeon Lee , Young-Hoon Oh
IPC分类号： G11C7/02
CPC分类号： G11C11/4099 , G11C5/147 , G11C11/1657 , G11C11/1659 , G11C11/1673 , G11C11/1675
摘要： A semiconductor memory device includes a plurality of memory cells configured to correspond to each of a plurality of word lines for storing data; a plurality of reference memory cells configured to include first and second magnetic memory devices, whose lower electrodes are commonly connected to each other, to generate a reference current corresponding to each of the memory cells; and a sense amplification unit configured to sense and amplify the reference current and a data current corresponding to a memory cell connected to an activated word line among the word lines.
摘要翻译：半导体存储器件包括配置为对应于用于存储数据的多个字线中的每一个的多个存储器单元; 多个参考存储单元，被配置为包括第一和第二磁存储器件，其下电极彼此共同连接，以产生与每个存储单元相对应的参考电流; 以及感测放大单元，被配置为感测和放大参考电流以及与连接到字线之间的激活字线的存储单元相对应的数据电流。

7. 发明授权

US07868674B2 Semiconductor device and operating method thereof 失效
标题翻译：半导体器件及其操作方法
公开(公告)号：US07868674B2
公开(公告)日：2011-01-11
申请号：US12761734
申请日：2010-04-16
申请人： Young-Hoon Oh
发明人： Young-Hoon Oh
IPC分类号： H03L7/06
CPC分类号： H03L7/087 , H03L7/0812 , H03L7/093
摘要： A delay locked loop (DLL) of a semiconductor device has a relatively small area and low current consumption while having a function of correcting a duty ratio. The semiconductor device includes a split unit configured to receive and split a reference clock to output a first clock corresponding to a first edge of the reference clock and a second clock corresponding to a second edge, a voltage generation unit configured to generate a first voltage corresponding to a duty ratio of the first clock and a second voltage corresponding to a duty ratio of the second clock, a voltage comparison unit configured to compare levels of the first and second voltages with each other, and a clock delay unit configured to receive one of the first and second clocks to delay the received clock of which delay amount is determined in response to an output signal of the voltage comparison unit.
摘要翻译：半导体器件的延迟锁定环（DLL）具有相对小的面积和低的电流消耗，同时具有校正占空比的功能。所述半导体器件包括分配单元，其被配置为接收和分离参考时钟以输出对应于所述参考时钟的第一边缘的第一时钟和对应于第二边缘的第二时钟;电压生成单元，被配置为产生对应于对应于第一时钟的占空比和对应于第二时钟的占空比的第二电压，电压比较单元，被配置为将第一和第二电压的电平彼此进行比较;以及时钟延迟单元，被配置为接收用于响应于电压比较单元的输出信号来确定延迟量的接收时钟的第一和第二时钟。

8. 发明授权

US07489586B2 Semiconductor memory device and driving method thereof 有权
标题翻译：半导体存储器件及其驱动方法
公开(公告)号：US07489586B2
公开(公告)日：2009-02-10
申请号：US11647402
申请日：2006-12-29
申请人： Young-Hoon Oh , Kwang-Myoung Rho
发明人： Young-Hoon Oh , Kwang-Myoung Rho
IPC分类号： G11C8/00
CPC分类号： G11C11/4076 , G11C7/1051 , G11C7/1069 , G11C7/22 , G11C7/222 , G11C11/401 , G11C29/02 , G11C29/023 , G11C29/028 , G11C2207/2254
摘要： A semiconductor memory device includes: a variable delay for delaying a delay locked loop (DLL) clock by a predetermined delay time to output a delayed DLL clock; an output driver for outputting data and data strobe signal in response to the delayed DLL clock; and a calibration controller for controlling the predetermined delay time of the variable delay in response to output AC parameters.
摘要翻译：半导体存储器件包括：用于将延迟锁定环（DLL）时钟延迟预定延迟时间的可变延迟，以输出延迟的DLL时钟; 输出驱动器，用于响应于延迟的DLL时钟输出数据和数据选通信号; 以及校准控制器，用于响应于输出AC参数来控制可变延迟的预定延迟时间。

9. 发明授权

US07616038B2 Clock modulation circuit for correcting duty ratio and spread spectrum clock generator including the same 有权
标题翻译：用于校正占空比的时钟调制电路和包括其的扩频时钟发生器
公开(公告)号：US07616038B2
公开(公告)日：2009-11-10
申请号：US11878305
申请日：2007-07-23
申请人： Young-Hoon Oh
发明人： Young-Hoon Oh
IPC分类号： H03K3/017
CPC分类号： H03K7/08 , H03K3/84 , H03K5/1565
摘要： A clock modulation circuit includes a modulation block that receives a fixed clock generated from a reference clock and buffers the fixed clock so as to generate a modulated clock. A correction unit is provided in the modulation block to correct the duty ratio of the modulated clock.
摘要翻译：时钟调制电路包括：接收从参考时钟生成的固定时钟并缓冲固定时钟以产生调制时钟的调制块。在调制块中提供校正单元，以校正调制时钟的占空比。

10. 发明申请

US20070070723A1 Internal voltage generator for semiconductor memory device 有权
标题翻译：用于半导体存储器件的内部电压发生器
公开(公告)号：US20070070723A1
公开(公告)日：2007-03-29
申请号：US11527440
申请日：2006-09-27
申请人： Khil-Ohk Kang , Young-Hoon Oh
发明人： Khil-Ohk Kang , Young-Hoon Oh
IPC分类号： G11C5/14
CPC分类号： G11C5/14 , G11C5/147
摘要： An internal voltage generator for a semiconductor memory device is provided. The internal voltage generator includes a first reference voltage generator for generating a first reference voltage, a second reference voltage generator for generating a second reference voltage, a core voltage generator for raising a core voltage based on the first reference voltage, and a core voltage discharger for discharging the core voltage depending on the second reference voltage.
摘要翻译：提供了一种用于半导体存储器件的内部电压发生器。内部电压发生器包括用于产生第一参考电压的第一参考电压发生器，用于产生第二参考电压的第二参考电压发生器，用于基于第一参考电压提高核心电压的核心电压发生器，以及核心电压放电器用于根据第二参考电压放电核心电压。

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