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1. 发明授权

US07236023B2 Apparatus and methods for adaptive trip point detection 有权
标题翻译：自适应跳变点检测的装置和方法
公开(公告)号：US07236023B2
公开(公告)日：2007-06-26
申请号：US11106288
申请日：2005-04-14
申请人： Tyler J. Thorp , Mark G. Johnson , Brent Haukness
发明人： Tyler J. Thorp , Mark G. Johnson , Brent Haukness
IPC分类号： H03L7/00
CPC分类号： H03K5/153 , H03K17/145 , H03K17/223
摘要： Apparatus and methods are described for providing an adaptive trip point detector circuit that receives an input signal at an input signal node and generates an output signal at an output signal node, the output signal changing from a first value to a second value when the input signal exceeds a trip point reference value. In particular, the trip point reference value is adjusted to compensate for variations in process or temperature, without requiring an externally-supplied reference signal.
摘要翻译：描述了用于提供自适应跳变点检测器电路的装置和方法，所述自适应跳变点检测器电路在输入信号节点处接收输入信号，并在输出信号节点处产生输出信号，输出信号在第一值变化到第二值时，超过跳点参考值。特别地，调整跳变点参考值以补偿过程或温度的变化，而不需要外部提供的参考信号。

2. 发明授权

US07863951B2 Methods for adaptive trip point detection 有权
标题翻译：自适应跳变点检测方法
公开(公告)号：US07863951B2
公开(公告)日：2011-01-04
申请号：US11752819
申请日：2007-05-23
申请人： Tyler J. Thorp , Mark G. Johnson , Brent Haukness
发明人： Tyler J. Thorp , Mark G. Johnson , Brent Haukness
IPC分类号： H03L7/00
CPC分类号： H03K5/153 , H03K17/145 , H03K17/223
摘要： Methods are described for providing an adaptive trip point detector circuit that receives an input signal at an input signal node and generates an output signal at an output signal node, the output signal changing from a first value to a second value when the input signal exceeds a trip point reference value. In particular, the trip point reference value is adjusted to compensate for variations in process or temperature.
摘要翻译：描述了用于提供自适应跳变点检测器电路的方法，该电路在输入信号节点处接收输入信号并在输出信号节点处产生输出信号，当输入信号超过一个输入信号时，该输出信号从第一值变为第二值跳点参考值。特别地，调整跳变点参考值以补偿过程或温度的变化。

3. 发明授权

US07863950B2 Apparatus for adaptive trip point detection 有权
标题翻译：自适应跳变点检测装置
公开(公告)号：US07863950B2
公开(公告)日：2011-01-04
申请号：US11752807
申请日：2007-05-23
申请人： Tyler J. Thorp , Mark G. Johnson , Brent Haukness
发明人： Tyler J. Thorp , Mark G. Johnson , Brent Haukness
IPC分类号： H03L7/00
CPC分类号： H03K5/153 , H03K17/145 , H03K17/223
摘要： Apparatus are described for providing an adaptive trip point detector circuit that receives an input signal at an input signal node and generates an output signal at an output signal node, the output signal changing from a first value to a second value when the input signal exceeds a trip point reference value. In particular, the trip point reference value is adjusted to compensate for variations in process or temperature.
摘要翻译：描述了用于提供自适应跳变点检测器电路的装置，其接收输入信号节点处的输入信号并在输出信号节点处产生输出信号，当输入信号超过一个输入信号时，该输出信号从第一值变为第二值跳点参考值。特别地，调整跳变点参考值以补偿过程或温度的变化。

4. 发明授权

US08351259B2 Methods and apparatus for using a configuration array similar to an associated data array 有权
标题翻译：使用类似于相关数据阵列的配置阵列的方法和装置
公开(公告)号：US08351259B2
公开(公告)日：2013-01-08
申请号：US12955377
申请日：2010-11-29
申请人： Tyler J. Thorp , Brent Haukness
发明人： Tyler J. Thorp , Brent Haukness
IPC分类号： G11C16/04
CPC分类号： G11C7/1045 , G11C13/025 , H01L27/0203 , H01L27/105
摘要： Methods, apparatus, and systems in accordance with this invention include memories that include a data array and a configuration array adapted to store configuration information for configuring the data array. The data array and the configuration array include a plurality of wordlines and a plurality of bitlines. The plurality of wordlines in the data array extend in the same direction as the plurality of wordlines in the configuration array. Likewise, the plurality of bitlines in the data array extend in the same direction as the plurality of bitlines in the configuration array. Numerous other aspects are disclosed.
摘要翻译：根据本发明的方法，装置和系统包括包括适于存储用于配置数据阵列的配置信息的数据阵列和配置阵列的存储器。数据阵列和配置阵列包括多个字线和多个位线。数据阵列中的多个字线在与配置阵列中的多个字线相同的方向上延伸。类似地，数据阵列中的多个位线沿与配置阵列中的多个位线方向相同的方向延伸。公开了许多其他方面。

5. 发明授权

US06483341B2 CMOS-microprocessor chip and package anti-resonance apparatus 有权
标题翻译： CMOS微处理器芯片和封装反谐振装置
公开(公告)号：US06483341B2
公开(公告)日：2002-11-19
申请号：US09754564
申请日：2001-01-04
申请人： Claude R. Gauthier , Tyler J. Thorp , Richard L. Wheeler , Brian Amick
发明人： Claude R. Gauthier , Tyler J. Thorp , Richard L. Wheeler , Brian Amick
IPC分类号： H03K1716
CPC分类号： H02M3/00 , H02M1/44 , H02M3/07
摘要： An apparatus for regulating resonance in a micro-chip has been developed. The method includes connecting a de-coupled capacitance across the supply and ground voltages, and connecting a band-pass shunt regulator that is in parallel to the capacitor across the supply and ground voltages. The regulator will short circuit the supply and ground voltages at a pre-determined frequency to reduce the resonance effect on the micro-chip.
摘要翻译：已经开发了用于调节微芯片中的共振的装置。该方法包括在电源和接地电压之间连接去耦合电容，以及在电源和接地电压之间连接与电容器并联的带通分流调节器。调节器将以预定频率将电源和接地电压短路，以减少对微芯片的共振效应。

6. 发明授权

US06686785B2 Deskewing global clock skew using localized DLLs 有权
标题翻译：使用本地化DLL来消除全局时钟偏移
公开(公告)号：US06686785B2
公开(公告)日：2004-02-03
申请号：US09975359
申请日：2001-10-11
申请人： Dean Liu , Tyler J. Thorp , Pradeep R. Trivedi , Gin S. Yee , Claude R. Gauthier
发明人： Dean Liu , Tyler J. Thorp , Pradeep R. Trivedi , Gin S. Yee , Claude R. Gauthier
IPC分类号： H03L706
CPC分类号： H03L7/07 , G06F1/10 , H03L7/0814
摘要： An integrated circuit has a plurality of sections, each having a phase detector and a control delay circuit. The phase detector, in response to a phase difference between a reference clock signal and a feedback signal from a portion of a clock grid, controls the delay of its associated clock delay circuit, which, in turn, outputs to the portion of the clock grid. The feedback signal to the phase detector may be connected to an output of a DLL or another portion of the clock grid controlled by a clock delay circuit not associated with the phase detector. Such an arrangement on the integrated circuit leads to clock grid skew reduction.
摘要翻译：集成电路具有多个部分，每个部分具有相位检测器和控制延迟电路。相位检测器响应于参考时钟信号和来自时钟网格的一部分的反馈信号之间的相位差来控制其关联的时钟延迟电路的延迟，其又输出到时钟网格的一部分。到相位检测器的反馈信号可以连接到DLL或由与相位检测器不相关的时钟延迟电路控制的时钟网格的另一部分的输出。集成电路上的这种布置导致时钟网格偏移减少。

7. 发明授权

US06456107B1 CMOS-microprocessor chip and package anti-resonance method 有权
标题翻译： CMOS微处理器芯片和封装反共振方法
公开(公告)号：US06456107B1
公开(公告)日：2002-09-24
申请号：US09754573
申请日：2001-01-04
申请人： Claude R. Gauthier , Tyler J. Thorp , Richard L. Wheeler , Brian Amick
发明人： Claude R. Gauthier , Tyler J. Thorp , Richard L. Wheeler , Brian Amick
IPC分类号： H03K19003
CPC分类号： H02M3/00 , H02M1/44 , H02M3/07
摘要： A method for regulating resonance in a micro-chip has been developed. The circuit includes an on-chip de-coupled capacitor that is shunted across the supply and ground voltages, and a band-pass shunt regulator that is in parallel to the capacitor across the supply and ground voltages. The regulator will short circuit the supply and ground voltages at a pre-determined frequency to reduce the resonance effect on the micro-chip.
摘要翻译：已经开发了用于调节微芯片中的共振的方法。该电路包括一个在电源和接地电压上分流的片上去耦合电容器，以及一个在电源和接地电压上与电容并联的带通分流调节器。调节器将以预定频率将电源和接地电压短路，以减少对微芯片的共振效应。

8. 发明授权

US08531904B2 Methods and apparatus for extending the effective thermal operating range of a memory 有权
标题翻译：扩展存储器的有效热操作范围的方法和装置
公开(公告)号：US08531904B2
公开(公告)日：2013-09-10
申请号：US13205820
申请日：2011-08-09
申请人： Tyler J. Thorp , Roy E. Scheuerlein
发明人： Tyler J. Thorp , Roy E. Scheuerlein
IPC分类号： G11C7/04
CPC分类号： G11C7/04 , G11C16/06
摘要： Apparatus and systems are provided for thermal regulation of a memory integrated circuit (“IC”). The apparatus and systems may include a thermal sensor on a memory IC, and a heating element coupled to the thermal sensor. The heating element is adapted to heat the memory IC in response to a signal from the thermal sensor. Other aspects are also provided.
摘要翻译：提供了用于存储器集成电路（“IC”）的热调节的装置和系统。该装置和系统可以包括存储器IC上的热传感器和耦合到热传感器的加热元件。加热元件适于响应于来自热传感器的信号来加热存储器IC。还提供其他方面。

9. 发明授权

US08441849B2 Reducing programming time of a memory cell 有权
标题翻译：减少存储单元的编程时间
公开(公告)号：US08441849B2
公开(公告)日：2013-05-14
申请号：US13403454
申请日：2012-02-23
申请人： Tyler J. Thorp , Roy E. Scheuerlein
发明人： Tyler J. Thorp , Roy E. Scheuerlein
IPC分类号： G11C7/06 , G11C11/00
CPC分类号： G11C7/12 , G11C7/065 , G11C8/08 , G11C13/0004 , G11C13/0023 , G11C13/0061 , G11C13/0069
摘要： The present invention provides methods and apparatus for adjusting voltages of bit and word lines to program a two terminal memory cell. The invention may include setting a first line connected to a memory cell to a first voltage from a first line standby voltage, charging a second line connected to the memory cell to a predetermined voltage from a second line standby voltage, and switching the first line from the first voltage to a second voltage. The voltage difference between the first voltage and the predetermined voltage is such that a safe voltage results that does not program the memory cell. A voltage difference between the second voltage and the predetermined voltage is such that a programming voltage operative to program the memory cell results.
摘要翻译：本发明提供了调节位和字线的电压以编程两个终端存储单元的方法和装置。本发明可以包括将连接到存储器单元的第一线路从第一线路待机电压设置为第一电压，将连接到存储器单元的第二线路从第二线路待机电压充电到预定电压，以及将第一线路从第一电压到第二电压。第一电压和预定电压之间的电压差使得不对存储单元进行编程的安全电压。第二电压和预定电压之间的电压差使得可操作以编程存储器单元的编程电压结果。

10. 发明授权

US07764534B2 Two terminal nonvolatile memory using gate controlled diode elements 有权
标题翻译：使用门控二极管元件的两端子非易失性存储器
公开(公告)号：US07764534B2
公开(公告)日：2010-07-27
申请号：US12003570
申请日：2007-12-28
申请人： Tyler J. Thorp , Roy E. Scheuerlein
发明人： Tyler J. Thorp , Roy E. Scheuerlein
IPC分类号： G11C11/00
CPC分类号： H01L27/1021 , G11C13/0004 , G11C13/003 , G11C16/0466 , G11C2213/72 , G11C2213/76 , H01L27/112 , H01L27/2445 , H01L27/2463 , H01L29/1606 , H01L29/739 , H01L29/8613 , H01L29/868 , H01L29/88 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/146 , H01L45/147 , H01L45/148 , H01L45/149 , H01L45/16
摘要： A nonvolatile memory cell includes a gate controlled diode steering element and a resistivity switching element.
摘要翻译：非易失性存储单元包括栅极控制的二极管操纵元件和电阻率开关元件。

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