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1. 发明申请

US20110006933A1 TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTER 有权
标题翻译：时间隔离的模拟数字转换器
公开(公告)号：US20110006933A1
公开(公告)日：2011-01-13
申请号：US12575337
申请日：2009-10-07
申请人： Viswanathan Nagarajan , Sriram Murali , Sthanunathan Ramakrishnan , Visvesvaraya Pentakota , Jaiganesh Balakrishnan
发明人： Viswanathan Nagarajan , Sriram Murali , Sthanunathan Ramakrishnan , Visvesvaraya Pentakota , Jaiganesh Balakrishnan
IPC分类号： H03M1/06 , H03M1/66
CPC分类号： H03M1/1057 , H03M1/0836 , H03M1/1215
摘要： A time-interleaved (TI) analog-to-digital converter (ADC) is provided. The TI ADC generally comprises a clock generator, two or more ADCs, adjustable delay elements, and an estimator. The clock generator generates clock signals. Each ADC is associated with at least one of the clock signals so as to sample an input signal that is generally wide-sense stationary at sampling instants, where correlation function exist between samples from a two or more of the ADCs that is a function of the time differences between associated sampling instants. The estimator is coupled to each of the adjustable delay elements and each of the ADCs so as to calculate the correlation function and adjust the adjustable delay elements to account for sampling mismatch between the ADCs based at least in part on the correlation function.
摘要翻译：提供了时间交织（TI）模数转换器（ADC）。 TI ADC通常包括时钟发生器，两个或更多个ADC，可调延迟元件和估计器。时钟发生器产生时钟信号。每个ADC与至少一个时钟信号相关联，以便在采样时刻对通常为宽静态的输入信号进行采样，其中相关函数存在于两个或更多个ADC之间的样本之间，该两个或更多个ADC是相关抽样时间之间的时间差异。估计器耦合到每个可调节延迟元件和每个ADC，以便计算相关函数，并且至少部分地基于相关函数来调整可调延迟元件以考虑ADC之间的采样失配。

2. 发明授权

US07961123B2 Time-interleaved analog-to-digital converter 有权
标题翻译：时间交织的模数转换器
公开(公告)号：US07961123B2
公开(公告)日：2011-06-14
申请号：US12575337
申请日：2009-10-07
申请人： Viswanathan Nagarajan , Sriram Murali , Sthanunathan Ramakrishnan , Visvesvaraya Pentakota , Jaiganesh Balakrishnan
发明人： Viswanathan Nagarajan , Sriram Murali , Sthanunathan Ramakrishnan , Visvesvaraya Pentakota , Jaiganesh Balakrishnan
IPC分类号： H03M1/06
CPC分类号： H03M1/1057 , H03M1/0836 , H03M1/1215
摘要： A time-interleaved (TI) analog-to-digital converter (ADC) is provided. The TI ADC generally comprises a clock generator, two or more ADCs, adjustable delay elements, and an estimator. The clock generator generates clock signals. Each ADC is associated with at least one of the clock signals so as to sample an input signal that is generally wide-sense stationary at sampling instants, where correlation function exist between samples from a two or more of the ADCs that is a function of the time differences between associated sampling instants. The estimator is coupled to each of the adjustable delay elements and each of the ADCs so as to calculate the correlation function and adjust the adjustable delay elements to account for sampling mismatch between the ADCs based at least in part on the correlation function.
摘要翻译：提供了时间交织（TI）模数转换器（ADC）。 TI ADC通常包括时钟发生器，两个或更多个ADC，可调延迟元件和估计器。时钟发生器产生时钟信号。每个ADC与至少一个时钟信号相关联，以便在采样时刻对通常为宽静态的输入信号进行采样，其中相关函数存在于两个或更多个ADC之间的样本之间，该两个或更多个ADC是相关抽样时间之间的时间差异。估计器耦合到每个可调节延迟元件和每个ADC，以便计算相关函数，并且至少部分地基于相关函数来调整可调延迟元件以考虑ADC之间的采样失配。

3. 发明申请

US20120106602A1 Signaling in a Medical Implant Based System 审中-公开
标题翻译：基于医学植入物系统的信号传导
公开(公告)号：US20120106602A1
公开(公告)日：2012-05-03
申请号：US13347893
申请日：2012-01-11
申请人： Sthanunathan Ramakrishnan , Ganesan Thiagarajan , Divyesh Kumar Shah , Jaiganesh Balakrishnan , Sriram Murali
发明人： Sthanunathan Ramakrishnan , Ganesan Thiagarajan , Divyesh Kumar Shah , Jaiganesh Balakrishnan , Sriram Murali
IPC分类号： H04B1/38
CPC分类号： A61N1/3727
摘要： Signaling in a medical implant based system. A method includes transmitting bits modulated with a predefined sequence in a band of channels by a first medical transceiver. The method includes transmitting bits modulated with a first predefined sequence of a plurality of predefined sequences by a first medical transceiver. The first predefined sequence is detected by a second medical transceiver when the second medical transceiver enters into an active state. A predetermined action is preformed if the first predefined sequence is detected.
摘要翻译：在医疗植入物系统中进行信号传导。一种方法包括通过第一医疗收发器传输利用频道频带中的预定义序列调制的比特。该方法包括通过第一医疗收发器传输利用多个预定义序列的第一预定义序列调制的比特。当第二医疗收发器进入活动状态时，第一预定义序列由第二医疗收发器检测。如果检测到第一预定义序列，则执行预定动作。

4. 发明授权

US09172483B2 Signal quality estimation and control 有权
标题翻译：信号质量估算与控制
公开(公告)号：US09172483B2
公开(公告)日：2015-10-27
申请号：US13899868
申请日：2013-05-22
申请人： Pankaj Gupta , Sriram Murali , Jaiganesh Balakrishnan , Sanjay Vishwakarma
发明人： Pankaj Gupta , Sriram Murali , Jaiganesh Balakrishnan , Sanjay Vishwakarma
IPC分类号： H04B17/00 , H04H60/58 , H04B1/16 , H04H40/45
CPC分类号： H04H60/58 , H04B1/1646 , H04H40/45 , H04H40/72 , H04H40/81
摘要： Several circuits and methods implemented to perform signal quality estimation and control are disclosed. In an embodiment, a method of signal quality estimation includes generating a demodulated signal associated with a radio signal. Information associated with a quality of the demodulated signal is accessed. Further, a value of radio frequency signal-to-noise ratio (RF-SNR) for the radio signal based on the information is estimated. Estimating the value of RF-SNR facilitates in signal quality estimation of the radio signal and control of the demodulated signal.
摘要翻译：公开了执行信号质量估计和控制的几种电路和方法。在一个实施例中，信号质量估计的方法包括产生与无线电信号相关联的解调信号。访问与解调信号的质量相关的信息。此外，估计基于该信息的无线电信号的射频信噪比（RF-SNR）值。估计RF-SNR的值有助于无线电信号的信号质量估计和解调信号的控制。

5. 发明授权

US08112051B2 Method and system for false frequency lock free autonomous scan in a receiver 有权
标题翻译：接收机中无锁频自主扫描的方法和系统
公开(公告)号：US08112051B2
公开(公告)日：2012-02-07
申请号：US12616260
申请日：2009-11-11
申请人： Jaiganesh Balakrishnan , Aravind Ganesan , Sriram Murali , Bijoy Bhukania
发明人： Jaiganesh Balakrishnan , Aravind Ganesan , Sriram Murali , Bijoy Bhukania
IPC分类号： H04B1/18 , H04B1/16
CPC分类号： H04B17/318
摘要： Method and system for false lock free autonomous scan in a receiver is disclosed. The method includes identifying a presence of a desired signal to avoid false frequency lock in a Frequency Modulation receiver. The method includes receiving a signal. The method further includes identifying the desired signal, if a first energy is above a first threshold. The method also includes identifying the desired signal, if an Intermediate Frequency count is below a second threshold. The method includes identifying the desired signal, if a second energy of the signal is above a third threshold. The method includes identifying the desired signal, if an absolute difference between a first Received Signal Strength Indication (RSSI) value and a second RSSI value of the signal is below a fourth threshold. The method includes determining a third energy. The method includes identifying the desired signal, if the third energy is below a fifth threshold.
摘要翻译：公开了一种用于接收机中无锁自主扫描的方法和系统。该方法包括识别期望信号的存在以避免频率调制接收机中的错误频率锁定。该方法包括接收信号。如果第一能量高于第一阈值，该方法还包括识别期望信号。如果中频频率低于第二阈值，该方法还包括识别期望的信号。如果信号的第二能量高于第三阈值，则该方法包括识别所需信号。如果信号的第一接收信号强度指示（RSSI）值和第二RSSI值之间的绝对差低于第四阈值，则该方法包括识别所需信号。该方法包括确定第三能量。如果第三能量低于第五阈值，则该方法包括识别所需信号。

6. 发明申请

US20140348328A1 SIGNAL QUALITY ESTIMATION AND CONTROL 有权
标题翻译：信号质量估算与控制
公开(公告)号：US20140348328A1
公开(公告)日：2014-11-27
申请号：US13899868
申请日：2013-05-22
申请人： Pankaj Gupta , Sriram Murali , Jaiganesh Balakrishnan , Sanjay Vishwakarma
发明人： Pankaj Gupta , Sriram Murali , Jaiganesh Balakrishnan , Sanjay Vishwakarma
IPC分类号： H04H60/58
CPC分类号： H04H60/58 , H04B1/1646 , H04H40/45 , H04H40/72 , H04H40/81
摘要： Several circuits and methods implemented to perform signal quality estimation and control are disclosed. In an embodiment, a method of signal quality estimation includes generating a demodulated signal associated with a radio signal. Information associated with a quality of the demodulated signal is accessed. Further, a value of radio frequency signal-to-noise ratio (RF-SNR) for the radio signal based on the information is estimated. Estimating the value of RF-SNR facilitates in signal quality estimation of the radio signal and control of the demodulated signal.
摘要翻译：公开了执行信号质量估计和控制的几种电路和方法。在一个实施例中，信号质量估计的方法包括产生与无线电信号相关联的解调信号。访问与解调信号的质量相关的信息。此外，估计基于该信息的无线电信号的射频信噪比（RF-SNR）值。估计RF-SNR的值有助于无线电信号的信号质量估计和解调信号的控制。

7. 发明申请

US20110111714A1 METHOD AND SYSTEM FOR FALSE FREQUENCY LOCK FREE AUTONOMOUS SCAN IN A RECEIVER 有权
标题翻译：方法和系统在接收机中进行无差错自由无障碍扫描
公开(公告)号：US20110111714A1
公开(公告)日：2011-05-12
申请号：US12616260
申请日：2009-11-11
申请人： Jaiganesh Balakrishnan , Aravind Ganesan , Sriram Murali , Bijoy Bhukania
发明人： Jaiganesh Balakrishnan , Aravind Ganesan , Sriram Murali , Bijoy Bhukania
IPC分类号： H04B1/18 , H04B1/16
CPC分类号： H04B17/318
摘要： Method and system for false lock free autonomous scan in a receiver is disclosed. The method includes identifying a presence of a desired signal to avoid false frequency lock in a Frequency Modulation receiver. The method includes receiving a signal. The method further includes identifying the desired signal, if a first energy is above a first threshold. The method also includes identifying the desired signal, if an Intermediate Frequency count is below a second threshold. The method includes identifying the desired signal, if a second energy of the signal is above a third threshold. The method includes identifying the desired signal, if an absolute difference between a first Received Signal Strength Indication (RSSI) value and a second RSSI value of the signal is below a fourth threshold. The method includes determining a third energy. The method includes identifying the desired signal, if the third energy is below a fifth threshold.
摘要翻译：公开了一种用于接收机中无锁自主扫描的方法和系统。该方法包括识别期望信号的存在以避免频率调制接收机中的错误频率锁定。该方法包括接收信号。如果第一能量高于第一阈值，该方法还包括识别期望信号。如果中频频率低于第二阈值，该方法还包括识别期望的信号。如果信号的第二能量高于第三阈值，则该方法包括识别所需信号。如果信号的第一接收信号强度指示（RSSI）值和第二RSSI值之间的绝对差低于第四阈值，则该方法包括识别所需信号。该方法包括确定第三能量。如果第三能量低于第五阈值，则该方法包括识别所需信号。

8. 发明授权

US09588566B2 Programmable time delay and signal polarity improving transceiver signal-to-noise metric 有权
标题翻译：可编程的时间延迟和信号极性提高收发器信噪比度量
公开(公告)号：US09588566B2
公开(公告)日：2017-03-07
申请号：US13226503
申请日：2011-09-07
申请人： Jaiganesh Balakrishnan , Sriram Murali
发明人： Jaiganesh Balakrishnan , Sriram Murali
IPC分类号： H04B15/00 , G06F1/30 , H04H40/72
CPC分类号： G06F1/30 , H04H40/72
摘要： Suppression of interference across transceivers integrated on a single semiconductor chip. An example of a method of reducing noise in a transceiver includes introducing an adjustable time delay into a signal between a first section of a signal path into which noise may be introduced and a second section of the signal path into which noise may be introduced. The method also includes selectively adjusting the time delay and signal polarity to improve a signal-to-noise metric of the transceiver. An example of the transceiver includes a transmitter and a receiver. The transceiver also includes an adjustable time delay between a first section of a transceiver signal path into which noise may be introduced and a second section of the transceiver signal path into which noise may be introduced and circuitry for reducing noise by adjusting a value of the time delay.
摘要翻译：集成在单个半导体芯片上的收发器之间的干扰抑制。降低收发器噪声的方法的一个例子包括将可调节的时间延迟引入到可以引入噪声的信号路径的第一部分和信号路径的可能引入噪声的第二部分之间的信号中。该方法还包括选择性地调整时间延迟和信号极性以改善收发信机的信噪比度量。收发器的示例包括发射机和接收机。收发器还包括可以在其中引入噪声的收发器信号路径的第一部分和可以引入噪声的收发器信号路径的第二部分之间的可调节的时间延迟以及通过调整时间的值来降低噪声的电路延迟。

9. 发明授权

US08344774B2 Frequency synthesizer with immunity from oscillator pulling 有权
标题翻译：具有振荡器拉动抗扰度的频率合成器
公开(公告)号：US08344774B2
公开(公告)日：2013-01-01
申请号：US12707682
申请日：2010-02-18
申请人： Sriram Murali , Karthik Subburaj , Neeraj Nayak
发明人： Sriram Murali , Karthik Subburaj , Neeraj Nayak
IPC分类号： H03L7/06
CPC分类号： H03L7/099 , H03L7/18
摘要： Frequency synthesizer with immunity from oscillator pulling. The frequency synthesizer for generating an output frequency includes an oscillator that is capable of generating a first frequency. The frequency synthesizer also includes an output divider coupled to the oscillator. The output divider is configurable to allow the oscillator to generate a second frequency to prevent degradation in phase noise due to an interference to the first frequency of the oscillator, and to generate the output frequency from the second frequency.
摘要翻译：具有振荡器拉动抗扰度的频率合成器。用于产生输出频率的频率合成器包括能够产生第一频率的振荡器。频率合成器还包括耦合到振荡器的输出分频器。输出分频器可配置为允许振荡器产生第二频率，以防止由于对振荡器的第一频率的干扰导致的相位噪声的劣化，并且从第二频率产生输出频率。

10. 发明授权

US09350393B2 De-emphasis filtering audio signals in response to composite control signal 有权
标题翻译：响应复合控制信号去加重滤波音频信号
公开(公告)号：US09350393B2
公开(公告)日：2016-05-24
申请号：US12721293
申请日：2010-03-10
申请人： Sriram Murali
发明人： Sriram Murali
IPC分类号： H04B1/034 , H04B1/04 , H04L27/12
CPC分类号： H04B1/034 , H04B1/0475 , H04L27/12
摘要： Digital values representing an audio signal are formed in a FM transmitter. The deviation of the amplitude of the audio signal as represented by the digital values, from a reference amplitude level, is measured. The audio signal is filtered based on the deviation measured by processing the digital values, with the filtering designed to filter different frequency components of the audio signal with different respective magnitudes. Another set of digital values representing the filtered audio signal is generated, and used to frequency modulate a carrier signal to generate a FM signal. Over-modulation of the FM signal is thereby controlled.
摘要翻译：代表音频信号的数字值形成在FM发射机中。测量由数字值表示的音频信号的幅度与参考幅度电平的偏差。基于通过处理数字值测量的偏差对音频信号进行滤波，滤波器被设计为滤波具有不同相应幅度的音频信号的不同频率分量。生成表示经滤波的音频信号的另一组数字值，并用于频率调制载波信号以产生FM信号。由此控制FM信号的过调制。

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