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1. 发明申请

US20090138911A1 VIDEO BROADCASTING SYSTEM 审中-公开
标题翻译：视频广播系统
公开(公告)号：US20090138911A1
公开(公告)日：2009-05-28
申请号：US11945737
申请日：2007-11-27
申请人： Diane Garza Flemming , Ghadir Robert Gholami , Octavian Florin Herescu , William A. Maron , Mysore Sathyanarayana Srinivas
发明人： Diane Garza Flemming , Ghadir Robert Gholami , Octavian Florin Herescu , William A. Maron , Mysore Sathyanarayana Srinivas
IPC分类号： H04N7/173
CPC分类号： H04N21/8456 , H04N21/26225 , H04N21/4334 , H04N21/4532 , H04N21/4828 , H04N21/4882
摘要： A method, medium and implementing processing system, are provided in which premium programming content is included in a standard program broadcasting system. The added content is stored at a user site for subsequent viewing at the user's convenience. The receipt and storing of the premium programming is accomplished without interfering with the receipt of standard broadcast signals. The premium programming, in one example, is transmitted and incrementally received and stored on a user's system even while standard programming is received and viewed by the user. When all of the broadcast increments of a premium program have been received and the premium program has been stored in the user's system, a signal is provided to the user to indicate the availability of the premium program for selective viewing by the user.
摘要翻译：提供了一种方法，媒体和实现处理系统，其中高级节目内容被包括在标准节目广播系统中。添加的内容存储在用户站点，以便用户方便地查看。高级节目的接收和存储是在不干扰标准广播信号的接收的情况下完成的。在一个示例中，高级编程被传送和递增地接收并存储在用户的系统上，即使在用户接收和查看标准节目时也是如此。当已经接收到高级节目的所有广播增量并且高级节目已被存储在用户的系统中时，向用户提供信号以指示用户选择性观看的优质节目的可用性。

2. 发明授权

US07962677B2 Bus access moderation system 失效
标题翻译：总线访问管理系统
公开(公告)号：US07962677B2
公开(公告)日：2011-06-14
申请号：US12173211
申请日：2008-07-15
申请人： William A. Maron , Diane Garza Flemming , Ghadir Robert Gholami , Mysore Sathyanarayana Srinivas , Octavian Florin Herescu
发明人： William A. Maron , Diane Garza Flemming , Ghadir Robert Gholami , Mysore Sathyanarayana Srinivas , Octavian Florin Herescu
IPC分类号： G06F13/00
CPC分类号： G06F9/485 , G06F9/4881
摘要： A method, programmed medium and system are provided in which system bus traffic is moderated with real-time data. The Operating System (OS) is enabled to get information from the firmware (FW) to determine if a resource threshold has been reached. This is accomplished by generating an interrupt to flag the OS when a bus request retry rate has reached a predetermined number. The system firmware plays an integral role in this mechanism, and should be interpreted as a general term which could also include a hypervisor technology. The system firmware will report the bus request retry rate to the operating system by way of, for example, a firmware-generated interrupt. The OS may have something similar to a kernel daemon/service running to intercept the interrupt notice. In the simplest case, the daemon/service will determine if the threshold has been met based on the feedback from the firmware. If so, it will generate a system call that will moderate traffic with an operating system tunable. In one example, the number of simultaneous multithreading (SMT) threads per core will be reduced using a system call. This effectively throttles back the amount of logical threads per core and effectively alleviates the bus request saturation.
摘要翻译：提供了一种方法，编程介质和系统，其中系统总线流量由实时数据调节。操作系统（OS）能够从固件（FW）获取信息，以确定是否已达到资源阈值。这通过在总线请求重试速率达到预定数量时产生中断来标记OS来实现。系统固件在此机制中起着不可或缺的作用，应该被解释为一个通用术语，也可以包括管理程序技术。系统固件将通过例如固件产生的中断来向总线请求重试率报告给操作系统。操作系统可能与内核守护程序/服务类似，以拦截中断通知。在最简单的情况下，守护程序/服务将根据固件的反馈来确定阈值是否得到满足。如果是这样，它将生成一个系统调用，以便通过操作系统可调整来调节流量。在一个示例中，使用系统调用将减少每个内核的同时多线程（SMT）线程数。这有效地节省了每个内核的逻辑线程数量，并有效地缓解了总线请求饱和度。

3. 发明申请

US20100017551A1 BUS ACCESS MODERATION SYSTEM 失效
标题翻译：总线访问调制系统
公开(公告)号：US20100017551A1
公开(公告)日：2010-01-21
申请号：US12173211
申请日：2008-07-15
申请人： William A. Maron , Diane Garza Flemming , Ghadir Robert Gholami , Mysore Sathyanarayana Srinivas , Octavian Florin Herescu
发明人： William A. Maron , Diane Garza Flemming , Ghadir Robert Gholami , Mysore Sathyanarayana Srinivas , Octavian Florin Herescu
IPC分类号： G06F13/14
CPC分类号： G06F9/485 , G06F9/4881
摘要： A method, programmed medium and system are provided in which system bus traffic is moderated with real-time data. The Operating System (OS) is enabled to get information from the firmware (FW) to determine if a resource threshold has been reached. This is accomplished by generating an interrupt to flag the OS when a bus request retry rate has reached a predetermined number. The system firmware plays an integral role in this mechanism, and should be interpreted as a general term which could also include a hypervisor technology. The system firmware will report the bus request retry rate to the operating system by way of, for example, a firmware-generated interrupt. The OS may have something similar to a kernel daemon/service running to intercept the interrupt notice. In the simplest case, the daemon/service will determine if the threshold has been met based on the feedback from the firmware. If so, it will generate a system call that will moderate traffic with an operating system tunable. In one example, the number of simultaneous multithreading (SMT) threads per core will be reduced using a system call. This effectively throttles back the amount of logical threads per core and effectively alleviates the bus request saturation.
摘要翻译：提供了一种方法，编程介质和系统，其中系统总线流量由实时数据调节。操作系统（OS）能够从固件（FW）获取信息，以确定是否已达到资源阈值。这通过在总线请求重试速率达到预定数量时产生中断来标记OS来实现。系统固件在此机制中起着不可或缺的作用，应该被解释为一个通用术语，也可以包括管理程序技术。系统固件将通过例如固件产生的中断来向总线请求重试率报告给操作系统。操作系统可能与内核守护程序/服务类似，以拦截中断通知。在最简单的情况下，守护程序/服务将根据固件的反馈来确定阈值是否得到满足。如果是这样，它将生成一个系统调用，以便通过操作系统可调整来调节流量。在一个示例中，使用系统调用将减少每个内核的同时多线程（SMT）线程数。这有效地节省了每个内核的逻辑线程数量，并有效地缓解了总线请求饱和度。

4. 发明授权

US08566539B2 Managing thermal condition of a memory 失效
标题翻译：管理记忆的热状况
公开(公告)号：US08566539B2
公开(公告)日：2013-10-22
申请号：US12353343
申请日：2009-01-14
申请人： Diane Garza Flemming , Ghadir Robert Gholami , Octavian Florin Herescu , William A Maron , Mysore Sathyanarayana Srinivas
发明人： Diane Garza Flemming , Ghadir Robert Gholami , Octavian Florin Herescu , William A Maron , Mysore Sathyanarayana Srinivas
IPC分类号： G06F13/00
CPC分类号： G06F12/0802 , G06F1/206 , G06F9/5016 , G06F9/5077 , G06F9/5094 , Y02D10/22
摘要： A method, system, and computer usable program product for managing thermal condition of a memory are provided in the illustrative embodiments. A condition that a threshold value of a thermal condition of the memory has been exceeded or is likely to be exceeded is identified. A portion of a first workload is identified as being a cause of exceeding the threshold. A second portion of a second workload is identified, the second portion not causing the threshold to be exceeded when executed. A set of operations corresponding to the first portion is interleaved with a second set of operations corresponding to the second portion. The interleaved first and second portions of the first and second workloads are executed, causing the thermal condition of the memory to remain below the threshold. The second portion may use a second memory, a second area of the memory, or a combination thereof when executing.
摘要翻译：在说明性实施例中提供了用于管理存储器的热状态的方法，系统和计算机可用程序产品。识别存储器的热条件的阈值已经被超过或可能被超过的条件。第一工作负载的一部分被识别为超出阈值的原因。识别第二工作负载的第二部分，当执行时不引起阈值的第二部分。对应于第一部分的一组操作与对应于第二部分的第二组操作进行交织。执行第一和第二工作负载的交织的第一和第二部分，使得存储器的热状态保持在阈值以下。第二部分可以在执行时使用第二存储器，存储器的第二区域或其组合。

5. 发明申请

US20100180089A1 MANAGING THERMAL CONDITION OF A MEMORY 失效
标题翻译：管理存储器的热条件
公开(公告)号：US20100180089A1
公开(公告)日：2010-07-15
申请号：US12353343
申请日：2009-01-14
申请人： Diana Garza Flemming , Ghadir Robert Gholami , Octavian Florin Herescu , William A. Maron , Mysore Sathyanarayana Srinivas
发明人： Diana Garza Flemming , Ghadir Robert Gholami , Octavian Florin Herescu , William A. Maron , Mysore Sathyanarayana Srinivas
IPC分类号： G06F12/06 , G06F9/50
CPC分类号： G06F12/0802 , G06F1/206 , G06F9/5016 , G06F9/5077 , G06F9/5094 , Y02D10/22
摘要： A method, system, and computer usable program product for managing thermal condition of a memory are provided in the illustrative embodiments. A condition that a threshold value of a thermal condition of the memory has been exceeded or is likely to be exceeded is identified. A portion of a first workload is identified as being a cause of exceeding the threshold. A second portion of a second workload is identified, the second portion not causing the threshold to be exceeded when executed. A set of operations corresponding to the first portion is interleaved with a second set of operations corresponding to the second portion. The interleaved first and second portions of the first and second workloads are executed, causing the thermal condition of the memory to remain below the threshold. The second portion may use a second memory, a second area of the memory, or a combination thereof when executing.
摘要翻译：在说明性实施例中提供了用于管理存储器的热状态的方法，系统和计算机可用程序产品。识别存储器的热条件的阈值已经被超过或可能被超过的条件。第一工作负载的一部分被识别为超出阈值的原因。识别第二工作负载的第二部分，当执行时不引起阈值的第二部分。对应于第一部分的一组操作与对应于第二部分的第二组操作进行交织。执行第一和第二工作负载的交织的第一和第二部分，使得存储器的热状态保持在阈值以下。第二部分可以在执行时使用第二存储器，存储器的第二区域或其组合。

6. 发明授权

US06182230B2 Active accelerated discharge of a capacitive system 失效
标题翻译：电容系统的主动加速放电
公开(公告)号：US06182230B2
公开(公告)日：2001-01-30
申请号：US09165959
申请日：1998-10-02
申请人： Ghadir Robert Gholami , Khuong Huu Pham
发明人： Ghadir Robert Gholami , Khuong Huu Pham
IPC分类号： G06F126
CPC分类号： G06F1/30
摘要： An active circuit for rapidly discharging stored energy in a capacitive system. The circuit is comprised of a variable impedance circuit, a voltage detector, and a time delay circuit. The variable impedance circuit includes a variable impedance output path configured to be connected between a Vcc bus of the capacitive system and ground. The voltage detector circuit includes an input coupled to the Vcc bus and an output connected to an input of the variable impedance circuit. The voltage detector circuit is configured to maintain the variable impedance output path in a high impedance condition while the Vcc voltage remains above a predetermined minimum value. The time delay circuit is coupled to the input of the variable impedance circuit and configured to maintain the variable impedance output path in a low impedance condition for a duration after the voltage of the Vcc bus drops below the predetermined minimum.
摘要翻译：用于在容性系统中快速放电存储的能量的有源电路。该电路由可变阻抗电路，电压检测器和时间延迟电路组成。可变阻抗电路包括可变阻抗输出路径，其被配置为连接在电容系统的Vcc总线与地之间。电压检测器电路包括耦合到Vcc总线的输入端和连接到可变阻抗电路的输入端的输出端。电压检测器电路被配置为将可变阻抗输出路径保持在高阻抗状态，同时Vcc电压保持在预定的最小值以上。时间延迟电路耦合到可变阻抗电路的输入，并被配置为在Vcc总线的电压下降到预定最小值之前的持续时间内将可变阻抗输出路径保持在低阻抗状态。

7. 发明授权

US06725301B1 System solution to allow 64-bit PCI adapters to determine state during reset 失效
标题翻译：允许64位PCI适配器在复位期间确定状态的系统解决方案
公开(公告)号：US06725301B1
公开(公告)日：2004-04-20
申请号：US09606640
申请日：2000-06-29
申请人： Ghadir Robert Gholami , Mark David McLaughlin , John Daniel Upton
发明人： Ghadir Robert Gholami , Mark David McLaughlin , John Daniel Upton
IPC分类号： G06F1314
CPC分类号： G06F13/4221
摘要： A modified system causes the REQ64# signal to be asserted when the adapter is in reset on a 64-bit slot. This allows the adapter to see that it is in a 64-bit slot at the beginning of reset, preventing the adapter from driving the 64-bit extension pins. The above-described modification must be made to all the 64-bit slots on a system. When the reset signal is active, it will cause the buffer to drive the REQ64# signal low. This will synchronize reset and REQ64#, eliminating the possibility for bus contention. No modification is necessary for 32-bit slots. This modification will not affect the normal operation of the bus, since it is only used during reset.
摘要翻译：当适配器在64位插槽上复位时，修改后的系统会导致REQ64＃信号被置位。这允许适配器在复位开始时看到它处于64位插槽，从而阻止适配器驱动64位扩展引脚。必须对系统上的所有64位插槽进行上述修改。当复位信号有效时，会使缓冲区驱动REQ64＃信号为低电平。这将同步复位和REQ64＃，消除了总线争用的可能性。 32位插槽不需要修改。该修改不会影响总线的正常工作，因为它仅在复位期间使用。

8. 发明授权

US06629252B1 Method for determining if a delay required before proceeding with the detected interrupt and exiting the interrupt without clearing the interrupt 有权
标题翻译：确定在执行检测到的中断和退出中断之前是否需要延迟而不清除中断的方法
公开(公告)号：US06629252B1
公开(公告)日：2003-09-30
申请号：US09428405
申请日：1999-10-28
申请人： Ghadir Robert Gholami , Chetan Mehta , John Daniel Upton
发明人： Ghadir Robert Gholami , Chetan Mehta , John Daniel Upton
IPC分类号： G06F1342
CPC分类号： G06F9/4812 , G06F13/24
摘要： A method and system for servicing an interrupt is presented. An interrupt handler associated with a detected interrupt is invoked, and a determination is made as to whether to instantiate a delay before further servicing of the detected interrupt. If a delay is neccesary before the detected may be fully serviced, a delay counter is initialized to a first predetermined value. The interrupt handler then exits without fully servicing the detected interrupt. During subsequent invocations, the interrupt handler decrements the delay counter and checks whether the delay counter has reached a second predetermined value. The interrupt handler is repeatedly invoked while the interrupt remains pending and while the delay counter does not equal the second predetermined value, the interrupt handler may then fully service the interrupt and clear the interrupt.
摘要翻译：介绍了一种用于维护中断的方法和系统。调用与检测到的中断相关联的中断处理程序，并且确定是否在检测到的中断的进一步服务之前实例化延迟。如果在检测到的可能被完全服务之前需要延迟，则将延迟计数器初始化为第一预定值。然后中断处理程序退出而不完全检查检测到的中断。在随后的调用期间，中断处理器递减延迟计数器并检查延迟计数器是否已达到第二预定值。中断处理程序在中断保持挂起的同时被重复调用，而延迟计数器不等于第二个预定值，则中断处理程序可以完全服务中断并清除中断。

9. 发明授权

US06297678B1 Circuit for rapidly charging a system net 失效
标题翻译：电路快速充电系统网
公开(公告)号：US06297678B1
公开(公告)日：2001-10-02
申请号：US09428402
申请日：1999-10-28
申请人： Ghadir Robert Gholami
发明人： Ghadir Robert Gholami
IPC分类号： H03K302
CPC分类号： H03K19/09429 , H03K19/01714
摘要： An electronic system, precharge circuit, and method for precharging system net. The system includes a plurality of devices. Each of the devices includes at least one I/O pin driven by an driver circuit. The system further includes a system net connected to at least one of the I/O pins of each of the plurality of devices. A precharge circuit suitable for connecting to the system net is provided. The precharge circuit includes a sense stage and a charging stage. The sense stage is configured to receive the system net voltage as an input and adapted to sense a system net voltage transition. The charging stage is connected to the system net and configured to receive an output of the sense stage. The sense stage is configured to activate the charging stage in response to detecting a system net voltage transition. The charging stage, upon activation, is configured to provide a current path between a supply voltage and the system net for a specified duration. After the specified duration, the current path is disabled.
摘要翻译：一种电子系统，预充电电路和系统网预充电方法。该系统包括多个装置。每个设备包括由驱动器电路驱动的至少一个I / O引脚。该系统还包括连接到多个设备中的每一个的至少一个I / O引脚的系统网络。提供了适于连接到系统网络的预充电电路。预充电电路包括感测级和充电级。感测级被配置为接收系统净电压作为输入并且适于感测系统净电压转换。充电阶段连接到系统网络，并配置为接收感测级的输出。感测级被配置为响应于检测到系统净电压转换来激活充电阶段。充电阶段在激活时被配置成在电源电压和系统网之间提供指定持续时间的电流路径。在指定的持续时间后，当前路径被禁用。

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