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1. 发明申请

US20080297131A1 BANDGAP REFERENCE CIRCUIT 有权
标题翻译：带宽参考电路
公开(公告)号：US20080297131A1
公开(公告)日：2008-12-04
申请号：US11756859
申请日：2007-06-01
申请人： Yan-Hua Peng , Uei-Shan Uang , Mei-Show Chen
发明人： Yan-Hua Peng , Uei-Shan Uang , Mei-Show Chen
IPC分类号： G05F3/20
CPC分类号： G05F3/30
摘要： A bandgap reference circuit includes a reference current generator for respectively generating a first reference current on a first current path and a second reference current on a second current path, a current mirror for generating a third reference current on a third current path based on the first and second reference currents, an operation amplifier for rendering the first reference current substantially identical to the second reference current and a feedback circuit for rendering a node voltage on the first current path substantially identical to another node voltage on the third current path, so as to eliminate possible errors caused by a channel length modulation effect in the current mirror.
摘要翻译：带隙参考电路包括：参考电流发生器，用于分别在第一电流路径上产生第一参考电流，在第二电流路径上产生第二参考电流;电流镜，用于基于第一电流路径产生第三电流路径上的第三参考电流和第二参考电流，用于使第一参考电流基本上与第二参考电流相同的运算放大器和用于使第一电流路径上的节点电压基本上与第三电流路径上的另一节点电压相同的反馈电路，以便消除由电流镜中的通道长度调制效应引起的误差。

2. 发明授权

US07834610B2 Bandgap reference circuit 有权
标题翻译：带隙参考电路
公开(公告)号：US07834610B2
公开(公告)日：2010-11-16
申请号：US11756859
申请日：2007-06-01
申请人： Yan-Hua Peng , Uei-Shan Uang , Mei-Show Chen
发明人： Yan-Hua Peng , Uei-Shan Uang , Mei-Show Chen
IPC分类号： G05F3/16
CPC分类号： G05F3/30
摘要： A bandgap reference circuit includes a reference current generator for respectively generating a first reference current on a first current path and a second reference current on a second current path, a current mirror for generating a third reference current on a third current path based on the first and second reference currents, an operation amplifier for rendering the first reference current substantially identical to the second reference current and a feedback circuit for rendering a node voltage on the first current path substantially identical to another node voltage on the third current path, so as to eliminate possible errors caused by a channel length modulation effect in the current mirror.
摘要翻译：带隙参考电路包括：参考电流发生器，用于分别在第一电流路径上产生第一参考电流，在第二电流路径上产生第二参考电流;电流镜，用于基于第一电流路径产生第三电流路径上的第三参考电流和第二参考电流，用于使第一参考电流基本上与第二参考电流相同的运算放大器和用于使第一电流路径上的节点电压基本上与第三电流路径上的另一节点电压相同的反馈电路，以便消除由电流镜中的通道长度调制效应引起的误差。

3. 发明授权

US07679352B2 Bandgap reference circuits 失效
标题翻译：带隙参考电路
公开(公告)号：US07679352B2
公开(公告)日：2010-03-16
申请号：US11755722
申请日：2007-05-30
申请人： Yan-Hua Peng , Uei-Shan Uang
发明人： Yan-Hua Peng , Uei-Shan Uang
IPC分类号： G05F3/20
CPC分类号： G05F3/30
摘要： A bandgap reference circuit comprises: a current generator for generating an output current, the current generator comprising a first reference unit and a plurality of second reference units arranged in parallel, where the current generator is capable of determining the magnitude of the output current according to the reference units; a first resistor, coupled between a first terminal of the first reference unit and a node, for transmitting a first current; a second resistor, coupled to the node and a first terminal of each second reference unit, for transmitting a second current; a third resistor, coupled between the node and an output terminal of the bandgap reference circuit, for transmitting a third current; and a current-to-voltage converter, coupled to the third resistor, for generating a bandgap voltage according to the output current and the third current.
摘要翻译：带隙参考电路包括：用于产生输出电流的电流发生器，所述电流发生器包括第一参考单元和并联布置的多个第二参考单元，其中所述电流发生器能够根据所述电流发生器确定所述输出电流的大小参考单位; 第一电阻器，耦合在所述第一参考单元的第一端子和节点之间，用于传输第一电流; 耦合到所述节点的第二电阻器和每个第二参考单元的第一端子，用于传输第二电流; 耦合在所述节点与所述带隙基准电路的输出端之间的第三电阻器，用于传输第三电流; 以及耦合到所述第三电阻器的电流 - 电压转换器，用于根据所述输出电流和所述第三电流产生带隙电压。

4. 发明申请

US20080297130A1 BANDGAP REFERENCE CIRCUITS 失效
标题翻译：带宽参考电路
公开(公告)号：US20080297130A1
公开(公告)日：2008-12-04
申请号：US11755722
申请日：2007-05-30
申请人： Yan-Hua Peng , Uei-Shan Uang
发明人： Yan-Hua Peng , Uei-Shan Uang
IPC分类号： G05F3/20
CPC分类号： G05F3/30
摘要： A bandgap reference circuit comprises: a current generator for generating an output current, the current generator comprising a first reference unit and a plurality of second reference units arranged in parallel, where the current generator is capable of determining the magnitude of the output current according to the reference units; a first resistor, coupled between a first terminal of the first reference unit and a node, for transmitting a first current; a second resistor, coupled to the node and a first terminal of each second reference unit, for transmitting a second current; a third resistor, coupled between the node and an output terminal of the bandgap reference circuit, for transmitting a third current; and a current-to-voltage converter, coupled to the third resistor, for generating a bandgap voltage according to the output current and the third current.
摘要翻译：带隙参考电路包括：用于产生输出电流的电流发生器，所述电流发生器包括第一参考单元和并联布置的多个第二参考单元，其中所述电流发生器能够根据所述电流发生器确定所述输出电流的大小参考单位; 第一电阻器，耦合在所述第一参考单元的第一端子和节点之间，用于传输第一电流; 耦合到所述节点的第二电阻器和每个第二参考单元的第一端子，用于传输第二电流; 耦合在所述节点与所述带隙基准电路的输出端之间的第三电阻器，用于传输第三电流; 以及耦合到所述第三电阻器的电流 - 电压转换器，用于根据所述输出电流和所述第三电流产生带隙电压。

5. 发明申请

US20080094130A1 SUPPLY-INDEPENDENT BIASING CIRCUIT 审中-公开
标题翻译：供应独立偏心电路
公开(公告)号：US20080094130A1
公开(公告)日：2008-04-24
申请号：US11751379
申请日：2007-05-21
申请人： Uei-Shan Uang , Shih-Hsuan Hsu , Yan-Hua Peng
发明人： Uei-Shan Uang , Shih-Hsuan Hsu , Yan-Hua Peng
IPC分类号： G05F1/08
CPC分类号： G05F3/267
摘要： A supply-independent biasing circuit applied to a bandgap reference circuit or a proportional to absolute temperature (PTAT) current generating circuit. The bandgap reference circuit or the PTAT current generating circuit includes a mirroring circuit, an operation amplifier, and an input circuit. The mirroring circuit including a plurality of first type FETs. The operation amplifier includes a first type FET connecting to a current input terminal of the operation amplifier. And, the supply-independent biasing circuit includes a first type FET having a gate connected to gates of the first type FETs in the mirroring circuit and having a drain acted as an output current path; and, a current mirror including a plurality of second type FETs and having a current receiving terminal connected to the output current path and having a current outputting terminal connected to the current input terminal of the operation amplifier.
摘要翻译：施加到带隙参考电路或与绝对温度（PTAT）电流发生电路成正比的电源独立偏置电路。带隙参考电路或PTAT电流产生电路包括镜像电路，运算放大器和输入电路。该镜电路包括多个第一类型的FET。运算放大器包括连接到运算放大器的电流输入端的第一类型FET。而且，独立于电源的偏压电路包括第一型FET，其栅极连接到反射电路中的第一类型FET的栅极并具有用作输出电流路径的漏极; 以及电流镜，包括多个第二类型FET，并且具有连接到输出电流路径的电流接收端子，并且具有连接到运算放大器的电流输入端子的电流输出端子。

6. 发明申请

US20090153252A1 MULTI-BAND VOLTAGE CONTROLLED OSCILLATOR CONTROLLING MODULE, PHASE LOCKED LOOP UTILIZING WHICH AND RELATED METHOD THEREOF 审中-公开
标题翻译：多电压控制振荡器控制模块，相位锁定环路及其相关方法
公开(公告)号：US20090153252A1
公开(公告)日：2009-06-18
申请号：US11955407
申请日：2007-12-13
申请人： Mei-Show Chen , Wei-Che Chung , Yan-Hua Peng
发明人： Mei-Show Chen , Wei-Che Chung , Yan-Hua Peng
IPC分类号： H03L7/085 , H03L7/00
CPC分类号： H03L7/113 , H03L7/0891 , H03L7/099 , H03L7/18
摘要： A multi-band VCO module includes a multi-band VCO and a controlling module. The multi-band VCO is for selecting a specific band from a plurality of bands according to a band selecting signal, and for outputting an oscillating signal according to a predetermined voltage and the specific band. The controlling module, coupled to the multi-band VCO, is for setting the band selecting signal according to a reference frequency of the reference signal and an oscillating frequency of the oscillating signal. A related method and a PLL circuit utilizing the multi-band VCO module are also disclosed.
摘要翻译：多频带VCO模块包括多频带VCO和控制模块。多频带VCO用于根据频带选择信号从多个频带选择特定频带，并根据预定电压和特定频带输出振荡信号。耦合到多频带VCO的控制模块用于根据参考信号的参考频率和振荡信号的振荡频率设置频带选择信号。还公开了利用多频带VCO模块的相关方法和PLL电路。

7. 发明授权

US08730634B2 ESD protection circuit 有权
标题翻译： ESD保护电路
公开(公告)号：US08730634B2
公开(公告)日：2014-05-20
申请号：US13437262
申请日：2012-04-02
申请人： Chia-Ku Tsai , Fu-Yi Tsai , Yan-Hua Peng
发明人： Chia-Ku Tsai , Fu-Yi Tsai , Yan-Hua Peng
IPC分类号： H02H3/22
CPC分类号： H02H9/046
摘要： Electrostatic discharge (ESD) protection circuit including a first silicon controlled rectifier (SCR) and a trigger circuit; the trigger circuit including a first MOS transistor and a second transistor, triggering the first SCR and providing a second SCR shunt with the first SCR during ESD.
摘要翻译：包括第一可控硅整流器（SCR）和触发电路的静电放电（ESD）保护电路; 所述触发电路包括第一MOS晶体管和第二晶体管，在ESD期间触发所述第一SCR并提供与所述第一SCR的第二SCR分流。

8. 发明授权

US07486210B1 DWA structure and method thereof, digital-to-analog signal conversion method and signal routing method 失效
标题翻译： DWA结构及其方法，数模转换方式和信号路由方式
公开(公告)号：US07486210B1
公开(公告)日：2009-02-03
申请号：US11835094
申请日：2007-08-07
申请人： Ghia-Ming Hong , Chia-Wei Chang , Yan-Hua Peng , Kuang-Chih Liu , Chung-Fu Lin
发明人： Ghia-Ming Hong , Chia-Wei Chang , Yan-Hua Peng , Kuang-Chih Liu , Chung-Fu Lin
IPC分类号： H03M7/00
CPC分类号： H03M1/0665 , H03M1/804 , H03M3/502 , H03M7/165 , H03M7/3026
摘要： A data weighted average (DWA) structure including a first delay unit, a binary to thermometer code converter, an adder, a second delay unit, a decoder, a barrel shifter, and a plurality of signal lines is provided. The first delay unit delays an input digital signal. The binary to thermometer code converter converts an output signal of the first delay unit into a thermal code. The second delay unit delays an output signal of the adder. The adder adds the input digital signal to an output signal of the second delay unit. The decoder decodes the output signal of the second delay unit. The barrel shifter generates an output signal from the thermal code in accordance with an output signal of the decoder. The signal lines route the output signal of the barrel shifter into two independent control signal groups.
摘要翻译：提供了包括第一延迟单元，二进制到温度计代码转换器，加法器，第二延迟单元，解码器，桶形移位器和多个信号线的数据加权平均（DWA）结构。第一延迟单元延迟输入数字信号。二进制到温度计代码转换器将第一延迟单元的输出信号转换成热代码。第二延迟单元延迟加法器的输出信号。加法器将输入数字信号加到第二延迟单元的输出信号上。解码器解码第二延迟单元的输出信号。桶形移位器根据解码器的输出信号从热代码生成输出信号。信号线将桶形移位器的输出信号路由到两个独立的控制信号组。

9. 发明授权

US08749931B2 Electrostatic discharge protection apparatus 有权
标题翻译：静电放电保护装置
公开(公告)号：US08749931B2
公开(公告)日：2014-06-10
申请号：US13456204
申请日：2012-04-25
申请人： Fu-Yi Tsai , Chia-Ku Tsai , Yan-Hua Peng , Ming-Dou Ker
发明人： Fu-Yi Tsai , Chia-Ku Tsai , Yan-Hua Peng , Ming-Dou Ker
IPC分类号： H02H9/00 , H02H1/00 , H02H1/04 , H02H3/22 , H02H9/06
CPC分类号： H01L27/027
摘要： An electrostatic discharge (ESD) protection apparatus includes at least one first transistor and at least one second transistor. The first transistor includes a control terminal, a first terminal, a second terminal, and a bulk. The control terminal and the second terminal of the first transistor are coupled to each other. The first terminal of the first transistor is coupled to one of a pad and a power rail line. Likewise, the second transistor also includes a control terminal, a first terminal, and a second terminal. The first terminal of the second transistor is coupled to the bulk of the first transistor, the bulk of the second transistor is coupled to the second terminal of the first transistor, and the second terminal of the second transistor is coupled to the other of the pad and the power rail line.
摘要翻译：静电放电（ESD）保护装置包括至少一个第一晶体管和至少一个第二晶体管。第一晶体管包括控制端子，第一端子，第二端子和体积。第一晶体管的控制端子和第二端子彼此耦合。第一晶体管的第一端子耦合到焊盘和电力轨线之一。类似地，第二晶体管还包括控制端子，第一端子和第二端子。第二晶体管的第一端子耦合到第一晶体管的大部分，第二晶体管的主体耦合到第一晶体管的第二端子，第二晶体管的第二端子耦合到衬垫的另一个和电力线。

10. 发明申请

US20130044397A1 ESD PROTECTION CIRCUIT 有权
标题翻译： ESD保护电路
公开(公告)号：US20130044397A1
公开(公告)日：2013-02-21
申请号：US13529075
申请日：2012-06-21
申请人： Fu-Yi Tsai , Yan-Hua Peng , Chia-Ku Tsai , Ming-Dou Ker
发明人： Fu-Yi Tsai , Yan-Hua Peng , Chia-Ku Tsai , Ming-Dou Ker
IPC分类号： H02H9/04
CPC分类号： H02H9/046 , H01L27/0266
摘要： ESD protection circuit including a resistor and at least one protection transistor; the resistor coupled between an I/O signal node and an internal node of internal circuit, the protection transistors serially coupled between the internal node and a voltage node with each protection transistor comprising a gate and a drain which is coupled to the gate.
摘要翻译： ESD保护电路包括电阻器和至少一个保护晶体管; 所述电阻器耦合在I / O信号节点和内部电路的内部节点之间，所述保护晶体管串联耦合在所述内部节点和电压节点之间，每个保护晶体管包括耦合到所述栅极的栅极和漏极。

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