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1. 发明授权

US07564398B2 Method and apparatus for ad conversion, semiconductor device for detecting distribution of physical quantity, and electronic apparatus 有权
标题翻译：用于广告转换的方法和装置，用于检测物理量分布的半导体器件和电子设备
公开(公告)号：US07564398B2
公开(公告)日：2009-07-21
申请号：US11532158
申请日：2006-09-15
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H03M1/50
CPC分类号： H04N5/378 , H03M1/1019 , H03M1/123 , H03M1/56 , H04N5/335 , H04N5/3575 , H04N5/363
摘要： A column analog-to-digital converter having a voltage comparator and a counter is arranged for each a vertical signal line. The voltage comparator compares a pixel signal inputted via the vertical signal line at each row control signal line with a reference voltage, thereby generating a pulse signal having a length in time axis corresponding to the magnitude of a reset component and a signal component. The counter counts a clock to measure the width of the pulse signal until the end of the comparison operation of the comparator, and stores a count at the end of the comparison. A communication and timing controller controls the voltage comparator and the counter so that, in a first process, the voltage comparator performs a comparison operation on a reset component with the counter performing a down-counting operation, and so that, in a second process, the voltage controller performs the comparison operation on a signal component with the counter performing an up-counting operation.
摘要翻译：具有电压比较器和计数器的列模数转换器为每个垂直信号线布置。电压比较器将在每个行控制信号线处经由垂直信号线输入的像素信号与参考电压进行比较，从而产生具有对应于复位分量和信号分量的幅度的时间轴长度的脉冲信号。计数器对时钟进行计数，以测量脉冲信号的宽度，直到比较器的比较操作结束，并在比较结束时存储计数。通信和定时控制器控制电压比较器和计数器，使得在第一处理中，电压比较器对计数器执行递减计数操作对复位分量执行比较操作，并且在第二处理中，电压控制器对计数器执行向上计数操作对信号分量执行比较操作。

2. 发明授权

US07804535B2 AD conversion method and semiconductor device for use in physical quantity distribution detection 有权
标题翻译： AD转换方法和用于物理量分布检测的半导体器件
公开(公告)号：US07804535B2
公开(公告)日：2010-09-28
申请号：US11119289
申请日：2005-04-30
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H04N9/083 , H04N3/14 , H04N5/335 , H04N9/04 , H03M1/12
CPC分类号： H04N9/083
摘要： In a solid-state imaging device meeting color image pickup, which an AD converter is mounted on the same chip, the circuit scale and the number of transmission signal lines are reduced and a reference signal suitable for color image pickup is fed to an AD conversion comparing portion. DA converter circuits for two pixels of a repeat unit of a separation filter in the horizontal row direction in a unit of readout are prepared as a functional portion to generate a reference signal for AD conversion. The DA converter circuits generate the reference signals having a tilt in accordance with a color property and varying from an initial value based on a non-color property such as a black reference and a circuit offset. Each reference signal independently outputted from the DA converter circuits is basically directly transmitted through common signal lines to a voltage comparing portion which corresponds to color filters having a common color property through independent signal lines.
摘要翻译：在满足将AD转换器安装在同一芯片上的彩色图像拾取的固态成像装置中，电路规模和发送信号线的数量减少，并且适合于彩色图像拾取的参考信号被馈送到AD转换比较部分。作为功能部分准备水平行方向上的读出单位的分离滤波器的重复单元的两个像素的DA转换器电路，以产生用于AD转换的参考信号。 DA转换器电路根据颜色属性产生具有倾斜的参考信号，并且基于诸如黑色参考和电路偏移的非彩色特性从初始值变化。从DA转换器电路独立地输出的每个参考信号基本上通过公共信号线直接传输到通过独立信号线对应于具有共同的颜色属性的滤色器的电压比较部分。

3. 发明授权

US07786921B2 Data processing method, data processing apparatus, semiconductor device, and electronic apparatus 有权
标题翻译：数据处理方法，数据处理装置，半导体装置和电子装置
公开(公告)号：US07786921B2
公开(公告)日：2010-08-31
申请号：US11179772
申请日：2005-07-12
申请人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiro Yasui
发明人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiro Yasui
IPC分类号： H03M1/34
CPC分类号： G06K9/60 , H04N5/367
摘要： In a solid-state imaging device with an AD converter mounted on the same chip, to enable an efficient product-sum operation while reducing the size of the circuit scale and the number of transmission signal lines. A pixel signal during an n-row readout period is compared with a reference signal for digitizing this pixel signal, and a counting operation is performed in one of a down-counting mode and an up-counting mode while the comparison processing is being performed, and then, the count value when the comparison processing is finished is stored. Subsequently, by using the n-row counting result as the initial value, a pixel signal during an (n+1)-row readout period is compared with the reference signal for digitizing this pixel signal, and also, the counting operation is performed in one of the down-counting mode and the up-counting mode, and then, the count value when the comparison processing is finished is stored. If the count mode for the n+1 row is set to be opposite to the count mode for the n row, the count value obtained by the counting operation for the n+1 row is a subtraction result. If the count modes for the n+1 row and the n row are set to be the same, the count value obtained by the counting operation for the n+1 row is an addition result.
摘要翻译：在具有安装在同一芯片上的AD转换器的固态成像装置中，能够在减小电路规模和发送信号线的数量的同时实现有效的乘积和运算。将n行读出期间的像素信号与用于数字化该像素信号的参考信号进行比较，并且在执行比较处理时以递减计数模式和递增计数模式中的一个进行计数操作，然后存储比较处理结束时的计数值。随后，通过使用n行计数结果作为初始值，将第（n + 1）行读出期间的像素信号与用于数字化该像素信号的参考信号进行比较，并且还进行计数操作下计数模式和向上计数模式之一，然后存储比较处理结束时的计数值。如果将n + 1行的计数模式设置为与n行的计数模式相反，则通过n + 1行的计数操作获得的计数值是减法结果。如果将n + 1行和n行的计数模式设置为相同，则通过n + 1行的计数操作获得的计数值是相加结果。

4. 发明授权

US07629914B2 Counter circuit, AD conversion method, AD converter, semiconductor device for detecting distribution of physical quantities, and electronic apparatus 有权
标题翻译：计数器电路，AD转换方法，AD转换器，用于检测物理量分布的半导体器件和电子设备
公开(公告)号：US07629914B2
公开(公告)日：2009-12-08
申请号：US12329682
申请日：2008-12-08
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H03M1/34
CPC分类号： H03K23/62 , H03K23/56 , H03M1/1023 , H03M1/123 , H03M1/1295 , H03M1/56 , H04N5/335
摘要： A solid-state image pick up device including a pixel array unit having unit pixels arranged in a matrix pattern. Each unit pixel includes a photoelectric converter. Additionally, the solid-state image pick up device has column signal lines that correspond to the respective columns of the matrix pattern, a row scanning means for selectively controlling each unit pixel, and an analog-digital converting unit for converting analog signals output from the unit pixels in a row selectively controlled by the row scanning means. The analog-digital converting unit further includes an asynchronous counter which performs counting in two modes and the asynchronous counter includes a counter processor configured so that when switching between the count modes occurs, a running count value is broken and there is an interval between the count modes and when a mode begins the running count value is reset to the value before the running count value was broken.
摘要翻译：一种固态图像拾取装置，包括具有以矩阵图案排列的单位像素的像素阵列单元。每个单位像素包括光电转换器。此外，固态图像拾取装置具有与矩阵图案的各列相对应的列信号线，用于选择性地控制每个单位像素的行扫描装置，以及用于转换从单元像素输出的模拟信号的模拟数字转换单元由行扫描装置选择性地控制的行中的单位像素。模拟数字转换单元还包括以两种模式执行计数的异步计数器，并且异步计数器包括配置为当在计数模式之间切换时发生计数模式的计数器处理器，运行计数值被破坏并且计数之间存在间隔模式，当模式开始时，运行计数值将重置为运行计数值中断之前的值。

5. 发明授权

US07567280B2 Solid-state imaging device, analogue-digital converting method in solid-state imaging device and imaging apparatus 有权
标题翻译：固态成像装置，固态成像装置和成像装置中的模拟数字转换方法
公开(公告)号：US07567280B2
公开(公告)日：2009-07-28
申请号：US11421819
申请日：2006-06-02
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H04N3/14 , H03M1/12
CPC分类号： H04N5/378 , H04N5/3575 , H04N5/37455
摘要： The present invention provides a solid-state imaging device including: a pixel array block; a row scanning device; and an analogue-digital conversion device, the analogue-digital conversion device including: a comparing device having a reset device; a counting device that counts a comparison period from initiation to completion of comparison performed by the comparing device; and a changing device that changes a voltage at the other input terminal to a predetermined voltage after a resetting operation performed by the reset device.
摘要翻译：本发明提供一种固态成像装置，包括：像素阵列块; 一排扫描装置; 和模拟数字转换装置，所述模拟数字转换装置包括：具有复位装置的比较装置; 计数装置，对由所述比较装置执行的比较的开始到完成的比较期间进行计数; 以及改变装置，其在由复位装置执行的复位操作之后将另一输入端子处的电压改变为预定电压。

6. 发明申请

US20080231491A1 Analog-to-Digital Conversion Method, Analog-to-Digital Converter, Semiconductor Device for Detecting Distribution of Physical Quantity, and Electronic Apparatus 有权
标题翻译：模拟数字转换方法，模数转换器，用于检测物理量分布的半导体器件和电子设备
公开(公告)号：US20080231491A1
公开(公告)日：2008-09-25
申请号：US11462429
申请日：2006-08-04
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H03M1/34 , H01L27/146
CPC分类号： H03M1/1295 , H03K5/2481 , H03K5/249 , H03M1/1023 , H03M1/123 , H03M1/56 , H04N5/378
摘要： In an analog-to-digital conversion method for converting a difference signal component representing a difference between a reference component and a signal component in an analog signal to be processed into digital data, in a first process, a signal corresponding to one of the reference component and the signal component is compared with a reference signal for conversion into the digital data. Concurrently with the comparison, counting is performed in one of a down-count mode and an up-count mode, and a count value at a time of completion of the comparison is held. In a second process, a signal corresponding to the other one of the reference component and the signal component is compared with the reference signal. Concurrently with the comparison, counting is performed in the other one of the down-count mode and the up-count mode, and a count value at a time of completion of the comparison is held.
摘要翻译：在用于将表示待处理的模拟信号中的参考分量和信号分量之间的差的差信号分量转换为数字数据的模数转换方法中，在第一处理中，对应于参考将信号分量与参考信号进行比较，以转换成数字数据。与比较同时，以递减计数模式和递增计数模式中的一个进行计数，并且保持比较完成时的计数值。在第二过程中，将与参考分量和信号分量中的另一个相对应的信号与参考信号进行比较。与比较同时，在下计数模式和向上计数模式中的另一个中执行计数，并且保持比较完成时的计数值。

7. 发明申请

US20070024730A1 METHOD AND APPARATUS FOR AD CONVERSION, SEMICONDUCTOR DEVICE FOR DETECTING DISTRIBUTION OF PHYSICAL QUANTITY, AND ELECTRONIC APPARATUS 有权
公开(公告)号：US20070024730A1
公开(公告)日：2007-02-01
申请号：US11532260
申请日：2006-09-15
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H04N5/335
CPC分类号： H04N5/378 , H03M1/1019 , H03M1/123 , H03M1/56 , H04N5/335 , H04N5/3575 , H04N5/363
摘要： A column analog-to-digital converter having a voltage comparator and a counter is arranged for each a vertical signal line. The voltage comparator compares a pixel signal inputted via the vertical signal line at each row control signal line with a reference voltage, thereby generating a pulse signal having a length in time axis corresponding to the magnitude of a reset component and a signal component. The counter counts a clock to measure the width of the pulse signal until the end of the comparison operation of the comparator, and stores a count at the end of the comparison. A communication and timing controller controls the voltage comparator and the counter so that, in a first process, the voltage comparator performs a comparison operation on a reset component with the counter performing a down-counting operation, and so that, in a second process, the voltage controller performs the comparison operation on a signal component with the counter performing an up-counting operation.

8. 发明申请

US20070024728A1 METHOD AND APPARATUS FOR AD CONVERSION, SEMICONDUCTOR DEVICE FOR DETECTING DISTRIBUTION OF PHYSICAL QUANTITY, AND ELECTRONIC APPARATUS 有权
标题翻译：用于AD转换的方法和装置，用于检测物理分布的半导体装置和电子装置
公开(公告)号：US20070024728A1
公开(公告)日：2007-02-01
申请号：US11532158
申请日：2006-09-15
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H04N5/335
CPC分类号： H04N5/378 , H03M1/1019 , H03M1/123 , H03M1/56 , H04N5/335 , H04N5/3575 , H04N5/363
摘要： A column analog-to-digital converter having a voltage comparator and a counter is arranged for each a vertical signal line. The voltage comparator compares a pixel signal inputted via the vertical signal line at each row control signal line with a reference voltage, thereby generating a pulse signal having a length in time axis corresponding to the magnitude of a reset component and a signal component. The counter counts a clock to measure the width of the pulse signal until the end of the comparison operation of the comparator, and stores a count at the end of the comparison. A communication and timing controller controls the voltage comparator and the counter so that, in a first process, the voltage comparator performs a comparison operation on a reset component with the counter performing a down-counting operation, and so that, in a second process, the voltage controller performs the comparison operation on a signal component with the counter performing an up-counting operation.
摘要翻译：具有电压比较器和计数器的列模数转换器为每个垂直信号线布置。电压比较器将在每个行控制信号线处经由垂直信号线输入的像素信号与参考电压进行比较，从而产生具有对应于复位分量和信号分量的幅度的时间轴长度的脉冲信号。计数器对时钟进行计数，以测量脉冲信号的宽度，直到比较器的比较操作结束，并在比较结束时存储计数。通信和定时控制器控制电压比较器和计数器，使得在第一处理中，电压比较器对计数器执行递减计数操作对复位分量执行比较操作，并且在第二处理中，电压控制器对计数器执行向上计数操作对信号分量执行比较操作。

9. 发明申请

US20050206548A1 Method and apparatus for AD conversion, semiconductor device for detecting distribution of physical quantity, and electronic apparatus 有权
标题翻译：用于AD转换的方法和装置，用于检测物理量分布的半导体器件和电子设备
公开(公告)号：US20050206548A1
公开(公告)日：2005-09-22
申请号：US11059587
申请日：2005-02-16
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H03M1/10 , H03M1/12 , H03M1/56 , H04N5/335 , H04N5/355 , H04N5/357 , H04N5/363 , H04N5/378 , H04N7/04
CPC分类号： H04N5/378 , H03M1/1019 , H03M1/123 , H03M1/56 , H04N5/335 , H04N5/3575 , H04N5/363
摘要： A column analog-to-digital converter having a voltage comparator and a counter is arranged for each a vertical signal line. The voltage comparator compares a pixel signal inputted via the vertical signal line at each row control signal line with a reference voltage, thereby generating a pulse signal having a length in time axis corresponding to the magnitude of a reset component and a signal component. The counter counts a clock to measure the width of the pulse signal until the end of the comparison operation of the comparator, and stores a count at the end of the comparison. A communication and timing controller controls the voltage comparator and the counter so that, in a first process, the voltage comparator performs a comparison operation on a reset component with the counter performing a down-counting operation, and so that, in a second process, the voltage controller performs the comparison operation on a signal component with the counter performing an up-counting operation.
摘要翻译：具有电压比较器和计数器的列模数转换器为每个垂直信号线布置。电压比较器将在每个行控制信号线处经由垂直信号线输入的像素信号与参考电压进行比较，从而产生具有对应于复位分量和信号分量的幅度的时间轴长度的脉冲信号。计数器对时钟进行计数，以测量脉冲信号的宽度，直到比较器的比较操作结束，并在比较结束时存储计数。通信和定时控制器控制电压比较器和计数器，使得在第一处理中，电压比较器对计数器执行递减计数操作对复位分量执行比较操作，并且在第二处理中，电压控制器对计数器执行向上计数操作对信号分量执行比较操作。

10. 发明授权

US07315273B2 Analog-to-digital conversion method, analog-to-digital converter, semiconductor device for detecting distribution of physical quantity, and electronic apparatus 有权
公开(公告)号：US07315273B2
公开(公告)日：2008-01-01
申请号：US11268428
申请日：2005-11-07
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H03M1/34
CPC分类号： H03M1/1295 , H03K5/2481 , H03K5/249 , H03M1/1023 , H03M1/123 , H03M1/56 , H04N5/378
摘要： In an analog-to-digital conversion method for converting a difference signal component representing a difference between a reference component and a signal component in an analog signal to be processed into digital data, in a first process, a signal corresponding to one of the reference component and the signal component is compared with a reference signal for conversion into the digital data. Concurrently with the comparison, counting is performed in one of a down-count mode and an up-count mode, and a count value at a time of completion of the comparison is held. In a second process, a signal corresponding to the other one of the reference component and the signal component is compared with the reference signal. Concurrently with the comparison, counting is performed in the other one of the down-count mode and the up-count mode, and a count value at a time of completion of the comparison is held.

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