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1. 发明申请

US20190212248A1 RECORDING MEDIUM RECORDING DISTORTION CALCULATION PROGRAM, DISTORTION CALCULATION METHOD, AND INFORMATION PROCESSING APPARATUS OF CALCULATING DISTORTION 审中-公开
公开(公告)号：US20190212248A1
公开(公告)日：2019-07-11
申请号：US16239585
申请日：2019-01-04
申请人： FUJITSU LIMITED
发明人： MAMI NAKADATE , Kanako IMAI , Yukari Sato
IPC分类号： G01N19/08 , G01N3/08 , G01N19/04 , G06F17/50
CPC分类号： G01N19/08 , G01N3/08 , G01N19/04 , G06F17/5009 , G06F2217/76
摘要： A non-transitory computer-readable recording medium storing a distortion calculation program that causes a computer to execute a process includes: analyzing a distortion which occurs in an object when stress is applied, referring to a storage which stores a distortion amplitude for each of nodes of a mesh which is created for the object, moving, onto a circumference which is determined by a set radius, one or more nodes within a width set from the circumference by using a point selected from the nodes of the mesh as a starting point, creating a distribution chart of values of the distortion amplitude of the one or more nodes on the circumference after movement, and displaying the distribution chart on a display device.

2. 发明授权

US09823990B2 System and process for accounting for aging effects in a computing device 有权
公开(公告)号：US09823990B2
公开(公告)日：2017-11-21
申请号：US13604283
申请日：2012-09-05
申请人： Brad Simeral
发明人： Brad Simeral
IPC分类号： G06F11/30 , G06F17/50 , G06F11/34 , G01R31/00 , G06F17/00 , G01R31/28
CPC分类号： G06F11/3058 , G01R31/00 , G01R31/2855 , G06F11/3003 , G06F11/3409 , G06F17/00 , G06F17/5009 , G06F2217/76
摘要： Embodiments of the claimed subject matter are directed to methods and systems that allow tracking and accounting of wear and other aging effects in integrated circuits and products which include integrated circuits over time, and the dynamic adjustment of operating conditions to increase or decrease wear in response to the accumulated wear relative to the expected wear during the lifetime of the circuit and/or product.

3. 发明申请

US20170293712A1 PROBABILISTIC LOAD AND DAMAGE MODELING FOR FATIGUE LIFE MANAGEMENT 审中-公开
公开(公告)号：US20170293712A1
公开(公告)日：2017-10-12
申请号：US15095313
申请日：2016-04-11
申请人： AIRBUS HELICOPTERS DEUTSCHLAND GmbH
发明人： Sam DEKKER , Georg WURZEL
IPC分类号： G06F17/50 , G06N7/00 , G06N99/00
CPC分类号： G06F17/5095 , G06F17/5009 , G06F2217/10 , G06F2217/76 , G06N7/005 , G06N99/005
摘要： A fatigue life management system for determining a remaining fatigue life of a component of an aircraft. The fatigue life management system may generate probability density functions of minimum load, maximum load, and timeframe damage for predetermined time intervals based on selected flight data of the aircraft and regression models for probabilistic prediction of minimum load, maximum load, and timeframe damage of the component. The fatigue life management system may further compute an accumulated fatigue damage estimation based on the probability density functions and a probabilistic fatigue strength model. The fatigue life management system may then generate a distribution of the accumulated fatigue damage estimation of the component. If desired, the processing circuit may compare the distribution of the accumulated fatigue damage estimation with a reliability requirement to determine the remaining fatigue life of the component.

4. 发明授权

US09768767B2 Aging-based leakage energy reduction method and system 有权
公开(公告)号：US09768767B2
公开(公告)日：2017-09-19
申请号：US15336808
申请日：2016-10-28
申请人： EMPIRE TECHNOLOGY DEVELOPMENT LLC
发明人： Miodrag Potkonjak
IPC分类号： H03K17/16 , G06F17/50 , H01L21/28 , H01L29/40 , H01L21/326 , H01L21/8234 , H01L21/66
CPC分类号： H03K17/161 , G06F17/5045 , G06F2217/76 , G06F2217/78 , G06F2217/84 , H01L21/28 , H01L21/326 , H01L21/823437 , H01L22/14 , H01L22/20 , H01L29/408 , H03K2217/0036
摘要： A technique of reducing leakage energy associated with a post-silicon target circuit is generally described herein. One example method includes purposefully aging a plurality of gates in the target circuit based on a targeted metric including a timing constraint associated with the target circuit.

5. 发明授权

US09734271B2 Method of determining galvanic corrosion and interconnect structure in a semiconductor device for prevention of galvanic corrosion 有权
公开(公告)号：US09734271B2
公开(公告)日：2017-08-15
申请号：US14965661
申请日：2015-12-10
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
发明人： Yu Ching Lee , Jian-Hong Lin , Te-Liang Lee , Jyh-Weei Hsia
IPC分类号： H01L27/10 , H01L29/73 , G06F17/50 , H01L27/06 , H01L23/535 , H01L29/861 , H01L29/423
CPC分类号： G06F17/5045 , G06F17/5081 , G06F2217/76 , H01L23/535 , H01L27/0255 , H01L27/0629 , H01L29/0649 , H01L29/42364 , H01L29/861 , H01L29/8613
摘要： In some embodiments, in a method for a semiconductor device having an interconnect structure, a design layout is received. A metal line in the design layout is identified, which has at least one via thereon and does not couple downward with an oxide diffusion region. The area of a gate oxide coupled with the metal line is obtained from the design layout. The method comprises determining whether the area of the gate oxide is greater than a first predetermined value. When the area of the gate oxide is greater than the first predetermined value, a charge release path is coupled with the metal line.

6. 发明申请

US20170206295A1 Method For Determining System Reliability Of A Logic Circuit 审中-公开
公开(公告)号：US20170206295A1
公开(公告)日：2017-07-20
申请号：US15328321
申请日：2015-07-22
申请人： Siemens AG Oesterreich
发明人： Christian CECH , Bernhard Fischer , Thomas HINTERSTOISSER , Martin MATSCHNIG
IPC分类号： G06F17/50 , G06F11/07
CPC分类号： G06F17/5036 , G06F11/0736 , G06F11/076 , G06F11/079 , G06F11/24 , G06F17/5022 , G06F2217/76 , G06F2217/78 , G06F2217/80
摘要： A method for determining system reliability of a logic circuit, wherein a functional component model for design/simulation of a circuit model of the logic circuit is created, where functional components model are expanded by adding an associated power model, a temperature model, and a reliability, where the logic circuit is constructed with expanded model components and, based on simulation of the logic circuit aided by the constructed circuit model, a functional, a power-dependent, and a temperature-dependent behavior and a temperature-dependent failure rate are derived for each component in a component specific manner for a specified application case, and where in addition to the functional behavior, a power and temperature behavior and a total failure rate can be determined simply and dynamically, based on the derived data and dependent on temperature and simulation time for the logic circuit for the specified application case.

7. 发明授权

US09405883B2 Power rail for preventing DC electromigration 有权
公开(公告)号：US09405883B2
公开(公告)日：2016-08-02
申请号：US14857212
申请日：2015-09-17
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
发明人： Chin-Shen Lin , Jerry Chang-Jui Kao , Nitesh Katta , Chou-Kun Lin , Yi-Chuin Tsai , Chi-Yeh Yu , Kuo-Nan Yang
IPC分类号： G06F17/50 , H01L23/522 , H01L23/528
CPC分类号： G06F17/5081 , G06F17/5077 , G06F2217/76 , G06F2217/78 , G06F2217/82 , H01L23/5226 , H01L23/5286 , H01L2924/0002 , H01L2924/00
摘要： A method is disclosed that includes the operations outlined below. A first criteria is determined to be met when directions of a first current and a second current around a first end and a second end of a metal segment respectively are opposite, in which the metal segment is a part of a power rail in at least one design file of a semiconductor device and is enclosed by only two terminal via arrays. A second criteria is determined to be met when a length of the metal segment is not larger than a electromigration critical length. The metal segment is included in the semiconductor device with a first current density limit depending on the length of the metal segment when the first and the second criteria are met.

8. 发明申请

US20160034621A1 Numerical Simulation Of Crack Propagation Due To Metal Fatigue 审中-公开
标题翻译：金属疲劳裂纹扩展的数值模拟
公开(公告)号：US20160034621A1
公开(公告)日：2016-02-04
申请号：US14450643
申请日：2014-08-04
申请人： Livermore Software Technology Corporation
发明人： Yun Huang
IPC分类号： G06F17/50
CPC分类号： G06F17/5018 , G06F2217/76
摘要： FEA model representing a metal object subjected to expected random vibration loadings during a predefined time period is received. Structural dynamic characteristics and responses of the FEA model are obtained. Cumulative damage ratios of all finite elements are computed using the obtained structural dynamic responses along with a S-N curve for the metal object, and predefined time period. Time and location of fatigue failure in the FEA model are determined by identifying which one of the finite elements fails first. The identified failed finite element's cumulative damage ratio reaches unity first. The FEA model is revised by removing the identified failed finite element. Then the revised FEA model is used for repeating the process of identifying another fatigue failure until the determined time of fatigue failure has passed the predefined time period. All identified failed finite elements represent simulated fatigue crack propagation.
摘要翻译：接收表示在预定时间段内经受预期的随机振动加载的金属物体的FEA模型。获得了FEA模型的结构动力特性和响应。使用获得的结构动态响应以及金属物体的S-N曲线和预定时间段来计算所有有限元的累积损伤比。 FEA模型中疲劳失效的时间和位置通过确定哪一个有限元首先失效来确定。确定的故障有限元累积损伤率首先达到统一。通过删除确定的故障有限元修改FEA模型。然后，经修订的FEA模型用于重复确定另一个疲劳故障的过程，直到确定的疲劳失效时间已经过了预定义的时间段。所有确定的故障有限元表示模拟疲劳裂纹扩展。

9. 发明申请

US20150234961A1 METHOD AND APPARATUS FOR CIRCUIT RELIABILITY AGING 审中-公开
标题翻译：电路可靠性老化的方法与装置
公开(公告)号：US20150234961A1
公开(公告)日：2015-08-20
申请号：US14558694
申请日：2014-12-02
申请人： Zhichen Zhang , Xavier Hours , Mehul D. Shroff , Chuanzheng Wang , Qilin Zhang
发明人： Zhichen Zhang , Xavier Hours , Mehul D. Shroff , Chuanzheng Wang , Qilin Zhang
IPC分类号： G06F17/50
CPC分类号： G06F17/5036 , G06F2217/76
摘要： A method for integrated circuit reliability aging simulation includes dividing a target time period into N stages including a first stage and a second stage; obtaining first parameter values of a reliability model for the first stage; performing a first simulation on the circuit based on the reliability model and the first parameter values to obtain first aging results; obtaining second parameter values of the reliability model for the second stage; and performing a second simulation on the circuit based on the reliability model and the second parameter values to obtain second aging results.
摘要翻译：一种用于集成电路可靠性老化模拟的方法，包括将目标时间段划分为包括第一阶段和第二阶段的N个阶段; 获得第一阶段的可靠性模型的第一参数值; 基于可靠性模型和第一参数值在电路上执行第一模拟以获得第一老化结果; 获得第二阶段的可靠性模型的第二参数值; 以及基于所述可靠性模型和所述第二参数值在所述电路上执行第二仿真以获得第二老化结果。

10. 发明授权

US08949087B2 System and method for structural analysis 有权
标题翻译：结构分析系统和方法
公开(公告)号：US08949087B2
公开(公告)日：2015-02-03
申请号：US13409771
申请日：2012-03-01
申请人： Matthew Joseph Oliverius , Naveena Mallikarjunaiah , Mel Eshghi , Chandrashekar Ramachandran , Venkata Narasimha Ravi Udali
发明人： Matthew Joseph Oliverius , Naveena Mallikarjunaiah , Mel Eshghi , Chandrashekar Ramachandran , Venkata Narasimha Ravi Udali
IPC分类号： G06F17/50
CPC分类号： G06F17/5095 , G06F17/5018 , G06F2217/46 , G06F2217/76
摘要： A method of analyzing a structural component may include the step of storing one or more of the following on a server: at least one material allowable for a structural component, at least one load case for the structural component, and at least one analysis template having at least one analysis variable. The method may further include the step of providing, using an interface, at least one entry for the analysis variable. The method may further include performing, using a processor-based structural component analyzer, a strength analysis of the structural component using the analysis template and based on the load case and the entry for the analysis variable. The method may further include determining, using the analyzer, a margin of safety of the structural component based on the material allowable.
摘要翻译：分析结构部件的方法可以包括以下步骤：将一个或多个以下内容存储在服务器上：至少一种材料可以被允许用于结构部件，至少一个用于结构部件的装载壳体，以及至少一个分析模板，其具有至少一个分析变量。该方法还可以包括以下步骤：使用接口提供用于分析变量的至少一个条目。该方法还可以包括使用基于处理器的结构组件分析器，使用分析模板并基于负载情况和分析变量的输入来执行结构组件的强度分析。该方法还可以包括基于允许的材料来确定使用分析器的结构部件的安全边界。

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