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1. 发明授权

US09966134B1 Non-volatile resistive random-access memory device with reliable operation indicator, device-to-device uniformity, and multilevel cell storage, and method of manufacturing the same 有权
公开(公告)号：US09966134B1
公开(公告)日：2018-05-08
申请号：US15407357
申请日：2017-01-17
申请人： KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
发明人： Jong Hyuk Park , Sang-Soo Lee , Keun-Young Shin , Young Jin Kim , Min Park , Heesuk Kim , Jeong Gon Son , Wan Ki Bae
IPC分类号： G11C13/00 , H01L45/00 , H01L27/11
CPC分类号： H01L45/1253 , G11C11/5685 , G11C13/0002 , G11C13/0007 , G11C13/0016 , G11C13/003 , G11C13/004 , G11C13/0069 , G11C2013/0073 , G11C2213/52 , G11C2213/71 , G11C2213/77 , H01L27/11 , H01L27/2463 , H01L45/1233 , H01L45/1273 , H01L45/16 , H01L45/1675
摘要： Disclosed is a multilevel nonvolatile resistive random-access memory device including a lower electrode, an upper electrode, and an insulation film interposed between the lower electrode and the upper electrode. Each of the lower electrode and the upper electrode includes a plate-shaped portion, and a patterned portion formed on the plate-shaped portion, and the patterned portion includes a protruding 3-dimensional prism structure pattern in which a plurality of prism-shaped structures is repeatedly arranged at a constant interval in a given direction. The patterned portion of the lower electrode and the patterned portion of the upper electrode are arranged to face each other, and a longitudinal direction of the prism-shaped structures of the lower electrode patterned portion and a longitudinal direction of the prism-shaped structures of the upper electrode patterned portion cross each other.

2. 发明授权

US09466361B2 Memory devices 有权
标题翻译：内存设备
公开(公告)号：US09466361B2
公开(公告)日：2016-10-11
申请号：US14518810
申请日：2014-10-20
申请人： Micron Technology Inc.
发明人： Chandra Mouli
IPC分类号： G11C11/36 , G11C13/00 , G11C11/56 , H01L27/24 , H01L45/00 , G11C5/02 , G11C11/34
CPC分类号： H01L27/2418 , G11C5/02 , G11C11/34 , G11C11/39 , G11C11/4026 , G11C11/5664 , G11C11/5678 , G11C11/5685 , G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C13/0014 , G11C13/0016 , G11C13/003 , G11C2013/009 , G11C2213/72 , G11C2213/74 , G11C2213/76 , G11C2216/08 , H01L29/6609 , H01L45/00 , H01L45/141 , H01L45/145 , H01L45/16
摘要： Some embodiments include memory devices having a wordline, a bitline, a memory element selectively configurable in one of three or more different resistive states, and a diode configured to allow a current to flow from the wordline through the memory element to the bitline responsive to a voltage being applied across the wordline and the bitline and to decrease the current if the voltage is increased or decreased. Some embodiments include memory devices having a wordline, a bitline, memory element selectively configurable in one of two or more different resistive states, a first diode configured to inhibit a first current from flowing from the bitline to the wordline responsive to a first voltage, and a second diode comprising a dielectric material and configured to allow a second current to flow from the wordline to the bitline responsive to a second voltage.
摘要翻译：一些实施例包括具有字线，位线，可选择性地以三种或更多种不同电阻状态中的一种状态配置的存储器元件的存储器件，以及被配置为允许电流从字线通过存储器元件流过到位线的二极管，电压施加在字线和位线之间，并且如果电压增加或减小则降低电流。一些实施例包括具有字线，位线，可选择性地以两种或多种不同电阻状态之一配置的存储器元件的存储器件，被配置为阻止第一电流响应于第一电压从位线流向字线的第一二极管，以及第二二极管，包括电介质材料，并被配置为响应于第二电压允许第二电流从字线流到位线。

3. 发明授权

US09431620B2 Organic resistive random access memory and a preparation method thereof 有权
标题翻译：有机电阻随机存取存储器及其制备方法
公开(公告)号：US09431620B2
公开(公告)日：2016-08-30
申请号：US14396037
申请日：2013-09-30
申请人： Peking University
发明人： Yimao Cai , Yefan Liu , Wenliang Bai , Zongwei Wang , Yichen Fang , Ru Huang
IPC分类号： H01L45/00 , H01L51/05 , G11C13/00 , H01L51/00 , H01L51/10
CPC分类号： H01L51/0591 , G11C13/0014 , G11C13/0016 , H01L51/0035 , H01L51/102 , H01L2251/301 , H01L2251/303 , H01L2251/308
摘要： The present invention discloses an organic resistive random access memory and a preparation method thereof. The memory uses silicon as a substrate, and has a MIM capacitor structure having a vertical memory unit, where the MIM structure has a top electrode of Al, a bottom electrode of ITO, and an middle functional layer of parylene, wherein, a parylene layer as the functional layer is formed by performing deposition multiple times, where the deposition of Al2O3 is performed once by ALD between each two deposition of parylene. A critical region which is in favor of forming a conductive channel could be formed by controlling the deposition area of Al2O3, and further control the electrical characteristics of the memory. Through the present invention, the cycle-to-cycle and device-to-device uniformity could be effectively improved, without changing the basic structure of the memory.
摘要翻译：本发明公开了一种有机电阻随机存取存储器及其制备方法。存储器使用硅作为衬底，并且具有具有垂直存储单元的MIM电容器结构，其中MIM结构具有Al的顶电极，ITO的底电极和聚对二甲苯的中间功能层，其中聚对二甲苯层由于通过进行多次沉积形成功能层，其中在每次两次沉积聚对二甲苯之间通过ALD执行Al 2 O 3的沉积一次。可以通过控制Al2O3的沉积面积来形成有利于形成导电通道的关键区域，并进一步控制存储器的电特性。通过本发明，可以在不改变存储器的基本结构的情况下，有效地提高周期到周期和器件到器件的均匀性。

4. 发明申请

US20160172027A1 Polymer Memory 审中-公开
标题翻译：聚合物记忆
公开(公告)号：US20160172027A1
公开(公告)日：2016-06-16
申请号：US14571949
申请日：2014-12-16
申请人： CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
发明人： Ehsan Tahmasebian , Hyoung Seub Rhie , Peter Gillingham
IPC分类号： G11C13/00 , H01L51/00 , H01L51/10
CPC分类号： G11C13/0016 , G11C13/0026 , G11C13/0028 , G11C13/003 , G11C2013/0054 , G11C2213/34 , G11C2213/56 , G11C2213/72 , G11C2213/73 , G11C2213/74 , G11C2213/79 , G11C2213/82 , H01L51/0595
摘要： A integrated circuit device with a polymer memory array includes active circuits formed in lower layers of a multi-level interconnect structure and a semiconductor substrate and also includes an array of polymer memory cells formed in an upper interconnect level having a plurality of cell node electrodes and source line electrodes for the polymer memory array, each polymer memory cell including a passive layer having at least one conductivity-facilitating compound that is formed on top and sidewall surfaces of a source line electrode, and an active layer having an impedance state that can change that is formed on top and sidewall surfaces of an adjacent cell node electrode with sufficient thickness to make direct physical contact with the passive layer.
摘要翻译：具有聚合物存储器阵列的集成电路器件包括形成在多层互连结构的下层中的有源电路和半导体衬底，并且还包括形成在具有多个单元节点电极的上部互连电平中的聚合物存储器单元的阵列，用于聚合物存储器阵列的源极线电极，每个聚合物存储单元包括具有形成在源极线电极的顶壁和侧壁表面上的至少一种导电性促进化合物的钝化层，以及具有可改变的阻抗状态的有源层其形成在相邻电池节点电极的顶壁和侧壁表面上，具有足够的厚度以与被动层直接物理接触。

5. 发明申请

US20160158794A1 NANO STRUCTURES, DEVICE USING THE SAME, AND METHOD FOR FABRICATING THE NANO STRUCTURES 审中-公开
标题翻译：纳米结构，使用该纳米结构的器件，以及制造纳米结构的方法
公开(公告)号：US20160158794A1
公开(公告)日：2016-06-09
申请号：US14958301
申请日：2015-12-03
申请人： SK INNOVATION CO., LTD.
发明人： Jun-Hyung KIM
IPC分类号： B05D1/00 , B05D3/00 , B05D1/36
CPC分类号： G11C16/0466 , B82Y10/00 , B82Y40/00 , G11C11/401 , G11C13/0016 , G11C2213/80 , H01L21/28273 , H01L29/0665 , H01L29/1033 , H01L29/127 , H01L29/42364 , H01L29/7613 , H01L29/78 , Y10S977/892
摘要： Provided are a method for fabricating nano structures which includes: preparing a substrate; preparing a polymer including a plurality of metal atoms; applying the polymer to the substrate to attach the metal atoms onto the substrate; and making one or more metallic nano particles from the metal atoms.
摘要翻译：提供一种制造纳米结构的方法，其包括：制备基底; 制备包含多个金属原子的聚合物; 将所述聚合物施加到所述基底以将所述金属原子附着到所述基底上; 以及从金属原子制备一种或多种金属纳米颗粒。

6. 发明授权

US09331275B2 Switching device structures and methods 有权
公开(公告)号：US09331275B2
公开(公告)日：2016-05-03
申请号：US14253989
申请日：2014-04-16
申请人： Micron Technology, Inc.
发明人： Gurtej S. Sandhu
IPC分类号： G11C13/00 , H01L45/00
CPC分类号： H01L45/1253 , G11C13/0002 , G11C13/0007 , G11C13/0011 , G11C13/0016 , G11C13/0069 , G11C2013/0083 , G11C2213/17 , G11C2213/18 , G11C2213/52 , G11C2213/53 , H01L45/08 , H01L45/085 , H01L45/1206 , H01L45/1233 , H01L45/14 , H01L45/141 , H01L45/142 , H01L45/143 , H01L45/146 , H01L45/147 , H01L45/16
摘要： Switching device structures and methods are described herein. A switching device can include a vertical stack comprising a material formed between a first and a second electrode. The switching device can further include a third electrode coupled to the vertical stack and configured to receive a voltage applied thereto to control a formation state of a conductive pathway in the material between the first and the second electrode, wherein the formation state of the conductive pathway is switchable between an on state and an off state.

7. 发明申请

US20160087200A1 MEMORY INCLUDING A SELECTOR SWITCH ON A VARIABLE RESISTANCE MEMORY CELL 有权
标题翻译：存储器，包括可变电阻存储器单元上的选择器开关
公开(公告)号：US20160087200A1
公开(公告)日：2016-03-24
申请号：US14947455
申请日：2015-11-20
申请人： Micron Technology, Inc.
发明人： Andrea Redaelli , Agostino Pirovano
IPC分类号： H01L45/00
CPC分类号： H01L27/2409 , G11C13/00 , G11C13/0004 , G11C13/0014 , G11C13/0016 , G11C2213/72 , H01L27/2481 , H01L27/285 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/14 , H01L45/141 , H01L45/144 , H01L45/146 , H01L45/1608
摘要： Embodiments include but are not limited to apparatuses and systems including memory having a memory cell including a variable resistance memory layer, and a selector switch in direct contact with the memory cell, and configured to facilitate access to the memory cell. Other embodiments may be described and claimed.
摘要翻译：实施例包括但不限于包括具有包括可变电阻存储器层的存储单元的存储器和与存储器单元直接接触的选择器开关并且被配置为便于访问存储器单元的装置和系统。可以描述和要求保护其他实施例。

8. 发明授权

US09276216B2 Organic molecular device 有权
标题翻译：有机分子装置
公开(公告)号：US09276216B2
公开(公告)日：2016-03-01
申请号：US14196265
申请日：2014-03-04
申请人： Kabushiki Kaisha Toshiba
发明人： Hideyuki Nishizawa , Shigeki Hattori , Yusuke Tanaka , Koji Asakawa
IPC分类号： H01L51/30 , H01L51/00 , G11C13/00 , H01L51/05
CPC分类号： H01L51/005 , G11C13/0014 , G11C13/0016 , G11C2213/77 , H01L51/0035 , H01L51/0036 , H01L51/0098 , H01L51/0595
摘要： An organic molecular device of an embodiment includes a first and a second conductive layers and an organic molecular layer having an organic molecule provided between the first and the second conductive layer. The organic molecule includes a one-dimensional or quasi one-dimensional π-conjugated system chain having either a first aromatic ring or a second aromatic ring. The first aromatic ring has one or more substituents that are an electron withdrawing group, each substituent of the first aromatic ring is independently selected from the group consisting of the electron withdrawing group and hydrogen, the second aromatic ring has one or more substituents that are an electron releasing group, and each substituent of the second aromatic ring is independently selected from the group consisting of the electron releasing group and hydrogen. The first aromatic ring or the second aromatic ring exist in an unbalanced manner in the π-conjugated system chain.
摘要翻译：实施方案的有机分子器件包括第一和第二导电层以及在第一和第二导电层之间具有有机分子的有机分子层。有机分子包括具有第一芳环或第二芳环的一维或准一维共轭体系链。第一芳环具有一个或多个吸电子基取代基，第一芳环的每个取代基独立地选自吸电子基团和氢，第二芳环具有一个或多个取代基，电子发射基团，第二芳环的每个取代基独立地选自电子释放基团和氢。第一个芳环或第二个芳环在“共轭”系统链中以不平衡的方式存在。

9. 发明申请

US20160049604A1 Organic Resistive Random Access Memory and a Preparation Method Thereof 有权
标题翻译：有机电阻随机存取存储器及其制备方法
公开(公告)号：US20160049604A1
公开(公告)日：2016-02-18
申请号：US14396037
申请日：2013-09-30
申请人： Peking University
发明人： Yimao Cai , Yefan Liu , Wenliang Bai , Zongwei Wang , Yichen Fang , Ru Huang
IPC分类号： H01L51/05 , H01L51/00 , H01L51/10
CPC分类号： H01L51/0591 , G11C13/0014 , G11C13/0016 , H01L51/0035 , H01L51/102 , H01L2251/301 , H01L2251/303 , H01L2251/308
摘要： The present invention discloses an organic resistive random access memory and a preparation method thereof. The memory uses silicon as a substrate, and has a MIM capacitor structure having a vertical memory unit, where the MIM structure has a top electrode of Al, a bottom electrode of ITO, and an middle functional layer of parylene, wherein, a parylene layer as the functional layer is formed by performing deposition multiple times, where the deposition of Al2O3 is performed once by ALD between each two deposition of parylene. A critical region which is in favor of forming a conductive channel could be formed by controlling the deposition area of Al2O3, and further control the electrical characteristics of the memory. Through the present invention, the cycle-to-cycle and device-to-device uniformity could be effectively improved, without changing the basic structure of the memory.
摘要翻译：本发明公开了一种有机电阻随机存取存储器及其制备方法。存储器使用硅作为衬底，并且具有具有垂直存储单元的MIM电容器结构，其中MIM结构具有Al的顶电极，ITO的底电极和聚对二甲苯的中间功能层，其中聚对二甲苯层由于通过进行多次沉积形成功能层，其中在每次两次沉积聚对二甲苯之间通过ALD执行Al 2 O 3的沉积一次。可以通过控制Al2O3的沉积面积来形成有利于形成导电通道的关键区域，并进一步控制存储器的电特性。通过本发明，可以在不改变存储器的基本结构的情况下，有效地提高周期到周期和器件到器件的均匀性。

10. 发明授权

US09257644B1 3D variable resistance memory device and method of manufacturing the same 有权
公开(公告)号：US09257644B1
公开(公告)日：2016-02-09
申请号：US14877713
申请日：2015-10-07
申请人： SK hynix Inc.
发明人： Nam Kyun Park
IPC分类号： G11C11/00 , H01L45/00
CPC分类号： H01L45/12 , G11C11/161 , G11C11/1659 , G11C13/0004 , G11C13/0007 , G11C13/0016 , G11C13/003 , G11C13/004 , G11C13/0069 , G11C2213/71 , G11C2213/74 , G11C2213/75 , G11C2213/79 , H01L27/2454 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/147 , H01L45/16
摘要： A variable resistance memory device includes a plurality of cell gate electrodes extending in a first direction, wherein the plurality of cell gate electrodes are stacked in a second direction that is substantially perpendicular to the first direction. A gate insulating layer surrounds each cell gate electrode of the plurality of cell gate electrodes and a cell drain region is formed on two sides of the each cell gate electrode of the plurality of cell gate electrodes. A channel layer extends in the second direction along the stack of the plurality of cell gate electrodes, and a variable resistance layer contacting the channel layer.

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