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    • 3. 发明申请
    • DIRECT DRIVE LED DRIVER AND OFFLINE CHARGE PUMP AND METHOD THEREFOR
    • 直接驱动LED驱动器和离线充电泵及其方法
    • US20150002035A1
    • 2015-01-01
    • US13930759
    • 2013-06-28
    • David SchieMike Ward
    • David SchieMike Ward
    • H05B33/08H01L29/745H01L27/08H01L29/74H02M3/07H01G4/38
    • H01L29/7455H01L27/0814H01L27/0817H02M1/4208H02M3/07H05B33/0809H05B33/0815H05B33/0845Y02B70/126
    • In one embodiment, a Light Emitting Diode (LED) driving device for driving a plurality of LEDs has a switching matrix utilizing a plurality of one of a turn off thyristors or turn off triacs coupled to the plurality of LEDs. A controller is coupled to the switching matrix responsive to a voltage of a rectified AC halfwave, wherein combinations of the plurality of LEDs are altered to ensure a maximum operating voltage of the plurality of LEDs is not exceeded. A current limiting device is coupled to the combinations of the plurality of LED to regulate current.In a second embodiment an offline charge pump utilizes a switching matrix to recombine capacitors in accordance with the voltage on the AC half wave and then in accordance with a desired output voltage to feed a load, such that said recombinations occur at a frequency much higher than the frequency of the AC rectified half wave such that charge is “pumped” from the input at one voltage to the output at another voltage through the AC halfwave while providing a constant output voltage to the load.
    • 在一个实施例中,用于驱动多个LED的发光二极管(LED)驱动装置具有利用耦合到多个LED的关闭晶闸管或关闭三端双向可控硅开关中的多个的开关矩阵。 响应于整流AC半波的电压,控制器耦合到开关矩阵,其中改变多个LED的组合以确保不超过多个LED的最大工作电压。 电流限制装置耦合到多个LED的组合以调节电流。 在第二实施例中,离线电荷泵利用开关矩阵根据AC半波上的电压重新组合电容器,然后根据期望的输出电压来馈送负载,使得所述重组以远高于 交流整流半波的频率使得电荷通过AC半波从一个电压的输入“泵入”到另一电压的输出,同时向负载提供恒定的输出电压。
    • 5. 发明申请
    • COMBINATION ESD PROTECTION CIRCUITS AND METHODS
    • 组合ESD保护电路和方法
    • US20140104733A1
    • 2014-04-17
    • US14109080
    • 2013-12-17
    • Micron Technology, Inc.
    • XIAOFENG FANMICHAEL D. CHAINE
    • H02H9/04H01L27/02
    • H02H9/044H01L27/0259H01L27/0262H01L27/0617H01L27/0817H02H9/046
    • Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. In an example method, a thyristor is triggered to conduct current from a signal node to a reference voltage node using leakage currents provided by a transistor formed in a semiconductor doped well shared with the base of the thyristor. The leakage currents are responsive to a noise event (e.g., electrostatic discharge (ESD) event) at the signal node, and increase the voltage of the semiconductor doped well to forward bias the base and the collector of the thyristor. The triggered thyristor conducts the current resulting from the ESD event to the reference voltage node.
    • 公开了用于保护电路免受静电放电事件的电路,集成电路,装置和方法。 在一个示例性方法中,晶闸管被触发以使用由在晶体管的基极共享的半导体掺杂阱中形成的晶体管提供的漏电流从信号节点传导到参考电压节点。 泄漏电流响应于信号节点处的噪声事件(例如,静电放电(ESD)事件),并且增加半导体掺杂阱的电压以使晶闸管的基极和集电极正向偏置。 触发晶闸管将ESD事件导致的电流导通到参考电压节点。
    • 6. 发明授权
    • Process of fabricating semiconductor device with low capacitance for high-frequency circuit protection
    • 制造具有低电容的半导体器件用于高频电路保护的工艺
    • US08501580B2
    • 2013-08-06
    • US13036582
    • 2011-02-28
    • Jerry HuPanchien LinBert Huang
    • Jerry HuPanchien LinBert Huang
    • H01L21/76H01L21/30H01L21/425H01L21/302
    • H01L21/76283H01L21/761H01L21/76237H01L27/0255H01L27/0814H01L27/0817
    • A process for fabricating a semiconductor device includes depositing n-type dopant on a p-type substrate, implanting n-type material into the substrate, and growing an n-type epitaxial layer atop the n+ layer. Trenches surrounding the device region are formed and an n+ layer on the sidewalls of the trenches is formed. The trenches are filled by growing a layer of thermal oxide on the sidewalls of the trenches and deposition of plasma enhanced oxide or polysilicon into the trenches, and planarizing the top surface. n+ region of the device is formed by forming an oxide layer on the top surface of the device layer and etching the oxide, depositing n-type dopant material and driving in by high temperature diffusion. p+ region of the device is formed by etching the oxide, depositing p-type dopant material and driving in by high temperature diffusion so that the breakdown voltage is set for circuit protection.
    • 一种用于制造半导体器件的工艺包括在p型衬底上沉积n型掺杂剂,将n型材料注入到衬底中,以及在n +层顶上生长n型外延层。 形成围绕器件区域的沟槽,并形成沟槽侧壁上的n +层。 通过在沟槽的侧壁上生长一层热氧化物并且将等离子体增强的氧化物或多晶硅沉积到沟槽中并平坦化顶表面来填充沟槽。 n +区域通过在器件层的顶表面上形成氧化物层并蚀刻氧化物,沉积n型掺杂剂材料并通过高温扩散进行而形成。 通过蚀刻氧化物,沉积p型掺杂剂材料并通过高温扩散驱动来形成器件的p +区,从而设置用于电路保护的击穿电压。
    • 8. 发明授权
    • Active rectifying apparatus
    • 主动整流装置
    • US08416015B2
    • 2013-04-09
    • US13078386
    • 2011-04-01
    • Chikara Tsuchiya
    • Chikara Tsuchiya
    • H03K17/74H03G11/02
    • H03K17/302H01L27/0817H01L27/088H03K2017/307
    • A semiconductor apparatus includes: a first transistor; a second transistor having a higher withstand voltage than the first transistor, a source of the second transistor coupled to a drain of the first transistor, a gate of the second transistor coupled to a source of the first transistor; a third transistor having a higher withstand voltage than the first transistor and a drain of the third transistor coupled to a drain of the second transistor; and a comparator that compares a source voltage of the first transistor with a source voltage of the third transistor, and controls a gate voltage of the first transistor.
    • 一种半导体装置,包括:第一晶体管; 第二晶体管具有比第一晶体管更高的耐受电压,第二晶体管的源极耦合到第一晶体管的漏极,第二晶体管的栅极耦合到第一晶体管的源极; 具有比第一晶体管更高的耐受电压的第三晶体管和耦合到第二晶体管的漏极的第三晶体管的漏极; 以及比较器,其将第一晶体管的源极电压与第三晶体管的源极电压进行比较,并且控制第一晶体管的栅极电压。