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1. 发明公开

US20240258377A1 SILICON CARBIDE POWER MOSFET DEVICE HAVING IMPROVED PERFORMANCES AND MANUFACTURING PROCESS THEREOF 审中-公开
公开(公告)号：US20240258377A1
公开(公告)日：2024-08-01
申请号：US18408474
申请日：2024-01-09
申请人： STMicroelectronics International N.V.
发明人： Mario Giuseppe SAGGIO , Cateno Marco CAMALLERI , Laura Letizia SCALIA , Alfio GUARNERA
IPC分类号： H01L29/10 , H01L21/04 , H01L29/08 , H01L29/16 , H01L29/66 , H01L29/78
CPC分类号： H01L29/1087 , H01L21/0465 , H01L29/0865 , H01L29/0869 , H01L29/1608 , H01L29/66068 , H01L29/7802
摘要： A MOSFET device of a vertical conduction type has a substrate of silicon carbide having a first conductivity type and a main face. A body region of a second conductivity type extends into the substrate from the main face and has a first depth along a first direction. A first and a second source region of the first conductivity type extend inside the body region starting from the main face parallel to each other and have a second depth along the first direction smaller than the first depth and are mutually spaced by a distance in a second direction perpendicular to the first direction. A body contact region of the second conductivity type extends inside the body region between the first and the second source regions and has a third depth along the first direction greater than or equal to the second depth.

2. 发明公开

US20240194754A1 SEMICONDUCTOR DEVICE AND CORRESPONDING METHODS OF MANUFACTURE 审中-公开
公开(公告)号：US20240194754A1
公开(公告)日：2024-06-13
申请号：US18443354
申请日：2024-02-16
申请人： Infineon Technologies Austria AG
发明人： Weichun Huang , Martin Poelzl , Thomas Martin Feil , Maximilian Roesch
IPC分类号： H01L29/423 , H01L21/768 , H01L27/06 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/40 , H01L29/417 , H01L29/66 , H01L29/739 , H01L29/78 , H01L29/872
CPC分类号： H01L29/423 , H01L21/76805 , H01L21/76831 , H01L27/0629 , H01L29/0634 , H01L29/0869 , H01L29/1095 , H01L29/407 , H01L29/41741 , H01L29/41766 , H01L29/6634 , H01L29/66719 , H01L29/66727 , H01L29/7806 , H01L29/7813 , H01L29/7843 , H01L29/66348 , H01L29/66734 , H01L29/7397 , H01L29/872
摘要： A semiconductor device includes a contact opening extending through a source region and at least into a body region formed in a semiconductor substrate. The contact opening forms at least one sidewall in the semiconductor substrate. An electrically insulative spacer partially covers the at least one sidewall. A contact plug is in the contact opening. A body contact region is formed in the semiconductor substrate adjacent a bottom of the contact opening.

3. 发明公开

US20240170570A1 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20240170570A1
公开(公告)日：2024-05-23
申请号：US18477619
申请日：2023-09-29
申请人： FUJI ELECTRIC CO., LTD.
发明人： Takafumi UCHIDA
IPC分类号： H01L29/78 , H01L29/08 , H01L29/423
CPC分类号： H01L29/7813 , H01L29/0869 , H01L29/4236 , H01L29/4238
摘要： A semiconductor device includes an active region as a region through which main current flows, an active region perimeter that surrounds the active region, and an edge termination region that surrounds the active region perimeter. The active region perimeter includes: a semiconductor substrate; a drift layer of a first conductivity type; a base region of a second conductivity type provided on an upper surface side of the drift layer; a source region of a first conductivity type selectively provided on an upper surface side of the base region; a perimeter trench including a contact region of the second conductivity type selectively provided, having at least a sidewall on the active region side in contact with the source region, and provided to pass through the base region; and a source ring region provided to be in contact with the contact region.

4. 发明授权

US11901447B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US11901447B2
公开(公告)日：2024-02-13
申请号：US18115709
申请日：2023-02-28
申请人： Joulwatt Technology Co., Ltd.
发明人： Guangtao Han
IPC分类号： H01L29/78 , H01L21/02 , H01L21/265 , H01L21/311 , H01L29/08 , H01L29/10 , H01L29/66
CPC分类号： H01L29/7816 , H01L21/02236 , H01L21/02255 , H01L21/26513 , H01L21/31111 , H01L21/31144 , H01L29/0869 , H01L29/0886 , H01L29/1095 , H01L29/66681
摘要： Disclosed is a semiconductor device and a manufacturing method, comprising: forming a pad oxide layer and a silicon nitride layer on a substrate; etching the silicon nitride layer into a plurality of segments; forming an oxide layer, having an up-and-down wave shape, by performing a traditional thermal growth field oxygen method on the semiconductor device by use of the plurality of segments serving as forming-assisted structures; performing traditional processes on the semiconductor device having an up-and-down wavy semiconductor surface, to form a gate oxide layer, a polysilicon layer, and to form a source region and a drain region by implantation The semiconductor device having an up-and-down wavy channel region may be formed by a traditional thermal growth field oxygen method, thus the manufacturing processes are simple, the cost is low, and the completed device may have a larger effective channel width and a lower on-state resistance.

5. 发明公开

US20230395713A1 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20230395713A1
公开(公告)日：2023-12-07
申请号：US18454820
申请日：2023-08-24
申请人： ROHM CO., LTD.
发明人： Shuhei MITANI , Yuki NAKANO , Heiji WATANABE , Takayoshi SHIMURA , Takuji HOSOI , Takashi KIRINO
IPC分类号： H01L29/78 , H01L21/02 , H01L21/04 , H01L21/82 , H01L29/417 , H01L29/423 , H01L29/51 , H01L29/66 , H01L29/10 , H01L29/16 , H01L29/08
CPC分类号： H01L29/7827 , H01L21/02178 , H01L21/02236 , H01L21/049 , H01L21/8213 , H01L29/41766 , H01L29/42368 , H01L29/513 , H01L29/518 , H01L29/66068 , H01L29/78 , H01L29/7802 , H01L29/7813 , H01L29/1087 , H01L29/1608 , H01L21/02164 , H01L21/0445 , H01L29/42356 , H01L29/511 , H01L29/4236 , H01L21/0223 , H01L21/02247 , H01L29/0847 , H01L29/086 , H01L29/0869 , H01L29/45
摘要： A semiconductor device includes a semiconductor layer of a first conductivity type. A well region that is a second conductivity type well region is formed on a surface layer portion of the semiconductor layer and has a channel region defined therein. A source region that is a first conductivity type source region is formed on a surface layer portion of the well region. A gate insulating film is formed on the semiconductor layer and has a multilayer structure. A gate electrode is opposed to the channel region of the well region where a channel is formed through the gate insulating film.

6. 发明授权

US11784223B2 Semiconductor device and manufacturing method of semiconductor device 有权
公开(公告)号：US11784223B2
公开(公告)日：2023-10-10
申请号：US17523071
申请日：2021-11-10
申请人： DENSO CORPORATION , TOYOTA JIDOSHA KABUSHIKI KAISHA , MIRISE Technologies Corporation
发明人： Hirofumi Kida
IPC分类号： H01L29/08 , H01L29/78 , H01L29/20 , H01L29/66
CPC分类号： H01L29/0865 , H01L29/0869 , H01L29/2003 , H01L29/66712 , H01L29/7802
摘要： A compound semiconductor layer in a semiconductor device includes a drift region of a first conductivity type, a JFET region of the first conductivity type disposed above the drift region, a body region of a second conductivity type disposed above the drift region and adjacent to the JFET region, and a JFET embedded region of the second conductivity type or i-type disposed in the JFET region. The JFET region has a bottom surface portion adjacent to the drift region, a side surface portion adjacent to the body region, and an inside portion adjacent to the JFET embedded region, and further has a high concentration portion at the bottom surface portion and the side surface portion. The high concentration portion has an impurity concentration higher than an impurity concentration of the inside portion.

7. 发明公开

US20230207691A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
公开(公告)号：US20230207691A1
公开(公告)日：2023-06-29
申请号：US18115709
申请日：2023-02-28
申请人： Joulwatt Technology Co., Ltd.
发明人： GUANGTAO HAN
IPC分类号： H01L29/78 , H01L21/02 , H01L21/265 , H01L21/311 , H01L29/08 , H01L29/10 , H01L29/66
CPC分类号： H01L29/7816 , H01L21/02236 , H01L21/02255 , H01L21/26513 , H01L21/31111 , H01L21/31144 , H01L29/0869 , H01L29/0886 , H01L29/1095 , H01L29/66681
摘要： Disclosed is a semiconductor device and a manufacturing method, comprising: forming a pad oxide layer and a silicon nitride layer on a substrate; etching the silicon nitride layer into a plurality of segments; forming an oxide layer, having an up-and-down wave shape, by performing a traditional thermal growth field oxygen method on the semiconductor device by use of the plurality of segments serving as forming-assisted structures; performing traditional processes on the semiconductor device having an up-and-down wavy semiconductor surface, to form a gate oxide layer, a polysilicon layer, and to form a source region and a drain region by implantation The semiconductor device having an up-and-down wavy channel region may be formed by a traditional thermal growth field oxygen method, thus the manufacturing processes are simple, the cost is low, and the completed device may have a larger effective channel width and a lower on-state resistance.

8. 发明申请

US20180350977A1 POWER SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20180350977A1
公开(公告)日：2018-12-06
申请号：US16052981
申请日：2018-08-02
申请人： ABB Schweiz AG
发明人： Lars Knoll , Renato Minamisawa
IPC分类号： H01L29/78 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/423
CPC分类号： H01L29/7813 , H01L29/0696 , H01L29/0869 , H01L29/1095 , H01L29/1608 , H01L29/42368 , H01L29/4238
摘要： A power semiconductor device includes a plurality of vertical field effect transistor cells arranged in a plurality of parallel rows, each row including vertical field effect transistor cells arranged along a first direction, wherein in each vertical field effect transistor cell a body region is surrounded by the gate layer from two lateral surfaces of the body region opposite to each other. In each row of vertical field effect transistor cells the body regions are separated from each other in the first direction by first gate regions of the gate layer, each first gate region penetrating through the body layer, so that in each row of vertical field effect transistor cells the first gate regions alternate with the body regions along the first direction. The first gate regions within each row of vertical field effect transistor cells are connected with each other by second gate regions extending across the body regions of the respective vertical field effect transistor cells in the first direction. The first gate regions and the second gate regions form continuous gate strips extending with its longitudinal axis in the first direction. A source electrode is formed on the source layer to form a first ohmic contact to the source layer between each pair of adjacent gate strips. The whole top surface of the body region facing away from the substrate layer is in direct contact with the gate insulation layer.

9. 发明授权

US09991376B2 High voltage MOSFET devices and methods of making the devices 有权
公开(公告)号：US09991376B2
公开(公告)日：2018-06-05
申请号：US14966476
申请日：2015-12-11
申请人： Monolith Semiconductor Inc.
发明人： Sujit Banerjee , Kevin Matocha , Kiran Chatty
IPC分类号： H01L29/78 , H01L29/08 , H01L29/06 , H01L29/10 , H01L29/16 , H01L29/423 , H01L29/66 , H01L29/45
CPC分类号： H01L29/7802 , H01L29/0696 , H01L29/0869 , H01L29/0878 , H01L29/1095 , H01L29/1608 , H01L29/42356 , H01L29/4238 , H01L29/456 , H01L29/66068 , H01L29/7827
摘要： A SiC MOSFET device having low specific on resistance is described. The device has N+, P-well and JFET regions extended in one direction (Y-direction) and P+ and source contacts extended in an orthogonal direction (X-direction). The polysilicon gate of the device covers the JFET region and is terminated over the P-well region to minimize electric field at the polysilicon gate edge. In use, current flows vertically from the drain contact at the bottom of the structure into the JFET region and then laterally in the X direction through the accumulation region and through the MOSFET channels into the adjacent N+ region. The current flowing out of the channel then flows along the N+ region in the Y-direction and is collected by the source contacts and the final metal. Methods of making the device are also described.

10. 发明申请

US20180130906A1 FIELD EFFECT TRANSISTOR DEVICE WITH SEPARATE SOURCE AND BODY CONTACTS AND METHOD OF PRODUCING THE DEVICE 审中-公开
公开(公告)号：US20180130906A1
公开(公告)日：2018-05-10
申请号：US15803636
申请日：2017-11-03
申请人： ams AG
发明人： Martin KNAIPP , Georg ROEHRER , Jong Mun PARK
IPC分类号： H01L29/78 , H01L29/10 , H01L23/535 , H01L23/522 , H01L29/66 , H01L21/265
CPC分类号： H01L29/0852 , H01L21/0485 , H01L21/26513 , H01L23/5226 , H01L23/535 , H01L29/0692 , H01L29/0696 , H01L29/086 , H01L29/0865 , H01L29/0869 , H01L29/1041 , H01L29/1095 , H01L29/4238 , H01L29/66492 , H01L29/66674 , H01L29/66681 , H01L29/7801 , H01L29/7816 , H01L29/7833
摘要： The field effect transistor device comprises a substrate (1) of semiconductor material, a body well of a first type of electric conductivity in the substrate, a source region in the body well, the source region having an opposite second type of electric conductivity, a source contact (3) on the source region, a body contact region of the first type of electric conductivity in the body well, a body contact (5) on the body contact region, and a gate electrode layer (2) partially overlapping the body well. A portion (2*) of the gate electrode layer (2) is present between the source contact (3) and the body contact (5).

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