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    • 5. 发明授权
    • Waveguide optically pre-amplified detector with passband wavelength filtering
    • 波导光学预扩增检测器,带通滤波器
    • US08098969B2
    • 2012-01-17
    • US12632933
    • 2009-12-08
    • Valery TolstikhinFang WuChristopher WatsonYury LogvinKirill Pimenov
    • Valery TolstikhinFang WuChristopher WatsonYury LogvinKirill Pimenov
    • G02B6/12
    • H01S5/5018G02B2006/12121G02B2006/12123G02B2006/12195H01S5/0262H01S5/1014
    • The invention describes an integrated-photonics arrangement, implementable in a multi-guide vertical integration (MGVI) structure composed from III-V semiconductors and grown in one epitaxial growth run, allowing for the integration of semiconductor optical amplifier (SOA) and PIN photodetector (PIN) structures within a common wavelength-designated waveguide of the plurality of the vertically integrated wavelength-designated waveguides forming the MGVI structure. The integration includes a wavelength filter integrated between the SOA and PIN to reduce noise within the PIN arising from ASE generated by the SOA. In exemplary embodiments of the invention, the wavelength filter is integrated into MGVI structure either within a common wavelength designated waveguide or within the wavelength-designated waveguide. Further in other embodiments the wavelength filter is provided by a thin-film filter abutting a facet of the integrated-photonics arrangement wherein optical signals are coupled by optical waveguides and/or additional optical elements such as a multimode interference device.
    • 本发明描述了一种集成光子学布置,其可以在由III-V半导体组成并在一个外延生长运行中生长的多导向垂直积分(MGVI)结构中实现,允许将半导体光放大器(SOA)和PIN光电检测器 PIN)结构,其构成了形成MGVI结构的多个垂直集成的波长指定波导的公共波长指定波导。 集成包括集成在SOA和PIN之间的波长滤波器,以减少由SOA产生的ASE产生的PIN内的噪声。 在本发明的示例性实施例中,波长滤波器在公共波长指定波导内或波长指定波导内集成到MGVI结构中。 此外,在其它实施例中,波长滤波器由抵靠集成光子学装置的小平面的薄膜滤光器提供,其中光信号通过光波导耦合,和/或诸如多模干涉装置的附加光学元件耦合。
    • 6. 发明申请
    • Waveguide Optically Pre-Amplified Detector with Passband Wavelength Filtering
    • 具有通带波长滤波的波导光学预放大检测器
    • US20110135314A1
    • 2011-06-09
    • US12632933
    • 2009-12-08
    • Valery TolstikhinFang WuChristopher WatsonYury LogvinKirill Pimenov
    • Valery TolstikhinFang WuChristopher WatsonYury LogvinKirill Pimenov
    • H04B10/12
    • H01S5/5018G02B2006/12121G02B2006/12123G02B2006/12195H01S5/0262H01S5/1014
    • The invention describes an integrated-photonics arrangement, implementable in a multi-guide vertical integration (MGVI) structure composed from III-V semiconductors and grown in one epitaxial growth run, allowing for the integration of semiconductor optical amplifier (SOA) and PIN photodetector (PIN) structures within a common wavelength-designated waveguide of the plurality of the vertically integrated wavelength-designated waveguides forming the MGVI structure. The integration includes a wavelength filter integrated between the SOA and PIN to reduce noise within the PIN arising from ASE generated by the SOA. In exemplary embodiments of the invention, the wavelength filter is integrated into MGVI structure either within a common wavelength designated waveguide or within the wavelength-designated waveguide. Further in other embodiments the wavelength filter is provided by a thin-film filter abutting a facet of the integrated-photonics arrangement wherein optical signals are coupled by optical waveguides and/or additional optical elements such as a multimode interference device.
    • 本发明描述了一种集成光子学布置,其可以在由III-V半导体组成并在一个外延生长运行中生长的多导向垂直积分(MGVI)结构中实现,允许将半导体光放大器(SOA)和PIN光电检测器 PIN)结构,其构成了形成MGVI结构的多个垂直集成的波长指定波导的公共波长指定波导。 集成包括集成在SOA和PIN之间的波长滤波器,以减少由SOA产生的ASE产生的PIN内的噪声。 在本发明的示例性实施例中,波长滤波器在公共波长指定波导内或波长指定波导内集成到MGVI结构中。 此外,在其它实施例中,波长滤波器由抵靠集成光子学装置的小平面的薄膜滤光器提供,其中光信号通过光波导耦合,和/或诸如多模干涉装置的附加光学元件耦合。
    • 8. 发明授权
    • Bias control of SOA via switches
    • 通过开关偏差控制SOA
    • US07280272B2
    • 2007-10-09
    • US11230629
    • 2005-09-21
    • Tomoyuki Akiyama
    • Tomoyuki Akiyama
    • H01S3/00
    • H01S5/0625H01S5/0602H01S5/0683H01S5/5018H01S5/5027
    • A semiconductor device, comprising a semiconductor stacking body configured so as to sandwich an active layer by a p-type semiconductor layer and an n-type semiconductor layer and having plural regions along the active layer, plural electrodes provided on the p-type semiconductor layer or the n-type semiconductor layer and provided one for each of the plural regions, and a switch operatively connected to at least one of the plural electrodes for switching bias voltage application directions, is configured such that each of the plural regions is forward biased by a voltage applied via the electrode and becomes an amplification region when the switch is turned to one side, and is backward biased by a voltage applied via the electrode and becomes an attenuation region when the switch is turned to the other side.
    • 一种半导体器件,包括半导体堆叠体,其被配置为通过p型半导体层和n型半导体层夹持有源层,并且沿着有源层具有多个区域,设置在p型半导体层上的多个电极 或n型半导体层,并且为多个区域中的每个区域提供一个,并且可操作地连接到用于开关偏压施加方向的多个电极中的至少一个的开关被构造成使得多个区域中的每一个被向前偏置 通过电极施加的电压,并且当开关转向一侧时变为放大区域,并且通过经由电极施加的电压而被反向偏置,并且当开关转向另一侧时变为衰减区域。