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1. 发明申请

US20180324110A1 DEDICATED SSR PIPELINE STAGE OF ROUTER FOR EXPRESS TRAVERSAL (EXTRA) NOC 审中-公开
公开(公告)号：US20180324110A1
公开(公告)日：2018-11-08
申请号：US16032804
申请日：2018-07-11
申请人： HUAWEI INTERNATIONAL PTE. LTD
发明人： Zhiguo GE , Naxin ZHANG
IPC分类号： H04L12/933 , H04L12/433 , H04L12/861 , H04L12/54
CPC分类号： H04L49/1546 , G06F13/4247 , H04L12/433 , H04L12/5601 , H04L49/1576 , H04L49/9005 , H04L2012/5674
摘要： This invention is related to an Express Traversal (EXTRA) Network on Chip (NoC) comprising a number of EXTRA routers. The EXTRA NoC comprises a Buffer Write and Route Computation (BW/RC) pipeline, a Switch Allocation-Local (SA-L) pipeline, a Setup Request (SR) pipeline, a Switch Allocation-Global (SA-G) pipeline, and a Switch Traversal and Link Traversal (ST/LT) pipeline. The BW/RC pipeline is configured to write an incoming flit to an input buffer(s) of a start EXTRA router and compute the route for the incoming head flit by selecting an output port to depart from the start EXTRA router. The SA-L pipeline is configured to arbitrate the start EXTRA router to choose an input port and an output port for a winning flit. The SR pipeline is configured to handle the transmission of a number of SR signals from the start EXTRA router to downstream EXTRA routers.

2. 发明授权

US09571395B2 Reconfigurable interconnect element with local lookup tables shared by multiple packet processing engines 有权
标题翻译：可重构互连元件与多个数据包处理引擎共享的本地查找表
公开(公告)号：US09571395B2
公开(公告)日：2017-02-14
申请号：US14617644
申请日：2015-02-09
申请人： CAVIUM, INC.
发明人： Anh Tran , Gerald Schmidt
IPC分类号： H04L12/28 , H04L12/743 , H04L12/933
CPC分类号： H04L45/7457 , H04L49/109 , H04L49/1576
摘要： The invention describes the design of an interconnect element in a programmable network processor/system on-chip having multiple packet processing engines. The on-chip interconnection network for a large number of processing engines on a system can be built from an array of the proposed interconnect elements. Each interconnect element also includes local network lookup tables which allows its attached processing engines to perform lookups locally. These local lookups are much faster than the lookups to a remote search engine, which is shared by all processing engines in the entire system. Local lookup tables in each interconnect element are built from a pool of memory tiles. Each lookup table can be shared by multiple processing engines attached to the interconnect element; and each of these processing engines can perform lookups on different lookup tables in run-time.
摘要翻译：本发明描述了具有多个分组处理引擎的片上可编程网络处理器/系统中的互连元件的设计。用于系统上的大量处理引擎的片上互连网络可以由所提出的互连元件的阵列构建。每个互连元件还包括本地网络查找表，其允许其附接的处理引擎在本地执行查找。这些本地查找比对远程搜索引擎的查找快得多，这是由整个系统中的所有处理引擎共享的。每个互连元素中的本地查找表都是从内存块池构建的。每个查找表可以由连接到互连元件的多个处理引擎共享; 并且这些处理引擎中的每一个可以在运行时对不同查找表执行查找。

3. 发明授权

US09166928B2 Scalable 3-stage crossbar switch 有权
标题翻译：可扩展的3级交叉开关
公开(公告)号：US09166928B2
公开(公告)日：2015-10-20
申请号：US13629195
申请日：2012-09-27
申请人： Chin Tau Lea
发明人： Chin Tau Lea
IPC分类号： H04L12/933 , H04L12/931 , H04Q3/68 , H04L12/937 , H04L12/947 , H04Q11/06 , H04L12/707
CPC分类号： H04L49/1515 , H04L45/24 , H04L49/1569 , H04L49/1576 , H04L49/25 , H04L49/254 , H04L49/506 , H04L49/508 , H04Q3/68 , H04Q11/06
摘要： Systems and methods are presented relating to a three stage crossbar based switching system and a scheduling method for transmission of data packets and associated request and grant tokens. The first stage and third stage portions of the switching system contain TDM crossbars, which are interconnected by a middle stage set of crossbars. In an embodiment, the system switching module is a m×m crossbar switch comprising m inputs and m outputs. The switch has a size m2×m2 formed from m×m crossbar modules. Scheduling of data packet servicing is on a frame by frame basis relating to selection based on port addresses and port address groups. Further, time slot interchange is utilized to address time slot mismatch.
摘要翻译：提出了涉及三级交叉开关系统和用于传输数据分组和相关联的请求和授权令牌的调度方法的系统和方法。交换系统的第一阶段和第三阶段部分包含TDM交叉条，它们通过中间阶段的一组交叉条进行互连。在一个实施例中，系统切换模块是包括m个输入和m个输出的m×m交叉开关。开关具有m×m个横杆模块形成的尺寸m2×m2。数据包服务的调度与基于端口地址和端口地址组的选择有关。此外，利用时隙交换来解决时隙不匹配。

4. 发明申请

US20150139222A1 METHODS AND APPARATUS RELATED TO A DISTRIBUTED SWITCH FABRIC 有权
标题翻译：与分布式开关织物相关的方法和装置
公开(公告)号：US20150139222A1
公开(公告)日：2015-05-21
申请号：US14610143
申请日：2015-01-30
申请人： Juniper Networks, Inc.
发明人： Gunes AYBAY
IPC分类号： H04L12/947 , H04L12/741
CPC分类号： H04L49/3009 , H04L12/5601 , H04L45/74 , H04L45/7453 , H04L49/101 , H04L49/1515 , H04L49/1561 , H04L49/1569 , H04L49/1576 , H04L49/25 , H04L49/256 , H04L69/22
摘要： A method of sending data to a switch fabric includes assigning a destination port of an output module to a data packet based on at least one field in a first header of the data packet. A module associated with a first stage of the switch fabric is selected based on at least one field in the first header. A second header is appended to the data packet. The second header includes an identifier associated with the destination port of the output module. The data packet is sent to the module associated with the first stage. The module associated with the first stage is configured to send the data packet to a module associated with a second stage of the switch fabric based on the second header.
摘要翻译：向交换结构发送数据的方法包括基于数据分组的第一报头中的至少一个字段将输出模块的目的端口分配给数据分组。基于第一报头中的至少一个字段来选择与交换结构的第一级相关联的模块。第二个标题附加到数据包。第二标题包括与输出模块的目的地端口相关联的标识符。数据包被发送到与第一级相关联的模块。与第一级相关联的模块被配置为基于第二标头将数据分组发送到与交换结构的第二级相关联的模块。

5. 发明授权

US08694704B2 Method and apparatus for congestion-aware routing in a computer interconnection network 有权
标题翻译：计算机互连网络中拥塞感知路由的方法和装置
公开(公告)号：US08694704B2
公开(公告)日：2014-04-08
申请号：US13615264
申请日：2012-09-13
申请人： Paul Gratz , Boris Grot , Steven W. Keckler
发明人： Paul Gratz , Boris Grot , Steven W. Keckler
IPC分类号： G06F13/00 , G06F15/173 , G01R31/08 , G06F11/00 , G08C15/00 , H04J1/16 , H04J3/14 , H04L1/00 , H04L12/26 , H04L12/28
CPC分类号： H04L47/122 , H04L45/00 , H04L45/125 , H04L45/24 , H04L45/60 , H04L47/10 , H04L49/1576
摘要： The present disclosure relates to an example of a method for a first router to adaptively determine status within a network. The network may include the first router, a second router and a third router. The method for the first router may comprise determining status information regarding the second router located in the network, and transmitting the status information to the third router located in the network. The second router and the third router may be indirectly coupled to one another.
摘要翻译：本公开涉及一种用于第一路由器自适应地确定网络内的状态的方法的示例。网络可以包括第一路由器，第二路由器和第三路由器。第一路由器的方法可以包括确定关于位于网络中的第二路由器的状态信息，以及将状态信息发送到位于网络中的第三路由器。第二路由器和第三路由器可以间接地彼此耦合。

6. 发明授权

US08432927B2 Scalable two-stage virtual output queuing switch and method of operation 有权
公开(公告)号：US08432927B2
公开(公告)日：2013-04-30
申请号：US10036809
申请日：2001-12-31
申请人： Ge Nong
发明人： Ge Nong
IPC分类号： H04L12/56
CPC分类号： H04L49/1576 , H04L12/5601 , H04L2012/5679
摘要： A fixed-size data packet switch comprising: 1) N input ports for receiving incoming fixed-size data packets at a first data rate and outputting the fixed-size data packets at the first data rate; 2) N output ports for receiving fixed-size data packets at the first data rate and outputting the fixed-size data packets at the first data rate; and 3) a switch fabric interconnecting the N input ports and the N output ports. The switch fabric comprises: a) N input buffers for receiving incoming fixed-size data packets at the first data rate and outputting the fixed-size data packets at a second data rate equal to at least twice the first data rate; b) N output buffers for receiving fixed-size data packets at the second data rate and outputting the fixed-size data packets at the first data rate; and c) a bufferless, non-blocking interconnecting network for receiving from the N input buffers the fixed-size data packets at the second data rate and transferring the fixed-size data packets to the N output buffers at the second data rate.

7. 发明授权

US08139579B2 Unicast/multicast system 有权
标题翻译：单播/组播系统
公开(公告)号：US08139579B2
公开(公告)日：2012-03-20
申请号：US12058311
申请日：2008-03-28
申请人： Yuuichi Tasaki , Kazuhiko Isoyama
发明人： Yuuichi Tasaki , Kazuhiko Isoyama
IPC分类号： H04L12/28
CPC分类号： H04L49/1576 , H04L12/5601 , H04L49/106 , H04L49/90 , H04L2012/562 , H04L2012/5641 , H04L2012/5642 , H04L2012/5681
摘要： A unicast/multicast system has an internal cell generating section that generates an internal cell to include its output index information based on user data, and an output port conversion table that stores the relation of output index information and output port number for the internal cell in the form of one-to-one for the unicast and one-to-multiple for the multicast.
摘要翻译：单播/组播系统具有内部小区生成部，其生成内部小区，以基于用户数据包含其输出索引信息;以及输出端口转换表，其将内部小区的输出索引信息和输出端口号的关系存储在单播的一对一形式，组播的一对一形式。

8. 发明授权

US07593344B2 System and method for reprogramming nodes in an automotive switch fabric network 有权
标题翻译：在汽车交换机网络中重新编程节点的系统和方法
公开(公告)号：US07593344B2
公开(公告)日：2009-09-22
申请号：US11015133
申请日：2004-12-17
申请人： Patrick D. Jordan , Hai Dong , Hugh W. Johnson , Prakash U. Kartha
发明人： Patrick D. Jordan , Hai Dong , Hugh W. Johnson , Prakash U. Kartha
IPC分类号： H04J1/16 , H04J3/14
CPC分类号： G07C5/008 , G06F8/65 , G07C5/0808 , H04L12/40 , H04L12/40032 , H04L12/4135 , H04L12/4625 , H04L41/082 , H04L49/1576 , H04L67/12 , H04L67/34 , H04L2012/40273
摘要： A system and method for reprogramming nodes in an automotive switch fabric network using a diagnostic interface. The switch fabric network includes a plurality of nodes joined by communication links for the transmission of data there between. The plurality of nodes includes at least one target node. The target node includes a processor, a transceiver, and a memory. The memory includes an erasable memory portion and a protected memory portion. The processor in the target node switches from executing instructions in the erasable memory portion to executing instructions in the protected memory portion during a reprogramming period when the target node erases a current software component and stores a new software component in its erasable memory portion. The diagnostic interface is adapted to transmit the new software component to the target node.
摘要翻译：一种用于使用诊断接口重新编程汽车交换机网络中节点的系统和方法。交换结构网络包括通过通信链路连接的多个节点，用于在其间传输数据。多个节点包括至少一个目标节点。目标节点包括处理器，收发器和存储器。存储器包括可擦除存储器部分和受保护的存储器部分。目标节点中的处理器在目标节点擦除当前软件组件并将新的软件组件存储在其可擦除存储器部分中时，在重新编程期间切换从可擦除存储器部分中的执行指令到执行受保护存储器部分中的指令。诊断接口适于将新的软件组件传输到目标节点。

9. 发明申请

US20080239949A1 LOAD-BALANCED CELL SWITCH DEVICE AND PRIORITY CONTROL METHOD 审中-公开
标题翻译：负载平衡电池开关器件和优先控制方法
公开(公告)号：US20080239949A1
公开(公告)日：2008-10-02
申请号：US12054867
申请日：2008-03-25
申请人： HIDEKI NISHIZAKI
发明人： HIDEKI NISHIZAKI
IPC分类号： H04L12/26 , H04L12/28 , H04L12/56
CPC分类号： H04L12/5601 , H04L47/125 , H04L49/1515 , H04L49/1576 , H04L49/3027 , H04L49/3081 , H04L49/508 , H04L49/552 , H04L49/90 , H04L49/901 , H04L49/9047
摘要： In cell read from a buffer for each priority provided in the intermediate stage buffers 1-5-1-1-5-N, cells can be read even from a low priority buffer within a fixed time period and at the output interfaces 1-12-1-1-12-N, cell arrival can be monitored individually on a priority basis and on a basis of each of the input interfaces 1-1-1-1-1-N while taking a cell reading cycle at the intermediate stage buffer into consideration.
摘要翻译：在中间级缓冲器1-5-1-1N中提供的每个优先级的从缓冲器读取的单元中，甚至可以在固定时间段内的低优先级缓冲器和输出接口1-12处读取单元可以在优先级基础上并且基于每个输入接口1-1-1-1 -N来单独监视小区到达，同时在中间阶段进行小区读取周期缓冲考虑。

10. 发明授权

US07139253B2 Packet switches 失效
标题翻译：分组交换机
公开(公告)号：US07139253B2
公开(公告)日：2006-11-21
申请号：US09898486
申请日：2001-07-05
申请人： Simon Paul Davis , Andrew Reeve
发明人： Simon Paul Davis , Andrew Reeve
IPC分类号： H04Q11/04
CPC分类号： H04L49/1576 , H04L49/101 , H04L49/254 , H04L49/30
摘要： A router device has a plurality of ingress line interface cards (LICs), a plurality of egress LIC's, a backplane and a controller. Transmission of signals from the ingress LICs to the controller, and from the controller to each of the ingress and egress LICs takes place across the backplane. Each ingress LIC is provided with a dedicated timeslot in which it can send information to the controller via connection. Information is sent in a slice within the dedicated timeslot and each egress LIC ignores data sent by a given ingress LIC within the timeslot assigned to said ingress LIC. A similar system is used for transmission of communications from the controller to the LICs. It is thus possible to avoid provision of additional, dedicated communications paths between the LICs (ingress and egress) and the controller.
摘要翻译：路由器设备具有多个入口线路接口卡（LIC），多个出口LIC，背板和控制器。信号从入口LIC传输到控制器，从控制器传输到每个入口和出口LIC都在背板上进行。每个入口LIC设有专用时隙，通过连接可以向控制器发送信息。信息在专用时隙内的片中发送，并且每个出口LIC忽略由分配给所述入口LIC的时隙内的给定入口LIC发送的数据。类似的系统用于从控制器到LIC的通信传输。因此，可以避免在LIC（入口和出口）与控制器之间提供附加的专用通信路径。

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