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1. 发明授权

US09124294B2 Successive approximation analog-to-digital converter (ADC) with dynamic search algorithm 有权
标题翻译：具有动态搜索算法的逐次逼近模数转换器（ADC）
公开(公告)号：US09124294B2
公开(公告)日：2015-09-01
申请号：US14558004
申请日：2014-12-02
申请人： MaxLinear, Inc.
发明人： Raja Pullela , Curtis Ling
IPC分类号： H03M1/00 , H03M1/46 , H03M1/04 , H03M1/44
CPC分类号： H03M1/38 , H03M1/002 , H03M1/04 , H03M1/44 , H03M1/46 , H03M1/462
摘要： Aspects of a method and system for a successive approximation analog-to-digital converter with dynamic search algorithms are provided. In some embodiments, a successive approximation analog-to-digital converter includes a digital-to-analog converter, a comparator, and a search and decode logice modules which cooperate to generate a digital output code representative of the analog input voltage based on a dynamic search algorithm. The dynamic search algorithms may alter a sequence of reference voltages used to successively approximate the analog input voltage based on one or more characteristics of the analog input voltage.
摘要翻译：提供了具有动态搜索算法的逐次逼近模数转换器的方法和系统的方面。在一些实施例中，逐次逼近模数转换器包括数模转换器，比较器以及搜索和解码逻辑模块，其协作以基于动态的方式产生代表模拟输入电压的数字输出代码搜索算法。动态搜索算法可以基于模拟输入电压的一个或多个特性改变用于连续逼近模拟输入电压的参考电压序列。

2. 发明授权

US08525709B2 Systems and methods for designing ADC based on probabilistic switching of memories 有权
标题翻译：基于存储器概率切换设计ADC的系统和方法
公开(公告)号：US08525709B2
公开(公告)日：2013-09-03
申请号：US13238053
申请日：2011-09-21
申请人： Subramaniam Venkatraman , Jeffrey Alexander Levin
发明人： Subramaniam Venkatraman , Jeffrey Alexander Levin
IPC分类号： H03M1/56 , H03M1/04
CPC分类号： H03M1/04 , H03M1/56
摘要： Certain aspects of the present disclosure provide a probabilistic analog to digital converter (ADC). The probabilistic ADC may be configured to convert an analog input to a variable-length or variable-amplitude pulse, apply the pulse to a plurality of memory elements as a switching pulse, and determine a digital value based on a number of memory elements that store a value after the switching pulse is applied.
摘要翻译：本公开的某些方面提供概率模数转换器（ADC）。概率ADC可以被配置为将模拟输入转换为可变长度或可变幅度脉冲，将脉冲施加到多个存储器元件作为切换脉冲，并且基于存储的存储器元件的数量来确定数字值施加开关脉冲后的值。

3. 发明授权

US4937576A Dither circuit responsive to zero input signal level 失效
标题翻译：抖动电路响应零输入信号电平
公开(公告)号：US4937576A
公开(公告)日：1990-06-26
申请号：US440175
申请日：1989-11-22
申请人： Junichi Yoshio , Masami Suzuki , Masami Tsuchida , Kiyoshi Iwai
发明人： Junichi Yoshio , Masami Suzuki , Masami Tsuchida , Kiyoshi Iwai
IPC分类号： H03M1/04 , H03M1/06 , H03M1/08 , H03M1/20 , H03M1/66
CPC分类号： H03M1/0641 , H03M1/66
摘要： A dither circuit including an adder for receiving an input signal and a dither signal which is generated by a dither signal generator, a level detection circuit for detecting the signal level of the input signal, and a dither control circuit for stopping the feeding of the dither signal to the adder when the level detection circuit detects that the signal level of the input signal is zero.
摘要翻译：一种抖动电路，包括用于接收输入信号的加法器和由抖动信号发生器产生的抖动信号，用于检测输入信号的信号电平的电平检测电路，以及用于停止抖动馈送的抖动控制电路当电平检测电路检测到输入信号的信号电平为零时，向加法器发信号。

4. 发明授权

US4864305A D/A converter 失效
标题翻译： D / A转换器
公开(公告)号：US4864305A
公开(公告)日：1989-09-05
申请号：US167346
申请日：1988-03-14
申请人： Akira Toyama
发明人： Akira Toyama
IPC分类号： H03M1/04 , H03M1/00
CPC分类号： H03M1/0639 , H03M1/74
摘要： A digital-to-analog converting device, particularly useful in audio device such as compact disc players, including an adder (CA; CA1, CA2) for adding a common random data to a digital data (d) supplied at a constant period and to a sign-reversed data (d), respectively. The signals containing the added random data are converted into analog form by a digital-to-analog converter (DT; DT1, DT2). The difference is taken between the analog signals obtained from the digital data (d) containing the added random data and the sign-reversed data (d) containing the added random data. Such circuit arrangement can provide an analog ouput signal having an amplitude which is twice as large as that obtained by the prior art and yet the resistance thermal noise contained in such analog signal has a reduced relative magnitude, whereby an improvement in signal-to-noise ratio and in tone quality can be achieved.
摘要翻译：一种数字 - 模拟转换装置，特别适用于诸如光盘播放器的音频装置，包括用于将公共随机数据添加到以恒定周期提供的数字数据（d）的加法器（CA; CA1，CA2）和一个符号反转的数据（＆upbar＆d）。包含添加的随机数据的信号通过数模转换器（DT; DT1，DT2）转换为模拟形式。在从包含添加的随机数据的数字数据（d）获得的模拟信号与包含添加的随机数据的符号反转数据（＆amp; upbar＆d）之间取得差异。这种电路装置可以提供具有现有技术获得的幅度的两倍的幅度的模拟输出信号，并且包含在这种模拟信号中的电阻热噪声具有减小的相对幅度，从而信号对噪声的改善比例和音质可以实现。

5. 发明授权

US4860356A Adaptive extrema coding signal processing system 失效
标题翻译：自适应极值编码信号处理系统
公开(公告)号：US4860356A
公开(公告)日：1989-08-22
申请号：US158681
申请日：1988-02-22
申请人： Arie Visser
发明人： Arie Visser
IPC分类号： H03M1/04 , H04B1/66 , H04B14/04
CPC分类号： H04B14/046 , H04B1/66
摘要： Adaptive extrema encoding reduces chipping noise by reducing the added-noise signal for low level input signals. Alternatively, the input signal is controlled.

6. 发明授权

US4644324A Digital to analog conversion system with the addition of dither to the digital input 失效
标题翻译：数字到模拟转换系统，加上抖动到数字输入
公开(公告)号：US4644324A
公开(公告)日：1987-02-17
申请号：US810974
申请日：1985-12-19
申请人： Tetsuro Araki , Hiroyuki Onda
发明人： Tetsuro Araki , Hiroyuki Onda
IPC分类号： H03M1/20 , H03M1/00 , H03M1/04 , H03M1/66
CPC分类号： H03M1/201
摘要： A system for converting an audio or like data signal from digital to analog form, with the addition of dither (white noise) to the digital input, with or without the subsequent removal of the dither from the analog output, for the reduction of quantization noise. Included is a network of n adders, equal in number to the n bits of the coded data signal, for adding in bit parallel form the digital data signal and the digital dither signal. Generated by an analog dither generator, the dither signal is transformed by an analog to digital converter into an m bit coded digital output, m being less than n, prior to delivery to the adder network. Some, preferably all, of the m bits of the digital dither signal are each added to, for example, two different ones of the n bits of the digital data signal so that, for instance, an eight bits analog to digital converter can be used for the provision of a digital dither signal to be added to a 16 bits digital audio signal. The adder network is connected to a digital to analog converter for converting the bit parallel addition of the data and dither signals into analog form.
摘要翻译：一种用于将音频或类似数据信号从数字形式转换成模拟形式的系统，在数字输入端添加抖动（白噪声），伴随或不用随后从模拟输出中去除抖动，以减少量化噪声。包括与编码数据信号的n位数相等的n个加法器的网络，用于以数字数据信号和数字抖动信号的位并行形式相加。由模拟抖动发生器产生的抖动信号由模拟数字转换器转换成m位编码的数字输出，m小于n，然后传送到加法器网络。数字抖动信号的m位中的一些，优选地，全部每一个都被添加到例如数字数据信号的n位中的两个不同的位，使得例如可以使用8位模数转换器用于提供要添加到16位数字音频信号的数字抖动信号。加法器网络连接到数模转换器，用于将数据和抖动信号的位并行加法转换为模拟形式。

7. 发明授权

US4594575A Digital processor for speech signals 失效
标题翻译：用于语音信号的数字处理器
公开(公告)号：US4594575A
公开(公告)日：1986-06-10
申请号：US635979
申请日：1984-07-30
申请人： James M. Avery , Elmer A. Hoyer
发明人： James M. Avery , Elmer A. Hoyer
IPC分类号： G10L13/00 , G10L11/00 , H03M1/04 , H04B14/00 , H04B14/04 , H03M1/12
CPC分类号： H04B14/046 , G10L25/00
摘要： A method and implementation apparatus for converting analog signals, such as speech signals, into digital data signals, with improved fidelity by the use of dithering techniques coupled with amplitude clipping and filtering operations.
摘要翻译：一种用于通过使用与振幅限幅和滤波操作相结合的抖动技术，将模拟信号（例如语音信号）转换为数字数据信号的方法和实现装置，具有改进的保真度。

8. 发明授权

US4524447A Digital signal processing apparatus having digital dither 失效
标题翻译：具有数字抖动的数字信号处理装置
公开(公告)号：US4524447A
公开(公告)日：1985-06-18
申请号：US498151
申请日：1983-05-25
申请人： Donald H. Willis , Jack S. Fuhrer
发明人： Donald H. Willis , Jack S. Fuhrer
IPC分类号： H04N1/405 , G06F17/10 , G06T5/00 , G06T9/00 , H03H17/02 , H03M1/04 , H03M1/20 , H03M7/30 , H03M7/36 , H04N9/64 , H04N11/04 , H04N9/50 , H04N9/32
CPC分类号： H04N9/64
摘要： The present invention provides for the generation of digitally dithered digital signals which can have an apparent quantizing resolution unaffected by truncation of the least significant bit. The truncated digital signal is dithered in an ordered fashion by adding thereto a bit developed in response to one condition of the truncated bit and is not dithered in response to another condition thereof. The original digital signal can be reconstructed by combining successive samples of the truncated digital signals. One feature of the present invention provides a truncation of digital signals.
摘要翻译：本发明提供数字抖动数字信号的产生，其可以具有不受截断最低有效位影响的明显量化分辨率。截断的数字信号以有序的方式通过加上响应于截断位的一个条件而产生的位而被响应，并且响应于其另一个条件而不抖动。原始数字信号可以通过组合截断的数字信号的连续样本来重建。本发明的一个特征提供了数字信号的截断。

9. 发明授权

US11309902B2 Gain and memory error estimation in a pipeline analog to digital converter 有权
公开(公告)号：US11309902B2
公开(公告)日：2022-04-19
申请号：US16714835
申请日：2019-12-16
申请人： Texas Instruments Incorporated
发明人： Srinivas Kumar Reddy Naru , Narasimhan Rajagopal , Shagun Dusad , Viswanathan Nagarajan , Visvesvaraya Appala Pentakota
IPC分类号： H03M1/06 , H03M1/04 , H03M1/16
摘要： In described examples, a stochastic comparator includes a first comparator that compares an input signal and a primary threshold to generate a first signal. A second comparator compares the input signal and the primary threshold to generate a second signal. A decision block generates a control signal in response to the first signal, the second signal and a PRBS (pseudo random binary sequence) signal. A XOR gate generates a detection signal in response the first signal and the second signal.

10. 发明申请

US20190006989A1 Resonator Device, Electronic Apparatus, And Vehicle 审中-公开
公开(公告)号：US20190006989A1
公开(公告)日：2019-01-03
申请号：US16021458
申请日：2018-06-28
申请人： Seiko Epson Corporation
发明人： Akio TSUTSUMI , Takashi KURASHINA , Fumikazu KOMATSU
IPC分类号： H03B5/32 , H03H9/05 , G04F10/00 , H03M1/04
摘要： A resonator device includes first and second resonators and an integrated circuit device. The integrated circuit device includes a first oscillation circuit configured to oscillate the first resonator, a second oscillation circuit configured to oscillate the second resonator, and a processing circuit configured to perform processing by using frequency difference information or frequency comparison information between a first clock signal generated by oscillating the first resonator and a second clock signal generated by oscillating the second resonator. The first resonator is supported on the integrated circuit device by a first support portion. The second resonator is supported on the integrated circuit device by a second support portion.

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