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1. 发明授权

US06836228B1 Analog-to-digital converter with switched integrator 失效
标题翻译：具有开关积分器的模数转换器
公开(公告)号：US06836228B1
公开(公告)日：2004-12-28
申请号：US10301129
申请日：2002-11-20
申请人： Roger Levinson , Phillip J. Benzel
发明人： Roger Levinson , Phillip J. Benzel
IPC分类号： H03M100
CPC分类号： H03M3/348 , H03M3/372 , H03M3/374 , H03M3/454
摘要： Methods and apparatus for converting analog signals to digital signals using a switched integrator. A method includes receiving the analog signal at a summing junction, receiving a clock signal transitioning between a first level and a second level, connecting an output of the summing junction to an integrator when the clock signal is at the first level, and disconnecting the output of the summing junction from the integrator when the clock signal is at the second level. An output signal is provided, and is determined by the polarity of an output of the integrator when the clock signal transitions from the first level to the second level. The output signal is delayed, and received with a digital-to-analog converter; which provides an output to the summing junction.
摘要翻译：使用开关积分器将模拟信号转换为数字信号的方法和装置。一种方法包括在加法结处接收模拟信号，接收在第一电平和第二电平之间转换的时钟信号，当时钟信号处于第一电平时将求和结点的输出连接到积分器，以及断开输出当时钟信号处于第二电平时，来自积分器的求和结点。提供输出信号，并且当时钟信号从第一电平转变到第二电平时由积分器的输出的极性确定。输出信号被延迟，并用数/模转换器接收; 其向求和结点提供输出。

2. 发明授权

US06801146B2 Sample and hold circuit including a multiplexer 有权
标题翻译：采样和保持电路包括多路复用器
公开(公告)号：US06801146B2
公开(公告)日：2004-10-05
申请号：US10295449
申请日：2002-11-14
申请人： Kent Kernahan , Elias Lozano , Daniel W. Yoder
发明人： Kent Kernahan , Elias Lozano , Daniel W. Yoder
IPC分类号： H03M100
CPC分类号： G11C27/02 , H03K5/133 , H03L7/0996
摘要： A sample and hold circuit is provided which includes first and second input circuits adapted to sample, respectively, first and second voltage measurements. The second voltage measurements correspond to current measurements. A multiplexer coupled to the first and second input circuits selected either the first or second measurements. A voltage sealer is provided between the output of the first input circuit and the multiplexer. A multiplier circuit, which may be a switched capacitor network, is utilized to multiply the second voltage measurements. The multiplexer provides its output to an analog-to-digital converter.
摘要翻译：提供了采样和保持电路，其包括适于分别采样第一和第二电压测量的第一和第二输入电路。第二电压测量对应于电流测量。耦合到第一和第二输入电路的多路复用器选择第一或第二测量。在第一输入电路的输出和多路复用器之间提供电压定标器。可以使用可以是开关电容器网络的乘法器电路来乘以第二电压测量。多路复用器将其输出提供给模数转换器。

3. 发明授权

US06771198B2 Method and apparatus for converting between analog and digital domains using frequency interleaving 有权
标题翻译：用于使用频率交织在模拟和数字域之间转换的方法和装置
公开(公告)号：US06771198B2
公开(公告)日：2004-08-03
申请号：US10106990
申请日：2002-03-25
申请人： Kameran Azadet
发明人： Kameran Azadet
IPC分类号： H03M100
CPC分类号： H03M3/50 , H03M1/12 , H03M1/121 , H03M1/662 , H03M3/468
摘要： A method and apparatus are disclosed for converting a signal between the analog and digital domains using frequency interleaving. The disclosed frequency interleaving techniques can be similarly applied to convert analog signals to the digital domain or vice-versa. An analog-to-digital converter decomposes the input broadband signal into N frequency bands that are separately sampled (quantized) before a Fourier transform is applied to convert the signal into the digital domain. Each of the frequency bands can be sampled in the corresponding narrow passband using narrow-band converters, such as passband Sigma-Delta converters, or can be returned to baseband prior to sampling. The various analog samples are then converted to the digital domain using an inverse Fourier transform, or another combining technique. Both sampling and analog-to-digital conversion can be performed at a speed that is N times slower than the input frequency. The disclosed frequency interleaving technique decomposes the input signal into frequency bands that are digitized separately at a slower rate. A disclosed calibration scheme corrects for phase and gain mismatches.
摘要翻译：公开了一种用于使用频率交织来在模拟和数字域之间转换信号的方法和装置。公开的频率交织技术可以类似地应用于将模拟信号转换成数字域，反之亦然。模数转换器将输入宽带信号分解为在应用傅里叶变换以将信号转换成数字域之前被单独采样（量化）的N个频带。可以使用诸如通带Σ-Δ转换器之类的窄带转换器在相应的窄通带中对每个频带进行采样，或者可以在采样之前返回到基带。然后，使用傅立叶逆变换或其他组合技术将各种模拟样本转换为数字域。采样和模数转换都可以以比输入频率慢N倍的速度进行。所公开的频率交织技术将输入信号分解成以较慢速率单独数字化的频带。公开的校准方案校正相位和增益失配。

4. 发明授权

US06727831B2 Semiconductor integrated circuit device and data transmission system 失效
标题翻译：半导体集成电路器件和数据传输系统
公开(公告)号：US06727831B2
公开(公告)日：2004-04-27
申请号：US10377821
申请日：2003-03-04
申请人： Yoshihisa Iwata
发明人： Yoshihisa Iwata
IPC分类号： H03M100
CPC分类号： G11C11/56 , G06F1/22 , H04L25/0272 , H04L25/028 , H04L25/0282 , H04L25/0292 , H04L25/0294
摘要： A data transmission system is provided including a clock source, semiconductor integrated circuit devices, a controller configured to control the semiconductor integrated circuit devices, and a clock signal pass connected to the clock source, the controller and the semiconductor integrated circuit devices. The data transmission system may include a daisy chain data pass connected to the controller and the semiconductor integrated circuit devices, and a two-way data strobe signal pass connected to the controller and the semiconductor integrated circuit devices. The clock source, the semiconductor integrated circuit devices and the controller transmit and receive therebetween a clock signal via the clock signal pass. The semiconductor integrated circuit devices and the controller transmit and receive therebetween multi-valued current data via the daisy chain data pass, and a data strobe signal in the form of a binary voltage signal via the two-way data strobe signal pass.
摘要翻译：提供一种数据传输系统，包括时钟源，半导体集成电路器件，被配置为控制半导体集成电路器件的控制器以及连接到时钟源，控制器和半导体集成电路器件的时钟信号通路。数据传输系统可以包括连接到控制器和半导体集成电路器件的菊花链数据通路，以及连接到控制器和半导体集成电路器件的双向数据选通信号通路。时钟源，半导体集成电路器件和控制器经由时钟信号通过在其间发送和接收时钟信号。半导体集成电路器件和控制器经由菊花链数据通过其间的多值电流数据，并通过双向数据选通信号通过二进制电压信号形式的数据选通信号。

5. 发明授权

US06707405B2 Integrated analog multiplexer 有权
标题翻译：集成模拟多路复用器
公开(公告)号：US06707405B2
公开(公告)日：2004-03-16
申请号：US10280162
申请日：2002-10-25
申请人： Franz Kuttner
发明人： Franz Kuttner
IPC分类号： H03M100
CPC分类号： H03K17/005 , H03F1/34 , H03F3/45475 , H03F2200/513 , H03F2203/45528 , H03F2203/45534 , H03F2203/45586 , H03F2203/45616 , H03K17/693
摘要： An integrated analog multiplexer with several multiplexer inputs, a multiplexer output, a switch device and a differential amplifier with an inverting and a non-inverting amplifier input as well as an amplifier output, wherein the amplifier output forms the multiplexer output, the differential amplifier is connected as inverting amplifier by means of a feedback branch from the amplifier output to the inverting amplifier input and the switch device selectively connects one of the multiplexer inputs with the inverting amplifier input.
摘要翻译：具有多路复用器输入的集成模拟多路复用器，多路复用器输出，开关器件和具有反相和非反相放大器输入以及放大器输出的差分放大器，其中放大器输出形成多路复用器输出，差分放大器通过从放大器输出到反相放大器输入的反馈分支连接作为反相放大器，并且开关器件选择性地将多路复用器输入中的一个与反相放大器输入连接。

6. 发明授权

US06683549B2 Digital-to-analog converter 失效
标题翻译：数模转换器
公开(公告)号：US06683549B2
公开(公告)日：2004-01-27
申请号：US10246729
申请日：2002-09-19
申请人： Yukihisa Kinugasa
发明人： Yukihisa Kinugasa
IPC分类号： H03M100
CPC分类号： H03M1/745
摘要： A digital-to-analog converter which can be used with multi-bit digital codes without increasing the module size thereof, as well as a current source and a differential amplifier, which are preferably used in the digital-to-analog converter. A constant current source supplies a current corresponding to the LSB in a digital code to be converted, resistors generate voltages corresponding to bits other than the LSB in the digital code, and as the generated voltages are applied to the gate terminals of MOSFETs, the MOSFETs permit passage of the currents corresponding to the bits other than the LSB in the digital code. A current source, together with the resistors, provides voltages to be applied to the gate terminals of the MOSFETs, which voltages make the MOSFETs operate in a sub-threshold region, and also make the MOSFETs permit passage of the currents corresponding to the bits.
摘要翻译：数模转换器，其可以与多位数字代码一起使用，而不增加其模块尺寸，以及优选地用于数模转换器的电流源和差分放大器。恒定电流源在要转换的数字代码中提供对应于LSB的电流，电阻器产生对应于数字代码中的LSB以外的位的电压，并且当所产生的电压施加到MOSFET的栅极端子时，MOSFET 允许在数字代码中通过与LSB以外的位对应的电流。电流源与电阻器一起提供施加到MOSFET的栅极端子的电压，这些电压使MOSFET在亚阈值区域中工作，并且还使得MOSFET允许通过与位相对应的电流。

7. 发明授权

US06677871B2 Analog signal converter and mobile communication system using the same 失效
标题翻译：模拟信号转换器和移动通信系统使用相同
公开(公告)号：US06677871B2
公开(公告)日：2004-01-13
申请号：US10319527
申请日：2002-12-16
申请人： Nobukazu Mihara , Izumi Hayashibara
发明人： Nobukazu Mihara , Izumi Hayashibara
IPC分类号： H03M100
CPC分类号： H03M7/3044
摘要： An encoding circuit sequentially encodes digital signals supplied in time series from a digital signal source and then transfers the encoded signals. A decoding circuit sequentially receives the encoded digital signals transferred from the encoding circuit and then decodes the signals. A digital-analog converter sequentially converts the digital signals decoded by the decoding circuit into analog signals. Thus, power consumed when the digital signal output from the digital circuitry is transferred to the analog circuitry is reduced.
摘要翻译：编码电路对从数字信号源按时间序列提供的数字信号进行顺序编码，然后传送编码信号。解码电路顺序地接收从编码电路传送的编码数字信号，然后解码信号。数模转换器将由解码电路解码的数字信号顺序转换为模拟信号。因此，当从数字电路输出的数字信号被传送到模拟电路时消耗的功率降低。

8. 发明授权

US06674379B1 Digital controller with two control paths 失效
标题翻译：数字控制器具有两个控制路径
公开(公告)号：US06674379B1
公开(公告)日：2004-01-06
申请号：US10261223
申请日：2002-09-30
申请人： Qiong Li , Demetri Giannopoulos
发明人： Qiong Li , Demetri Giannopoulos
IPC分类号： H03M100
CPC分类号： G05B21/02
摘要： A digital controller comprises two control paths each having an A/D converter. One of the two converters has a substantially higher sampling speed and lower resolution than the other. Thus, one is suitable to deal with the fast responses while the other is suitable to deal with the slow responses, and can replace high-speed high-resolution A/D converter which is high in both cost and power consumption.
摘要翻译：数字控制器包括两个具有A / D转换器的控制路径。两个转换器之一具有比另一个更高的采样速度和更低的分辨率。因此，适合于应对快速响应，另一种适用于处理慢响应，并且可以代替成本和功耗高的高速高分辨率A / D转换器。

9. 发明授权

US06642872B2 Optical code converter for optical code division multiplex system 失效
标题翻译：光码分多路复用系统光码转换器
公开(公告)号：US06642872B2
公开(公告)日：2003-11-04
申请号：US10196421
申请日：2002-07-17
申请人： Thomas Pfeiffer
发明人： Thomas Pfeiffer
IPC分类号： H03M100
CPC分类号： H04B10/299 , H04B10/2914 , H04J14/005
摘要： In OCDM systems, optical signals have hitherto been transmitted to the receiving end in the optical transmission channel assigned at the transmitting end. This type of transmission is rigid and makes possible only simple network topologies, such as, for example, point-to-point. The object of the invention is to make possible a flexible allocation of channels. The code converter according to the invention serves to convert an optical signal from a first optical transmission channel to a second optical transmission channel, and includes a first optical filter for filtering the first optical transmission channel, an optical broadband source and a second optical filter for filtering the second optical transmission channel.
摘要翻译：在OCDM系统中，迄今为止已将光信号发送到在发送端分配的光传输信道中的接收端。这种类型的传输是刚性的，并且仅使得简单的网络拓扑结构成为可能，例如点到点。本发明的目的是使信道的灵活分配成为可能。根据本发明的码转换器用于将来自第一光传输信道的光信号转换为第二光传输信道，并且包括用于对第一光传输信道进行滤波的第一滤光器，光宽带源和第二滤光器，对第二光传输通道进行滤波。

10. 发明授权

US06633246B1 Converter circuit with reduced area switch compensation resistance 有权
标题翻译：具有减小面积开关补偿电阻的转换器电路
公开(公告)号：US06633246B1
公开(公告)日：2003-10-14
申请号：US10273019
申请日：2002-10-16
申请人： Derek F. Bowers
发明人： Derek F. Bowers
IPC分类号： H03M100
CPC分类号： H03M1/089 , H03M1/785
摘要： Unwanted voltage drops associated with the bit switches of a DAC are compensated with an output amplifier circuit for the DAC that includes a feedback circuit with a switch compensation resistance element that is connected in a combined series/parallel circuit with a feedback resistance circuit, so as to reduce both the size and associated capacitance of the resistance element.
摘要翻译：与DAC的位开关相关联的不希望的电压降由DAC的输出放大器电路补偿，DAC的输出放大器电路包括具有与组合串联/并联电路与反馈电阻电路连接的开关补偿电阻元件的反馈电路，因此以减小电阻元件的尺寸和相关电容。

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