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1. 发明申请

US20210203354A1 COMPRESSION AND DECOMPRESSION ENGINES AND COMPRESSED DOMAIN PROCESSORS 有权
公开(公告)号：US20210203354A1
公开(公告)日：2021-07-01
申请号：US17249740
申请日：2021-03-11
申请人： SiliconIP, Inc.
发明人： Dan E. Tamir , Dan Bruck
IPC分类号： H03M7/30 , H03M7/40 , H03M7/02 , G06F7/74 , G06F9/30 , G06F7/76 , H03M7/24 , H03M7/18 , H04N19/48
摘要： Compressed domain processors configured to perform operations on data compressed in a format that preserves order. The Compressed domain processors may include operations such as addition, subtraction, multiplication, division, sorting, and searching. In some cases, compression engines for compressing the data into the desired formats are provided.

2. 发明申请

US20210126650A1 Arithmetic Encoders, Arithmetic Decoders, Video Encoder, Video Decoder, Methods for Encoding, Methods for Decoding and Computer Program 有权
公开(公告)号：US20210126650A1
公开(公告)日：2021-04-29
申请号：US17142071
申请日：2021-01-05
申请人： Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
发明人： Heiner Kirchhoffer , Jan Stegemann , Detlev Marpe , Paul Haase , Stefan Matlage , Christian Bartnik , Heiko Schwarz , Thomas Wiegand
IPC分类号： H03M7/40 , H03M7/42 , H03M7/02 , H03M7/30 , H04N19/13
摘要： An arithmetic encoder for encoding a plurality of symbols having symbol values is configured to derive an interval size information for an arithmetic encoding of one or more symbol values to be encoded based on a plurality of state variable values representing statistics of a plurality of previously encoded symbol values with different adaptation time constants. The arithmetic encoder is configured to map a first state variable value, or a scaled and/or rounded version thereof, using a lookup-table and to map a second state variable value, or a scaled and/or rounded version thereof using the lookup-table, in order to obtain the interval size information describing an interval size for the arithmetic encoding of one or more symbols to be encoded. Further arithmetic encoders, arithmetic decoders, video encoders, video decoder, methods for encoding, methods for decoding and computer programs are also disclosed which are based on the same concept and on other concepts.

3. 发明申请

US20210012058A1 Hybrid Comparison for Unicode Text Strings Consisting Primarily of ASCII Characters 有权
公开(公告)号：US20210012058A1
公开(公告)日：2021-01-14
申请号：US17037505
申请日：2020-09-29
申请人： Tableau Software, Inc.
发明人： Thomas NEUMANN , Viktor Leis , Alfons Kemper
IPC分类号： G06F40/126 , H03M7/30 , H03M7/02 , H03M7/14 , G06F40/20 , G06F40/166 , G06F16/2453
摘要： A method compares text strings having Unicode encoding. The method receives a first string S=s1s2 . . . sn and a second string T=t1t2 . . . tm, where s1, s2, . . . , sn and t1, t2, . . . , tm are Unicode characters. The method computes a first string weight for the first string S according to a weight function ƒ. When S consists of ASCII characters, ƒ(S)=S. when S includes one or more non-replaceable non-ASCII characters, the first string weight ƒ(S) is a concatenation of an ASCII weight prefix ƒA(S) and a Unicode weight suffix ƒU(S). The method also computes a second string weight for the second text string T. Equality of the strings is tested using the string weights.

4. 发明申请

US20200343907A1 COMPRESSION AND DECOMPRESSION ENGINES AND COMPRESSED DOMAIN PROCESSORS 审中-公开
公开(公告)号：US20200343907A1
公开(公告)日：2020-10-29
申请号：US16946913
申请日：2020-07-10
申请人： iDensify LLC
发明人： Dan E. Tamir , Dan Bruck
IPC分类号： H03M7/30 , H03M7/40 , H03M7/02 , G06F7/74 , G06F9/30 , G06F7/76 , H03M7/24 , H03M7/18 , H04N19/48
摘要： Compressed domain processors configured to perform operations on data compressed in a format that preserves order. The Compressed domain processors may include operations such as addition, subtraction, multiplication, division, sorting, and searching. In some cases, compression engines for compressing the data into the desired formats are provided.

5. 发明授权

US10778245B1 Bit string conversion 有权
公开(公告)号：US10778245B1
公开(公告)日：2020-09-15
申请号：US16545366
申请日：2019-08-20
申请人： Micron Technology, Inc.
发明人： Vijay S. Ramesh , Katie Blomster Park
IPC分类号： H03M7/02 , H03M7/28 , G06F7/483
摘要： Systems, apparatuses, and methods related to bit string conversion are described. Circuitry can perform operations on bit strings, such as universal number and/or posit bit strings, to alter a level of precision (e.g., a dynamic range, resolution, etc.) of the bit strings. For instance, bit string conversion can include receiving, by a memory resource coupled to logic circuitry, a first bit string having a first bit string length. The first quantity of bits can comprise a first bit sub-set, a second bit sub-set, a third bit sub-set, and a fourth bit sub-set. The logic circuitry monitor numerical values corresponding to at least one bit sub-set of the bit string to determine a dynamic range corresponding to the data and/or precision corresponding to the data and generate a second bit string having a second bit string length based, at least in part, on the determined dynamic range of the data, the precision of the data.

6. 发明授权

US10666291B1 High efficiency data decoder 有权
公开(公告)号：US10666291B1
公开(公告)日：2020-05-26
申请号：US16351125
申请日：2019-03-12
申请人： Microsoft Technology Licensing, LLC
发明人： Amer Aref Hassan , Russell Andrew Penar , Whitney Janice Giaimo
IPC分类号： H03M7/30 , H03M7/02
摘要： Disclosed are systems, methods, and non-transitory computer-readable media for a high efficiency data decoder. The high efficiency data decoder accesses an encoded data input from an input device and determines that the encoded data input does not map to any predetermined data outputs from a set of predetermined data outputs. The high efficiency data decoder selects, based on a ranking of modifications for the input device, a modification to perform on the encoded data input. The high efficiency data decoder performs the first modification on the encoded data input, yielding a modified encoded data input. If the modified encoded data input maps to a first data output from the set of predetermined data outputs, the high efficiency data decoder decodes the encoded data input into the first data output.

7. 发明授权

US09124287B1 Scrambler with built in test capabilities for unary DAC 有权
标题翻译：具有一体化DAC的内置测试功能的加扰器
公开(公告)号：US09124287B1
公开(公告)日：2015-09-01
申请号：US14580099
申请日：2014-12-22
申请人： PMC-SIERRA US, INC.
发明人： Stanley Ho , William Michael Lye
IPC分类号： H03M1/10 , H03M1/66 , G01R31/3167 , H03M1/06 , H03M7/02
CPC分类号： G01R31/3167 , H03M1/0673 , H03M1/109 , H03M1/66 , H03M7/02 , H03M7/165 , H03M7/22
摘要： An apparatus comprising a scrambler having a plurality of scrambler inputs and 2N scrambler outputs, and a unary-weighted digital to analog converter (DAC) connected to scrambler to generate an analog output signal based on the 2N scrambler outputs. The scrambler has N unique scrambling stages arranged in order between the scrambler inputs and the scrambler outputs from a first scrambling stage to a last scrambling stage. Each of the N unique scrambling stages has a plurality of stage inputs and outputs, with the stage inputs of the first scrambling stage connected to the scrambler inputs, the stage outputs of each scrambling stage except the last scrambling stage connected to the stage inputs of a next scrambling stage, and the stage outputs of the last scrambling stage connected to the scrambler outputs. Each of the N unique scrambling stages is operable to pass signals at the inputs to the outputs in either an unscrambled or scrambled state under control of a control bit provided by an N-bit entropy signal. When an N+1 bit input signal is applied to the scrambler inputs and the N-bit entropy signal is randomized the analog output signal from the DAC has improved linearity compared to the analog output signal generated from a non-scrambled input, and when a test input signal is applied to the scrambler inputs and the entropy signal is swept through 2N orthogonal values the analog output signal from the DAC indicates whether a fault exists in one of the scrambler and the DAC.
摘要翻译：一种包括具有多个加扰器输入和2N个加扰器输出的加扰器的装置，以及连接到加扰器的一次加密数模转换器（DAC），以基于2N个加扰器输出产生模拟输出信号。加扰器具有N个唯一的加扰阶段，其按扰频器输入和从第一加扰阶段到最后加扰阶段的加扰器输出之间的顺序排列。 N个唯一加扰阶段中的每一个具有多个级输入和输出，其中第一加扰级的级输入连接到加扰器输入，除了与第一加扰级相连的第一加扰级之外的每个加扰级的级输出下一个加扰阶段，以及连接到加扰器输出的最后一个加扰级的级输出。 N个唯一加扰级中的每一个可操作以在由N位熵信号提供的控制位的控制下以未加扰或加扰状态将输入处的信号传递到输出。当将N + 1位输入信号施加到扰频器输入并且N位熵信号被随机化时，与从非加扰输入产生的模拟输出信号相比，来自DAC的模拟输出信号具有改善的线性度，并且当测试输入信号被施加到加扰器输入，并且熵信号通过2N个正交值扫描，来自DAC的模拟输出信号指示在扰频器和DAC之一中是否存在故障。

8. 发明授权

US08988255B2 Apparatus and method for coding data based on phasor disparity 有权
标题翻译：基于相量差异编码数据的装置和方法
公开(公告)号：US08988255B2
公开(公告)日：2015-03-24
申请号：US14006702
申请日：2011-10-01
申请人： Dawson W. Kesling , Maynard C. Falconer , Kevin P. Slattery , Harry G. Skinner
发明人： Dawson W. Kesling , Maynard C. Falconer , Kevin P. Slattery , Harry G. Skinner
IPC分类号： H03M7/00 , H03M7/02 , H04L27/34
CPC分类号： H03M7/02 , H04L27/3411
摘要： A method for managing information includes receiving bits of data, determining phasors for bits at only one frequency of a transmission spectrum, combining the phasors of bits that form a phasor having a spectral energy that lies within a predetermined range, and forming a codeword from the bits of the combined phasors.
摘要翻译：一种用于管理信息的方法包括接收数据位，仅在传输频谱的一个频率处确定位的相量，组合具有处于预定范围内的频谱能量的相量的位的相量，以及从组合相量的位。

9. 发明申请

US20100289675A1 Method of transforming geographic coordinate 有权
标题翻译：变换地理坐标的方法
公开(公告)号：US20100289675A1
公开(公告)日：2010-11-18
申请号：US12010924
申请日：2008-01-31
申请人： Naoki Ueda
发明人： Naoki Ueda
IPC分类号： H03M7/02
CPC分类号： G09B29/10 , G01C21/20 , G09B29/00
摘要： A method of transforming a geographic coordinate to a geographic location code includes the steps of: retrieving a latitude value and a longitude value of the geographic coordinate; quantizing the latitude value to a first integer value; quantizing the longitude value to a second integer value; converting the first integer value to a first code string, said first code string including a first digit representing a non-numeric character, a second digit representing a non-numeric character, and a third digit representing a numeric character; converting the second integer value to a second code string, said second code string including a fourth digit representing a non-numeric character, a fifth digit representing a non-numeric character, and a sixth digit representing a numeric character; and combining the first code string and the second code string to obtain the geographic location code having a fixed pattern of radix in a mixed radix notation system representation.
摘要翻译：将地理坐标变换为地理位置码的方法包括以下步骤：检索地理坐标的纬度值和经度值; 将纬度值量化为第一个整数值; 将经度值量化为第二整数值; 将所述第一整数值转换为第一代码串，所述第一代码串包括表示非数字字符的第一数字，表示非数字字符的第二数字和表示数字字符的第三数字; 将所述第二整数值转换为第二代码串，所述第二代码串包括表示非数字字符的第四数字，表示非数字字符的第五数字和表示数字字符的第六数字; 以及组合所述第一代码串和所述第二代码串，以获得具有固定模式的基数的地理位置代码。

10. 发明授权

US5598435A Digital modulation using QAM with multiple signal point constellations not equal to a power of two 失效
标题翻译：使用具有多个信号点星座的QAM的数字调制不等于2的幂
公开(公告)号：US5598435A
公开(公告)日：1997-01-28
申请号：US192092
申请日：1994-02-04
申请人： Richard G. C. Williams
发明人： Richard G. C. Williams
IPC分类号： H04L27/26 , H04K1/10 , H03M7/02 , H04L17/02
CPC分类号： H04L5/0046 , H04L5/006
摘要： Data are transmitted using multiple carriers modulated by quadrature amplitude modulation. In general, the carriers carry different numbers of bits, to exploit the fact that the properties of a transmission path are more favorable to carriers at some frequencies than to those at others. The bit allocation process is made closer to optimum by permitting allocation of a non-integer number of bits to a carrier. Input bits are grouped for several carriers and this binary representation is converted to a number representation in which the base of each digit corresponds to the number of points in the QAM constellation for a respective carrier (or to this number divided by a power of two).
摘要翻译：使用由正交幅度调制调制的多个载波来发送数据。通常，载波携带不同数量的比特，以利用传输路径的属性比某些频率的载波更有利于在某些频率上的载波。通过允许向载波分配非整数比特来使比特分配过程更接近于最优。对于多个载波，输入比特被分组，并且该二进制表示被转换成数字表示，其中每个数字的基数对应于相应载波的QAM星座中的点数（或者除以2的幂）。

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