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    • 7. 发明授权
    • Interpolation circuit and reception system
    • 插值电路和接收系统
    • US08872574B2
    • 2014-10-28
    • US13755900
    • 2013-01-31
    • Fujitsu Limited
    • Yoshiyasu Doi
    • G06F7/64G06G7/18G06G7/19
    • H03K5/00G11C27/024
    • An interpolation circuit includes: a first node to receive a first current; a second node to receive a second current; a third node to receive a third current; a first capacitor circuit including: first capacitors; a first switch to couple one end of each of first capacitors to one of first and second nodes; and a first output coupled to the other end of each of first capacitors; a second capacitor circuit including: second capacitors; a second switch to couple one end of each of second capacitors to one of second and third nodes; and a second output node coupled to the other end of each of second capacitors; and a third capacitor circuit including: a third capacitor whose one end is coupled to the second node; and a third switch to couple the other end of the third capacitor to one of first and second output nodes.
    • 插值电路包括:接收第一电流的第一节点; 用于接收第二电流的第二节点; 接收第三电流的第三节点; 第一电容器电路,包括:第一电容器; 第一开关,用于将每个第一电容器的一端耦合到第一和第二节点之一; 以及耦合到每个第一电容器的另一端的第一输出; 第二电容器电路,包括:第二电容器; 第二开关,用于将每个第二电容器的一端耦合到第二和第三节点之一; 以及耦合到每个第二电容器的另一端的第二输出节点; 以及第三电容器电路,包括:第三电容器,其一端耦合到所述第二节点; 以及将第三电容器的另一端耦合到第一和第二输出节点之一的第三开关。
    • 10. 发明授权
    • Integrator input error correction circuit and circuit method
    • 积分器输入误差校正电路和电路方法
    • US08558610B2
    • 2013-10-15
    • US13313491
    • 2011-12-07
    • Sasan Cyrusian
    • Sasan Cyrusian
    • H03F3/38G06F7/64
    • H03F3/38H03F3/217H03F3/26
    • A circuit includes a first amplifier and a second amplifier, wherein first amplifier is configured to receive an input current at a first input of the first amplifier, and an output of the first op-mp is configured to drive a first input of the second amplifier. The circuit further includes a pull-up current source selectively coupled to the first input of the second amplifier, and a pull-down current source selectively coupled to the first input of the second amplifier. If the absolute value of the input current is larger than a predefined threshold current: i) the pull-up current source is configured to drive current into the first input of the second amplifier for a first polarity of the input current, and ii) the pull-down current source is configured to sink current from the first input of the second amplifier for a second polarity of the input current.
    • 电路包括第一放大器和第二放大器,其中第一放大器被配置为在第一放大器的第一输入处接收输入电流,并且第一op-mp的输出被配置为驱动第二放大器的第一输入 。 电路还包括选择性地耦合到第二放大器的第一输入的上拉电流源,以及选择性地耦合到第二放大器的第一输入的下拉电流源。 如果输入电流的绝对值大于预定义的阈值电流:i)上拉电流源被配置成驱动电流进入第二放大器的第一输入端用于输入电流的第一极性,以及ii) 下拉电流源被配置为从输入电流的第二极性吸收来自第二放大器的第一输入端的电流。