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1. 发明授权

US07659727B2 Multilayer wiring board and method for testing the same 有权
标题翻译：多层接线板及其测试方法
公开(公告)号：US07659727B2
公开(公告)日：2010-02-09
申请号：US12072704
申请日：2008-02-27
申请人： Yoshiyuki Fukami
发明人： Yoshiyuki Fukami
IPC分类号： G01R31/02 , G01R27/26
CPC分类号： G01R31/2812 , G01R31/2805 , H05K1/0268 , H05K1/0306 , H05K1/117 , H05K3/4605 , H05K2201/09845
摘要： A multilayer wiring board has a ceramic substrate, on which a multilayer wiring section is formed. One of the conductor layers has a grounded pattern. Each of the conductor layers has a reference pattern, which is usable as a standard in calculation of an electric capacitance. An electric capacitance is measured between the grounded pattern and the three-dimensional wiring path. On the other hand, a theoretical electrical capacitance is calculated on the basis of a reference value of electric capacitance which has been measured between the reference pattern and the grounded pattern. The measured value for the wiring path is compared to the calculated value to determine whether the three-dimensional wiring path is good or bad. As the multilayer wiring section has the reference patterns, the electric capacitance for the normal wiring path can be obtained by calculation without preparing the normal acceptable product.
摘要翻译：多层布线基板具有形成有多层布线部的陶瓷基板。其中一个导体层具有接地图案。每个导体层具有参考图案，其可用作电容计算中的标准。在接地图案和三维布线路径之间测量电容。另一方面，基于在参考图案和接地图案之间测量的电容的基准值来计算理论电容。将接线路径的测量值与计算值进行比较，以确定三维布线路径是好还是坏。由于多层布线部分具有参考图案，所以通常在不准备正常的可接受产品的情况下通过计算获得正常布线路径的电容。

2. 发明授权

US07656166B2 Multilayer wiring board and method for testing the same 有权
标题翻译：多层接线板及其测试方法
公开(公告)号：US07656166B2
公开(公告)日：2010-02-02
申请号：US12072703
申请日：2008-02-27
申请人： Yoshiyuki Fukami
发明人： Yoshiyuki Fukami
IPC分类号： G01R31/02 , G01R27/26
CPC分类号： H05K1/0268 , G01R31/2805 , G01R31/2812 , H05K1/0306 , H05K3/4605 , H05K2201/09481 , H05K2201/09845
摘要： A multilayer wiring board has a ceramic substrate, on which a multilayer wiring section is formed. The ceramic substrate has an internal conductor layer, which is connected to a test pad. The first conductor layer is formed, and then an electric capacitance is measured between the test pad and a wiring pattern of the first conductor layer. On the other hand, an electrical capacitance is calculated under the normal wiring pattern condition. The measured value is compared to the calculated value to determine whether the wiring pattern is good or bad. Similar measurements and comparisons are carried out for each of the second through fifth conductor layers to determine whether a three-dimensional wiring path is good or bad. As the ceramic substrate has an internal conductor layer, the electric capacitance of the wiring can be measured without an overall grounded layer in the multilayer wiring section, which is a characteristic part different from others among a variety of the multilayer wiring boards.
摘要翻译：多层布线基板具有形成有多层布线部的陶瓷基板。陶瓷基板具有连接到测试垫的内部导体层。形成第一导体层，然后在测试焊盘和第一导体层的布线图案之间测量电容。另一方面，在正常布线图案条件下计算电容。将测量值与计算值进行比较，以确定布线图案是好还是坏。对于第二至第五导体层中的每一个执行类似的测量和比较，以确定三维布线路径是好还是坏。由于陶瓷基板具有内部导体层，所以可以在多层布线部中没有整体接地层来测量布线的电容，这是各种多层布线板中与其他布线板不同的特征部分。

3. 发明申请

US20080157794A1 Probe unit substrate 有权
标题翻译：探头单元基板
公开(公告)号：US20080157794A1
公开(公告)日：2008-07-03
申请号：US12005488
申请日：2007-12-27
申请人： Yoshiyuki Fukami
发明人： Yoshiyuki Fukami
IPC分类号： G01R1/02
CPC分类号： G01R1/0735 , G01R1/06727
摘要： A ceramic substrate has, on its surface, a multilayer wiring division, on which micro cantilever type probes are fixed. The multilayer wiring division has the first conductor layer, which includes through-hole junction pads, flatness improvement rings surrounding the through-hole junction pads and a grounding region further surrounding the flatness improvement rings. Since the flatness improvement rings are located around the through-hole junction pads, the surface of the first insulating layer, which is located above the first conductor layer, is free from severe undulation even near the through-hole junction pads. Accordingly, the multilayer wiring division has less irregularity in shape as a whole, and thus the probe mounting pads on the surface of the second insulating layer do not slope but keep almost horizontal. The probe unit substrate according to the invention has an advantage of less surface undulation and having non-sloping probe mounting pads without using a complicated manufacturing process.
摘要翻译：陶瓷基板在其表面上具有固定有微悬臂型探针的多层布线部。多层布线部分具有第一导体层，其包括通孔连接垫，围绕通孔结垫的平坦度改善环和进一步围绕平坦度改进环的接地区。由于平坦度改善环位于通孔结垫周围，所以位于第一导体层之上的第一绝缘层的表面即使在通孔结垫附近也没有严重的起伏。因此，多层布线部的整体形状不均匀性较差，因此第二绝缘层表面上的探针安装焊盘不倾斜但保持几乎水平。根据本发明的探针单元基板具有表面波动较小的优点，并且不使用复杂的制造工艺而具有非倾斜的探针安装垫。

4. 发明申请

US20090128175A1 PROBE UNIT SUBSTRATE 有权
标题翻译：探测单元基板
公开(公告)号：US20090128175A1
公开(公告)日：2009-05-21
申请号：US12353813
申请日：2009-01-14
申请人： Yoshiyuki FUKAMI
发明人： Yoshiyuki FUKAMI
IPC分类号： G01R1/067
CPC分类号： G01R1/0735 , G01R1/06727
摘要： A ceramic substrate has, on its surface, a multilayer wiring division, on which micro cantilever type probes are fixed. The multilayer wiring division has the first conductor layer, which includes through-hole junction pads, flatness improvement rings surrounding the through-hole junction pads and a grounding region further surrounding the flatness improvement rings. Since the flatness improvement rings are located around the through-hole junction pads, the surface of the first insulating layer, which is located above the first conductor layer, is free from severe undulation even near the through-hole junction pads. Accordingly, the multilayer wiring division has less irregularity in shape as a whole, and thus the probe mounting pads on the surface of the second insulating layer do not slope but keep almost horizontal. The probe unit substrate according to the invention has an advantage of less surface undulation and having non-sloping probe mounting pads without using a complicated manufacturing process.
摘要翻译：陶瓷基板在其表面上具有固定有微悬臂型探针的多层布线部。多层布线部分具有第一导体层，其包括通孔连接垫，围绕通孔结垫的平坦度改善环和进一步围绕平坦度改进环的接地区。由于平坦度改善环位于通孔结垫周围，所以位于第一导体层之上的第一绝缘层的表面即使在通孔结垫附近也没有严重的起伏。因此，多层布线部的整体形状不均匀性较差，因此第二绝缘层表面上的探针安装焊盘不倾斜但保持几乎水平。根据本发明的探针单元基板具有表面波动较小的优点，并且不使用复杂的制造工艺而具有非倾斜的探针安装垫。

5. 发明申请

US20090160473A1 CONTACTOR FOR ELECTRICAL TEST, ELECTRICAL CONNECTING APPARATUS USING THE SAME, AND METHOD FOR MANUFACTURING CONTACTOR 有权
标题翻译：用于电气测试的接触器，使用该电气测试的电气连接装置以及制造接触器的方法
公开(公告)号：US20090160473A1
公开(公告)日：2009-06-25
申请号：US12339883
申请日：2008-12-19
申请人： Yoshiyuki FUKAMI , Kazuya Numajiri , Osamu Arai , Hideki Hirakawa
发明人： Yoshiyuki FUKAMI , Kazuya Numajiri , Osamu Arai , Hideki Hirakawa
IPC分类号： G01R1/067 , G01R3/00
CPC分类号： G01R1/06727 , Y10T29/49204
摘要： An electrical test contactor comprises a contactor main body including a plate-shaped attachment portion extending in the up-down direction, a plate-shaped arm portion extending from the lower end portion of the attachment portion at least to one side in the right-left direction, and a plate-shaped pedestal portion projecting downward from the tip end portion of the arm portion, a contact portion projecting downward from the lower end of the pedestal portion and having the lower end of the contact portion acting as a probe tip, and a resistor having a higher resistance value than the contactor main body and the contact portion and arranged at the contactor main body so as to heighten the resistance value of the contactor.
摘要翻译：电测试接触器包括接触器主体，该接触器主体包括沿上下方向延伸的板状安装部分，从连接部分的下端部至少向左右一侧延伸的板状臂部方向，以及从臂部的前端部向下方突出的板状的台座部，从基座部的下端向下方突出并具有作为探针头的接触部的下端的接触部，以及电阻器具有比接触器主体和接触部分高的电阻值，并且布置在接触器主体上，以便提高接触器的电阻值。

6. 发明授权

US07504843B2 Probe unit substrate 有权
标题翻译：探头单元基板
公开(公告)号：US07504843B2
公开(公告)日：2009-03-17
申请号：US12005488
申请日：2007-12-27
申请人： Yoshiyuki Fukami
发明人： Yoshiyuki Fukami
IPC分类号： G01R31/02
CPC分类号： G01R1/0735 , G01R1/06727
摘要： A ceramic substrate has, on its surface, a multilayer wiring division, on which micro cantilever type probes are fixed. The multilayer wiring division has the first conductor layer, which includes through-hole junction pads, flatness improvement rings surrounding the through-hole junction pads and a grounding region further surrounding the flatness improvement rings. Since the flatness improvement rings are located around the through-hole junction pads, the surface of the first insulating layer, which is located above the first conductor layer, is free from severe undulation even near the through-hole junction pads. Accordingly, the multilayer wiring division has less irregularity in shape as a whole, and thus the probe mounting pads on the surface of the second insulating layer do not slope but keep almost horizontal. The probe unit substrate according to the invention has an advantage of less surface undulation and having non-sloping probe mounting pads without using a complicated manufacturing process.
摘要翻译：陶瓷基板在其表面上具有固定有微悬臂型探针的多层布线部。多层布线部分具有第一导体层，其包括通孔连接垫，围绕通孔结垫的平坦度改善环和进一步围绕平坦度改进环的接地区。由于平坦度改善环位于通孔结垫周围，所以位于第一导体层之上的第一绝缘层的表面即使在通孔结垫附近也没有严重的起伏。因此，多层布线部的整体形状不均匀性较差，因此第二绝缘层表面上的探针安装焊盘不倾斜但保持几乎水平。根据本发明的探针单元基板具有表面波动较小的优点，并且不使用复杂的制造工艺而具有非倾斜的探针安装垫。

7. 发明申请

US20080204037A1 Multilayer wiring board and method for testing the same 有权
标题翻译：多层接线板及其测试方法
公开(公告)号：US20080204037A1
公开(公告)日：2008-08-28
申请号：US12072703
申请日：2008-02-27
申请人： Yoshiyuki Fukami
发明人： Yoshiyuki Fukami
IPC分类号： G01R31/02 , H05K1/00
CPC分类号： H05K1/0268 , G01R31/2805 , G01R31/2812 , H05K1/0306 , H05K3/4605 , H05K2201/09481 , H05K2201/09845
摘要： A multilayer wiring board has a ceramic substrate, on which a multilayer wiring section is formed. The ceramic substrate has an internal conductor layer, which is connected to a test pad. The first conductor layer is formed, and then an electric capacitance is measured between the test pad and a wiring pattern of the first conductor layer. On the other hand, an electrical capacitance is calculated under the normal wiring pattern condition. The measured value is compared to the calculated value to determine whether the wiring pattern is good or bad. Similar measurements and comparisons are carried out for each of the second through fifth conductor layers to determine whether a three-dimensional wiring path is good or bad. As the ceramic substrate has an internal conductor layer, the electric capacitance of the wiring can be measured without an overall grounded layer in the multilayer wiring section, which is a characteristic part different from others among a variety of the multilayer wiring boards.
摘要翻译：多层布线基板具有形成有多层布线部的陶瓷基板。陶瓷基板具有连接到测试垫的内部导体层。形成第一导体层，然后在测试焊盘和第一导体层的布线图案之间测量电容。另一方面，在正常布线图案条件下计算电容。将测量值与计算值进行比较，以确定布线图案是好还是坏。对于第二至第五导体层中的每一个执行类似的测量和比较，以确定三维布线路径是好还是坏。由于陶瓷基板具有内部导体层，所以可以在多层布线部中没有整体接地层来测量布线的电容，这是各种多层布线板中与其他布线板不同的特征部分。

8. 发明授权

US07960988B2 Contactor for electrical test, electrical connecting apparatus using the same, and method for manufacturing contactor 有权
标题翻译：电气试验用接触器，使用其的电气连接装置以及接触器的制造方法
公开(公告)号：US07960988B2
公开(公告)日：2011-06-14
申请号：US12339883
申请日：2008-12-19
申请人： Yoshiyuki Fukami , Kazuya Numajiri , Osamu Arai , Hideki Hirakawa
发明人： Yoshiyuki Fukami , Kazuya Numajiri , Osamu Arai , Hideki Hirakawa
IPC分类号： G01R31/20 , G01R1/067 , G01R31/00
CPC分类号： G01R1/06727 , Y10T29/49204
摘要： An electrical test contactor comprises a contactor main body including a plate-shaped attachment portion extending in the up-down direction, a plate-shaped arm portion extending from the lower end portion of the attachment portion at least to one side in the right-left direction, and a plate-shaped pedestal portion projecting downward from the tip end portion of the arm portion, a contact portion projecting downward from the lower end of the pedestal portion and having the lower end of the contact portion acting as a probe tip, and a resistor having a higher resistance value than the contactor main body and the contact portion and arranged at the contactor main body so as to heighten the resistance value of the contactor.
摘要翻译：电测试接触器包括接触器主体，该接触器主体包括沿上下方向延伸的板状安装部分，从连接部分的下端部至少向左右一侧延伸的板状臂部方向，以及从臂部的前端部向下方突出的板状的台座部，从基座部的下端向下方突出并具有作为探针头的接触部的下端的接触部，以及电阻器具有比接触器主体和接触部分高的电阻值，并且布置在接触器主体上，以便提高接触器的电阻值。

9. 发明授权

US07800384B2 Probe unit substrate 有权
标题翻译：探头单元基板
公开(公告)号：US07800384B2
公开(公告)日：2010-09-21
申请号：US12353813
申请日：2009-01-14
申请人： Yoshiyuki Fukami
发明人： Yoshiyuki Fukami
IPC分类号： G01R31/02
CPC分类号： G01R1/0735 , G01R1/06727
摘要： A ceramic substrate has, on its surface, a multilayer wiring division, on which micro cantilever type probes are fixed. The multilayer wiring division has the first conductor layer, which includes through-hole junction pads, flatness improvement rings surrounding the through-hole junction pads and a grounding region further surrounding the flatness improvement rings. Since the flatness improvement rings are located around the through-hole junction pads, the surface of the first insulating layer, which is located above the first conductor layer, is free from severe undulation even near the through-hole junction pads. Accordingly, the multilayer wiring division has less irregularity in shape as a whole, and thus the probe mounting pads on the surface of the second insulating layer do not slope but keep almost horizontal. The probe unit substrate according to the invention has an advantage of less surface undulation and having non-sloping probe mounting pads without using a complicated manufacturing process.
摘要翻译：陶瓷基板在其表面上具有固定有微悬臂型探针的多层布线部。多层布线部分具有第一导体层，其包括通孔连接垫，围绕通孔结垫的平坦度改善环和进一步围绕平坦度改进环的接地区。由于平坦度改善环位于通孔结垫周围，所以位于第一导体层之上的第一绝缘层的表面即使在通孔结垫附近也没有严重的起伏。因此，多层布线部的整体形状不均匀性较差，因此第二绝缘层表面上的探针安装焊盘不倾斜但保持几乎水平。根据本发明的探针单元基板具有表面波动较小的优点，并且不使用复杂的制造工艺而具有非倾斜的探针安装垫。

10. 发明申请

US20080204038A1 Multilayer wiring board and method for testing the same 有权
标题翻译：多层接线板及其测试方法
公开(公告)号：US20080204038A1
公开(公告)日：2008-08-28
申请号：US12072704
申请日：2008-02-27
申请人： Yoshiyuki Fukami
发明人： Yoshiyuki Fukami
IPC分类号： G01R31/02 , H05K1/00
CPC分类号： G01R31/2812 , G01R31/2805 , H05K1/0268 , H05K1/0306 , H05K1/117 , H05K3/4605 , H05K2201/09845
摘要： A multilayer wiring board has a ceramic substrate, on which a multilayer wiring section is formed. One of the conductor layers has a grounded pattern. Each of the conductor layers has a reference pattern, which is usable as a standard in calculation of an electric capacitance. An electric capacitance is measured between the grounded pattern and the three-dimensional wiring path. On the other hand, a theoretical electrical capacitance is calculated on the basis of a reference value of electric capacitance which has been measured between the reference pattern and the grounded pattern. The measured value for the wiring path is compared to the calculated value to determine whether the three-dimensional wiring path is good or bad. As the multilayer wiring section has the reference patterns, the electric capacitance for the normal wiring path can be obtained by calculation without preparing the normal acceptable product.
摘要翻译：多层布线基板具有形成有多层布线部的陶瓷基板。其中一个导体层具有接地图案。每个导体层具有参考图案，其可用作电容计算中的标准。在接地图案和三维布线路径之间测量电容。另一方面，基于在参考图案和接地图案之间测量的电容的基准值来计算理论电容。将接线路径的测量值与计算值进行比较，以确定三维布线路径是好还是坏。由于多层布线部分具有参考图案，所以通常在不准备正常的可接受产品的情况下通过计算获得正常布线路径的电容。

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