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    • 3. 发明授权
    • Protection circuit for power amplifier
    • 功率放大器保护电路
    • US09559639B2
    • 2017-01-31
    • US12715250
    • 2010-03-01
    • Wenjun SuAristotele HadjichristosGurkanwal S. SahotaMarco Cassia
    • Wenjun SuAristotele HadjichristosGurkanwal S. SahotaMarco Cassia
    • H04B1/04H03F1/52H03F3/24H03G3/30
    • H03F1/52H03F3/24H03F2200/435H03F2200/78H03G3/3042H04B2001/0408
    • Techniques for protecting a power amplifier (PA) are described. In an exemplary design, an apparatus includes (i) a PA module to amplify an input RF signal and provide an output RF signal and (ii) a protection circuit to control a transmitter gain to protect the PA module against high peak voltage. In an exemplary design, the protection circuit includes a set of comparators to quantize an analog input signal and provide digital comparator output signals used to adjust the transmitter gain. In another exemplary design, the protection circuit reduces and increases the transmitter gain with hysteresis. In yet another exemplary design, the protection circuit has faster response to rising amplitude than falling amplitude of the output RF signal. The hysteresis and/or the different rise and fall responses may allow the protection circuit to avoid toggling the transmitter gain under severe load mismatch and to handle time-varying envelope due to amplitude modulation.
    • 描述了用于保护功率放大器(PA)的技术。 在示例性设计中,装置包括(i)PA模块,用于放大输入RF信号并提供输出RF信号,以及(ii)保护电路以控制发射机增益以保护PA模块免受高峰值电压。 在示例性设计中,保护电路包括一组比较器,用于量化模拟输入信号并提供用于调整发射机增益的数字比较器输出信号。 在另一示例性设计中,保护电路通过滞后减小并增加发射机增益。 在又一示例性设计中,保护电路比对输出RF信号的下降幅度具有对振幅上升的响应更快。 迟滞和/或不同的上升和下降响应可以允许保护电路避免在严重负载不匹配的情况下切换发射机增益,并且由于幅度调制来处理时变包络。
    • 4. 发明授权
    • High linear fast peak detector
    • 高线性快速峰值检测器
    • US08310277B2
    • 2012-11-13
    • US12718806
    • 2010-03-05
    • Wenjun SuAristotele HadjichristosMarco CassiaChiewcharn Narathong
    • Wenjun SuAristotele HadjichristosMarco CassiaChiewcharn Narathong
    • H03K5/153
    • G01R19/04
    • A high linear fast peak detector having a variable bias current and/or a variable bias voltage is described. In an exemplary design, the peak detector includes a transistor, a variable current source, a capacitor, and a feedback circuit. The transistor receives the input signal and provides a source current. The variable current source receives the input signal, provides high bias current when the input signal is low, and provides low bias current when the input signal is high. The capacitor is charged by the source current when the input signal is high and is discharged by the high bias current when the input signal is low. The feedback circuit receives a detected signal from the capacitor and provides higher bias voltage for the transistor when the input signal is high, which results in higher source current from the transistor.
    • 描述具有可变偏置电流和/或可变偏置电压的高线性快速峰值检测器。 在示例性设计中,峰值检测器包括晶体管,可变电流源,电容器和反馈电路。 晶体管接收输入信号并提供源极电流。 可变电流源接收输入信号,当输入信号为低电平时提供高偏置电流,并且当输入信号为高电平时提供低偏置电流。 当输入信号为高电平时,电容器由电源电流充电,当输入信号为低电平时,电容器被高偏置电流放电。 当输入信号为高电平时,反馈电路接收来自电容器的检测信号,并为晶体管提供较高的偏置电压,这导致来自晶体管的较高的源极电流。
    • 6. 发明申请
    • HIGH LINEAR FAST PEAK DETECTOR
    • 高线性快速探测器
    • US20110050285A1
    • 2011-03-03
    • US12718806
    • 2010-03-05
    • Wenjun SuAristotele HadjichristosMarco CassiaChiewcham Narathong
    • Wenjun SuAristotele HadjichristosMarco CassiaChiewcham Narathong
    • G01R19/04
    • G01R19/04
    • A high linear fast peak detector having a variable bias current and/or a variable bias voltage is described. In an exemplary design, the peak detector includes a transistor, a variable current source, a capacitor, and a feedback circuit. The transistor receives the input signal and provides a source current. The variable current source receives the input signal, provides high bias current when the input signal is low, and provides low bias current when the input signal is high. The capacitor is charged by the source current when the input signal is high and is discharged by the high bias current when the input signal is low. The feedback circuit receives a detected signal from the capacitor and provides higher bias voltage for the transistor when the input signal is high, which results in higher source current from the transistor.
    • 描述具有可变偏置电流和/或可变偏置电压的高线性快速峰值检测器。 在示例性设计中,峰值检测器包括晶体管,可变电流源,电容器和反馈电路。 晶体管接收输入信号并提供源极电流。 可变电流源接收输入信号,当输入信号为低电平时提供高偏置电流,并且当输入信号为高电平时提供低偏置电流。 当输入信号为高电平时,电容器由电源电流充电,当输入信号为低电平时,电容器被高偏置电流放电。 当输入信号为高电平时,反馈电路接收来自电容器的检测信号,并为晶体管提供更高的偏置电压,这导致来自晶体管的较高的源极电流。
    • 7. 发明申请
    • PROTECTION CIRCUIT FOR POWER AMPLIFIER
    • 功率放大器保护电路
    • US20110043956A1
    • 2011-02-24
    • US12715250
    • 2010-03-01
    • Wenjun SuAristotele HadjichristosGurkanwal S. SahotaMarco Cassia
    • Wenjun SuAristotele HadjichristosGurkanwal S. SahotaMarco Cassia
    • H02H3/20
    • H03F1/52H03F3/24H03F2200/435H03F2200/78H03G3/3042H04B2001/0408
    • Techniques for protecting a power amplifier (PA) are described. In an exemplary design, an apparatus includes (i) a PA module to amplify an input RF signal and provide an output RF signal and (ii) a protection circuit to control a transmitter gain to protect the PA module against high peak voltage. In an exemplary design, the protection circuit includes a set of comparators to quantize an analog input signal and provide digital comparator output signals used to adjust the transmitter gain. In another exemplary design, the protection circuit reduces and increases the transmitter gain with hysteresis. In yet another exemplary design, the protection circuit has faster response to rising amplitude than falling amplitude of the output RF signal. The hysteresis and/or the different rise and fall responses may allow the protection circuit to avoid toggling the transmitter gain under severe load mismatch and to handle time-varying envelope due to amplitude modulation.
    • 描述了用于保护功率放大器(PA)的技术。 在示例性设计中,装置包括(i)PA模块,用于放大输入RF信号并提供输出RF信号,以及(ii)保护电路以控制发射机增益以保护PA模块免受高峰值电压。 在示例性设计中,保护电路包括一组比较器,用于量化模拟输入信号并提供用于调整发射机增益的数字比较器输出信号。 在另一示例性设计中,保护电路通过滞后减小并增加发射机增益。 在又一示例性设计中,保护电路比对输出RF信号的下降幅度具有对振幅上升的响应更快。 迟滞和/或不同的上升和下降响应可以允许保护电路避免在严重负载不匹配的情况下切换发射机增益,并且由于幅度调制来处理时变包络。
    • 8. 发明授权
    • Methods and apparatuses for selectable voltage supply
    • 用于可选电压供应的方法和装置
    • US07851947B2
    • 2010-12-14
    • US11935186
    • 2007-11-05
    • Marco CassiaAristotele HadjichristosConor DonovanSang-Oh Lee
    • Marco CassiaAristotele HadjichristosConor DonovanSang-Oh Lee
    • H02B1/24
    • H03K17/693Y10T307/696Y10T307/747
    • A circuit which selects a supply voltage from a plurality of voltage supplies is presented. The circuit includes a first transistor configured to select a first voltage supply, a second transistor configured to select a second voltage supply, a first parasitic current inhibitor coupled the first transistor, the first voltage supply, and the second voltage supply, where the first parasitic current inhibitor automatically utilizes the voltage supply providing the highest voltage for preventing a substrate current from flowing through a bulk node of the first transistor, and a second parasitic current inhibitor coupled the second transistor, the first voltage supply, and the second voltage supply, where the second parasitic current inhibitor automatically utilizes the voltage supply providing the highest voltage for preventing a substrate current from flowing through a bulk node of the second transistor.
    • 提出了从多个电压源中选择电源电压的电路。 该电路包括:第一晶体管,被配置为选择第一电压源;第二晶体管,被配置为选择第二电压源;耦合第一晶体管,第一电压源和第二电压源的第一寄生电流抑制器,其中第一寄生 电流抑制器自动地利用提供最高电压的电压源来防止衬底电流流过第一晶体管的体节点,以及耦合第二晶体管,第一电压源和第二电压源的第二寄生电流抑制器,其中 第二寄生电流抑制器自动利用提供最高电压的电压源来防止衬底电流流过第二晶体管的体节点。