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    • 4. 发明授权
    • Tunable matching circuits for power amplifiers
    • 功率放大器的可调匹配电路
    • US09143172B2
    • 2015-09-22
    • US12544177
    • 2009-08-19
    • Puay Hoe SeeAristotele HadjichristosGurkanwal Singh Sahota
    • Puay Hoe SeeAristotele HadjichristosGurkanwal Singh Sahota
    • H03F3/04H04B1/04H03F1/56H03F3/24H03F3/72
    • H04B1/0458H03F1/565H03F3/24H03F3/72H03F2200/111H03F2200/378H03F2200/387H03F2203/7209
    • Tunable matching circuits for power amplifiers are described. In an exemplary design, an apparatus may include a power amplifier and a tunable matching circuit. The power amplifier may amplify an input RF signal and provide an amplified RF signal. The tunable matching circuit may provide output impedance matching for the power amplifier, may receive the amplified RF signal and provide an output RF signal, and may be tunable based on at least one parameter effecting the operation of the power amplifier. The parameter(s) may include an envelope signal for the amplified RF signal, an average output power level of the output RF signal, a power supply voltage for the power amplifier, IC process variations, etc. The tunable matching circuit may include a series variable capacitor and/or a shunt variable capacitor. Each variable capacitor may be tunable based on a control generated based on the parameter(s).
    • 描述了用于功率放大器的可调谐匹配电路。 在示例性设计中,设备可以包括功率放大器和可调谐匹配电路。 功率放大器可以放大输入RF信号并提供放大的RF信号。 可调谐匹配电路可以为功率放大器提供输出阻抗匹配,可以接收放大的RF信号并提供输出RF信号,并且可以基于影响功率放大器的操作的至少一个参数来调节。 参数可以包括放大的RF信号的包络信号,输出RF信号的平均输出功率电平,功率放大器的电源电压,IC过程变化等。可调谐匹配电路可以包括一系列 可变电容器和/或分流可变电容器。 每个可变电容器可以基于基于参数产生的控制来调节。
    • 5. 发明申请
    • TUNABLE MATCHING CIRCUITS FOR POWER AMPLIFIERS
    • 功率放大器的可调匹配电路
    • US20100308933A1
    • 2010-12-09
    • US12544177
    • 2009-08-19
    • Puay Hoe SeeAristotele HadjichristosGurkanwal Singh Sahota
    • Puay Hoe SeeAristotele HadjichristosGurkanwal Singh Sahota
    • H03H7/38
    • H04B1/0458H03F1/565H03F3/24H03F3/72H03F2200/111H03F2200/378H03F2200/387H03F2203/7209
    • Tunable matching circuits for power amplifiers are described. In an exemplary design, an apparatus may include a power amplifier and a tunable matching circuit. The power amplifier may amplify an input RF signal and provide an amplified RF signal. The tunable matching circuit may provide output impedance matching for the power amplifier, may receive the amplified RF signal and provide an output RF signal, and may be tunable based on at least one parameter effecting the operation of the power amplifier. The parameter(s) may include an envelope signal for the amplified RF signal, an average output power level of the output RF signal, a power supply voltage for the power amplifier, IC process variations, etc. The tunable matching circuit may include a series variable capacitor and/or a shunt variable capacitor. Each variable capacitor may be tunable based on a control generated based on the parameter(s).
    • 描述了用于功率放大器的可调谐匹配电路。 在示例性设计中,设备可以包括功率放大器和可调谐匹配电路。 功率放大器可以放大输入RF信号并提供放大的RF信号。 可调谐匹配电路可以为功率放大器提供输出阻抗匹配,可以接收放大的RF信号并提供输出RF信号,并且可以基于影响功率放大器的操作的至少一个参数来调节。 参数可以包括放大的RF信号的包络信号,输出RF信号的平均输出功率电平,功率放大器的电源电压,IC过程变化等。可调谐匹配电路可以包括一系列 可变电容器和/或分流可变电容器。 每个可变电容器可以基于基于参数产生的控制来调节。
    • 8. 发明申请
    • LOW NOISE AMPLIFIERS WITH COMBINED OUTPUTS
    • 具有组合输出的低噪声放大器
    • US20130043946A1
    • 2013-02-21
    • US13366992
    • 2012-02-06
    • Aristotele HadjichristosGurkanwal Singh Sahota
    • Aristotele HadjichristosGurkanwal Singh Sahota
    • H03F3/68H03F3/45
    • Multiple low noise amplifiers (LNAs) with combined outputs are disclosed. In an exemplary design, an apparatus includes a front-end module and an integrated circuit (IC). The front-end module includes a plurality of LNAs having outputs that are combined. The IC includes receive circuits coupled to the plurality of LNAs via a single interconnection. In an exemplary design, each of the plurality of LNAs may be enabled or disabled via a respective control signal for that LNA. The front-end module may also include receive filters coupled to the plurality of LNAs and a switchplexer coupled to the receive filters. The front-end module may further include at least one power amplifier, and the IC may further include transmit circuits coupled to the at least one power amplifier.
    • 公开了具有组合输出的多个低噪声放大器(LNA)。 在示例性设计中,装置包括前端模块和集成电路(IC)。 前端模块包括具有组合的输出的多个LNA。 IC包括经由单个互连耦合到多个LNA的接收电路。 在示例性设计中,可以通过用于该LNA的相应控制信号来使能或禁用多个LNA中的每一个。 前端模块还可以包括耦合到多个LNA的接收滤波器和耦合到接收滤波器的交换器。 前端模块还可以包括至少一个功率放大器,并且IC还可以包括耦合到至少一个功率放大器的发射电路。
    • 9. 发明授权
    • Cascode amplifier with protection circuitry
    • 带保护电路的串联放大器
    • US08022772B2
    • 2011-09-20
    • US12407729
    • 2009-03-19
    • Marco CassiaGurkanwal Singh Sahota
    • Marco CassiaGurkanwal Singh Sahota
    • H03F1/22
    • H03F1/223H03F1/523H03F3/211H03F3/72H03F2200/27H03F2200/294H03F2203/7206H03F2203/7215H03F2203/7236H03G1/0088
    • A cascode amplifier with protection circuitry is described. In one exemplary design, the amplifier includes multiple branches coupled in parallel, with at least one branch being switchable between “on” and “off” states. Each switchable branch includes a gain transistor coupled to a cascode transistor. The gain transistor amplifies an input signal and provides an amplified signal in the on state and does not amplify the input signal in the off state. The cascode transistor buffers the amplified signal and provides an output signal in the on state. The output signal swing may be split between the gain transistor and the cascode transistor in both the on and off states with the protection circuitry. Each transistor may then observe a fraction of the voltage swing. The voltage splitting in the off state may be achieved by floating the gain transistor and shorting the gate and source of the cascode transistor.
    • 描述了具有保护电路的共源共栅放大器。 在一个示例性设计中,放大器包括并联耦合的多个分支,至少一个分支可在“开”和“关”状态之间切换。 每个可切换分支包括耦合到共源共栅晶体管的增益晶体管。 增益晶体管放大输入信号,并将放大的信号提供为导通状态,并且不将输入信号放大在关闭状态。 共源共栅晶体管缓冲放大的信号,并提供处于导通状态的输出信号。 在保护电路中,输出信号摆幅可以在开关状态和断开状态之间在增益晶体管和共源共栅晶体管之间分开。 然后,每个晶体管可以观察电压摆幅的一小部分。 断开状态下的分压可以通过使增益晶体管浮置并使共源共栅晶体管的栅极和源极短路来实现。
    • 10. 发明申请
    • CASCODE AMPLIFIER WITH PROTECTION CIRCUITRY
    • 带保护电路的CASCODE放大器
    • US20100237945A1
    • 2010-09-23
    • US12407729
    • 2009-03-19
    • Marco CassiaGurkanwal Singh Sahota
    • Marco CassiaGurkanwal Singh Sahota
    • H03F3/16
    • H03F1/223H03F1/523H03F3/211H03F3/72H03F2200/27H03F2200/294H03F2203/7206H03F2203/7215H03F2203/7236H03G1/0088
    • A cascode amplifier with protection circuitry is described. In one exemplary design, the amplifier includes multiple branches coupled in parallel, with at least one branch being switchable between “on” and “off” states. Each switchable branch includes a gain transistor coupled to a cascode transistor. The gain transistor amplifies an input signal and provides an amplified signal in the on state and does not amplify the input signal in the off state. The cascode transistor buffers the amplified signal and provides an output signal in the on state. The output signal swing may be split between the gain transistor and the cascode transistor in both the on and off states with the protection circuitry. Each transistor may then observe a fraction of the voltage swing. The voltage splitting in the off state may be achieved by floating the gain transistor and shorting the gate and source of the cascode transistor.
    • 描述了具有保护电路的共源共栅放大器。 在一个示例性设计中,放大器包括并联耦合的多个分支,至少一个分支可在“开”和“关”状态之间切换。 每个可切换分支包括耦合到共源共栅晶体管的增益晶体管。 增益晶体管放大输入信号,并将放大的信号提供为导通状态,并且不将输入信号放大在关闭状态。 共源共栅晶体管缓冲放大的信号,并提供处于导通状态的输出信号。 在保护电路中,输出信号摆幅可以在开关状态和断开状态之间在增益晶体管和共源共栅晶体管之间分开。 然后,每个晶体管可以观察电压摆幅的一小部分。 断开状态下的分压可以通过使增益晶体管浮置并使共源共栅晶体管的栅极和源极短路来实现。