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    • 6. 发明申请
    • Packet storage system for traffic handling
    • 用于流量处理的分组存储系统
    • US20050265368A1
    • 2005-12-01
    • US10534343
    • 2003-11-11
    • Anthony Spencer
    • Anthony Spencer
    • H04L12/54H04L12/823H04L12/851H04L12/861H04L12/863H04L12/869H04L12/875H04L12/56
    • H04L47/32H04L47/2441H04L47/50H04L47/562H04L47/60H04L47/6215H04L47/624H04L49/90H04L49/9042
    • A method of queuing variable size data packets in a communication system comprises generating from an incoming data packet a record portion of predetermined fixed size and containing information about the packet, the data in the packet being in a data portion; storing data portions in independent memory locations in a first memory with each data portion having no connection with any other; storing record portions in one or more managed queues in a second memory having fixed size memory locations equal in size to the size of the record portions; wherein: the first memory is larger and has a lower address bandwidth than the second memory; and the memory locations in the first memory are arranged in blocks having a plurality of different sizes and the memory locations are allocated to the data portions according to the size of the data portions. Conveniently, there may be two sizes of memory location in the first memory arranged in two blocks, one of a size to receive relatively small data portions and the other of a size to receive relatively large data portions. Data portions that are too large to be stored in a single memory block are stored as linked lists in a plurality of blocks with pointers pointing to the next block but without any pointers pointing from one data portion to the next data portion of the packet. The memory locations in the blocks are preferably matched to the most commonly occurring sizes of data packets in the communication system. The memory locations in the first memory are preferably allocated from a pool of available addresses provided to it in batches from a central pool of available addresses.
    • 在通信系统中排队可变大小数据分组的方法包括从输入数据分组生成预定固定大小的记录部分并且包含关于分组的信息,分组中的数据在数据部分中; 将数据部分存储在第一存储器中的独立存储器位置,其中每个数据部分与任何其他数据部分没有连接; 将记录部分存储在具有与记录部分的大小相等的固定大小的存储单元的第二存储器中的一个或多个托管队列中; 其中:所述第一存储器较大并且具有比所述第二存储器低的地址带宽; 并且第一存储器中的存储器位置被布置成具有多个不同大小的块,并且根据数据部分的大小将存储器位置分配给数据部分。 方便地,在第一存储器中可以存在两个尺寸的存储器位置,其布置在两个块中,其中一个尺寸用于接收相对较小的数据部分,另一个尺寸用于接收相对大的数据部分的大小。 太大而不能存储在单个存储器块中的数据部分作为链表存储在具有指向下一个块的指针的多个块中,但是没有从一个数据部分指向分组的下一个数据部分的任何指针。 块中的存储器位置优选地与通信系统中最常发生的数据分组大小匹配。 优选地,从可用地址的中央池批量地从提供给它的可用地址池分配第一存储器中的存储器位置。
    • 8. 发明授权
    • Data packet handling in computer or communication systems
    • 计算机或通信系统中的数据包处理
    • US07522605B2
    • 2009-04-21
    • US10534308
    • 2003-11-11
    • Anthony SpencerKen Cameron
    • Anthony SpencerKen Cameron
    • H04L12/28
    • H04L47/32H04L47/2441H04L47/50H04L47/562H04L47/60H04L47/6215H04L47/624H04L49/90H04L49/9042
    • The ordering of packet flows, comprising sequences of data packets, in a communication or computer system, is performed by assigning an exit number to each packet; queuing the packets in a buffer; and outputting the queued packets in a predetermined order according to an order list determined by the exit numbers assigned to each packet before it was queued. The exit number information is preferably assigned to packet records, which are queued in a separate buffer to the packets, the records being of fixed length and shorter than the data portions. The packet record buffer comprises groups of bins, each bin containing a range of exit numbers, the bins for higher exit number packet records having a larger range than bins for lower exit number packet records. Lower exit number packet records in a bin are subdivided into a plurality of bins, each containing packet records corresponding to a smaller range of exit numbers. Secondary bins may be created to temporarily store records assigned to a bin that is currently being emptied. The bins may be filled by a parallel processor, preferably a SIMD array processor.
    • 在通信或计算机系统中包括数据分组序列的分组流的排序通过向每个分组分配出口号码来执行; 在缓冲区中排队数据包; 并且根据由分配给每个分组排队之前的出口号确定的顺序列表,以预定顺序输出排队的分组。 出口号信息优选地被分配给分组记录,分组记录在分组的单独缓冲器中排队,记录具有固定长度并且短于数据部分。 分组记录缓冲器包括一组分组,每个分组包含一个出口编号的范围,用于较高出口编号分组记录的分段具有比用于较低出口编号分组记录的分段大的范围。 一个存储区中的较低出口数量的数据包记录被细分为多个存储区,每个存储区包含对应于较小范围的退出编号的数据包记录。 可以创建辅助箱以临时存储分配给当前正在清空的仓的记录。 盒可以由并行处理器,优选地是SIMD阵列处理器来填充。
    • 10. 发明申请
    • State engine for data processor
    • 数据处理器的状态引擎
    • US20050257025A1
    • 2005-11-17
    • US10534430
    • 2003-11-11
    • Anthony Spencer
    • Anthony Spencer
    • H04L12/54H04L12/823H04L12/851H04L12/861H04L12/863H04L12/869H04L12/875G06F15/00
    • H04L47/32H04L47/2441H04L47/50H04L47/562H04L47/60H04L47/6215H04L47/624H04L49/90H04L49/9042
    • Coherent accesses and updates to state shared by parallel processors, such as SIMD array processors, is made possible by the use of state elements having local memory storing the state and permitting serialisation of accesses. Operations on single or multiple items of state are perfumed by a fixed/hardwired set of operations but they can be programmable by sending command and data to control operations. Individual state elements comprise the local memory, an arithmetic unit, and command and control logic. Multiple state elements are pipelined in state cells which can, in turn, be organised into state arrays and state engines effecting complete control over shared state access. A read/modify/write operation can be performed in only two cycles and a complete command in only three to five cycles.
    • 通过使用具有存储状态的本地存储器并允许访问序列化的状态元素,可以实现对诸如SIMD阵列处理器之类的并行处理器共享的状态的相干访问和更新。 单个或多个状态的操作通过固定/硬连线的操作进行加密,但是可以通过发送命令和数据来编程控制操作。 各个状态元素包括本地存储器,算术单元以及命令和控制逻辑。 多个状态元素在状态单元中被流水线化,状态单元又可以被组织成状态数组,并且状态引擎完全控制共享状态访问。 读/修改/写操作只能在两个周期内完成,只需三到五个周期即可完成命令。