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1. 发明申请

WO2005104175A1 FARADAY DOSE AND UNIFORMITY MONITOR FOR PLASMA BASED ION IMPLANTATION 审中-公开
标题翻译：用于基于等离子体离子植入的非离子剂量和均匀性监测器
公开(公告)号：WO2005104175A1
公开(公告)日：2005-11-03
申请号：PCT/US2005/006973
申请日：2005-03-04
申请人： VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. , WALTHER, Steven, R. , DORAI, Rajesh , PERSING, Harold , SCHEUER, Jay , KOO, Bon-Woong , PEDERSEN, Bjorn, O. , LEAVITT, Chris , MILLER, Timothy
发明人： WALTHER, Steven, R. , DORAI, Rajesh , PERSING, Harold , SCHEUER, Jay , KOO, Bon-Woong , PEDERSEN, Bjorn, O. , LEAVITT, Chris , MILLER, Timothy
IPC分类号： H01J37/32
CPC分类号： H01J37/32963 , H01J37/32935 , H01J37/3299 , H01J2237/24405
摘要： A Faraday dose and uniformity monitor can include a magnetically suppressed annular Faraday cup (80) surrounding a target wafer (20). A narrow aperture can reduce discharges within Faraday cup opening (60). The annular Faraday cup can have a continuous cross section to eliminate discharges due to breaks. A plurality of annular Faraday cups at different radii can independently measure current density to monitor changes in plasma uniformity. The magnetic suppression field can be configured to have a very rapid decrease in field strength with distance to minimize plasma and implant perturbations and can include both radial and azimuthal components, or primarily azimuthal components. The azimuthal field component can be generated by multiple vertically oriented magnets of alternating polarity, or by the use of a magnetic field coil. In addition, dose electronics can provide integration of pulsed current at high voltage, and can convert the integrated charge to a series of light pulses coupled optically to a dose controller.
摘要翻译：法拉第剂量和均匀性监测器可以包括围绕目标晶片（20）的磁抑制环形法拉第杯（80）。狭窄的孔径可以减少法拉第杯开口（60）内的排放。环形法拉第杯可以具有连续的横截面，以消除由于断裂引起的排放。多个不同半径的环形法拉第杯可以独立地测量电流密度以监测等离子体均匀性的变化。磁场抑制场可以被配置为具有随着距离的场强非常快速的降低，以使等离子体和植入物扰动最小化，并且可以包括径向和方位角分量，或者主要包括方位角分量。方位角分量可以由交替极性的多个垂直取向的磁体或通过使用磁场线圈来产生。此外，剂量电子学可以提供高电压脉冲电流的集成，并且可以将积分电荷转换成光耦合到剂量控制器的一系列光脉冲。

2. 发明申请

WO2009002737A1 TECHNIQUES FOR DETECTING WAFER CHARGING IN A PLASMA PROCESSING SYSTEM 审中-公开
标题翻译：用于检测等离子体处理系统中的波形充电的技术
公开(公告)号：WO2009002737A1
公开(公告)日：2008-12-31
申请号：PCT/US2008/066938
申请日：2008-06-13
申请人： VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. , WALTHER, Steven, R. , KOO, Bon-Woong , LINDSAY, Bernard, G.
发明人： WALTHER, Steven, R. , KOO, Bon-Woong , LINDSAY, Bernard, G.
IPC分类号： H01L21/66 , H01L21/3065 , G01R31/26
CPC分类号： H01J37/3299 , H01J37/32935
摘要： Techniques for detecting wafer charging in a plasma processing system are disclosed. In one particular exemplary embodiment, the techniques may be realized as an apparatus for detecting wafer charging in a plasma processing system. The apparatus may comprise a plasma chamber to produce a plasma discharge above a wafer in the plasma chamber. The apparatus may also comprise a biasing circuit to bias the wafer to draw ions from the plasma discharge towards the wafer. The apparatus may further comprise a detection mechanism to detect charge buildup on the wafer by measuring an electric field in one or more designated locations near a top surface of the wafer.
摘要翻译：公开了一种在等离子体处理系统中检测晶片充电的技术。在一个特定的示例性实施例中，这些技术可以被实现为用于在等离子体处理系统中检测晶片充电的装置。该装置可以包括等离子体室，以在等离子体室中的晶片之上产生等离子体放电。该装置还可以包括偏置电路，用于偏置晶片以从离子放电中向离子晶片吸取离子。该装置还可以包括检测机构，以通过测量在晶片顶表面附近的一个或多个指定位置的电场来检测晶片上的电荷积累。

3. 发明申请

WO2005114692A2 IN-SITU PROCESS CHAMBER PREPARATION METHODS FOR PLASMA ION IMPLANTATION SYSTEMS 审中-公开
标题翻译：等离子体植入系统的现场过程室制备方法
公开(公告)号：WO2005114692A2
公开(公告)日：2005-12-01
申请号：PCT/US2005/017699
申请日：2005-05-19
申请人： VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. , SINGH, Vikram , GUPTA, Atul , PERSING, Harold, M. , WALTHER, Steven, R. , TESTONI, Anne, L.
发明人： SINGH, Vikram , GUPTA, Atul , PERSING, Harold, M. , WALTHER, Steven, R. , TESTONI, Anne, L.
IPC分类号： H01J37/00
CPC分类号： H01J37/32495 , H01J37/32412
摘要： A method for plasma ion implantation of a substrate includes providing a plasma ion implantation system including a process chamber, a source for producing a plasma in the process chamber, a platen for holding the substrate in the process chamber, and a voltage source for accelerating ions from the plasma into the substrate, depositing on interior surfaces of the process chamber a fresh coating that is similar in composition to a deposited film that results from plasma ion implantation of the substrate, before depositing the fresh coating, cleaning interior surfaces of the process chamber by removing an old film using one or more activated cleaning precursors, plasma ion implantation of the substrate according to a plasma ion implantation process, and repeating the steps of cleaning interior surfaces of the process chamber and depositing a fresh coating following plasma ion implantation of one or more substrates.
摘要翻译：用于等离子体离子注入衬底的方法包括提供等离子体离子注入系统，其包括处理室，用于在处理室中产生等离子体的源，用于将衬底保持在处理室中的压板和用于加速离子的电压源从等离子体进入衬底，在沉积新鲜涂层之前，在沉积新鲜涂层之前，在处理室的内表面上沉积与组合物中与等离子体离子注入导致的沉积膜相似的新涂层，清洁处理室的内表面通过使用一种或多种激活的清洁前体去除旧膜，根据等离子体离子注入工艺等离子体离子注入基板，并重复清洁处理室的内表面并在等离子体离子注入之后沉积新涂层的步骤或更多的基材。

4. 发明申请

WO2010080390A2 CONDENSIBLE GAS COOLING SYSTEM 审中-公开
标题翻译：可燃气体冷却系统
公开(公告)号：WO2010080390A2
公开(公告)日：2010-07-15
申请号：PCT/US2009/068002
申请日：2009-12-15
申请人： VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES , WALTHER, Steven, R.
发明人： WALTHER, Steven, R.
IPC分类号： H01L21/265 , H01L21/683 , H01L21/687
CPC分类号： H01J37/3171 , H01J37/20 , H01J2237/002 , H01J2237/2001
摘要： A workpiece cooling system and method are disclosed. Transferring heat away from a workpiece, such as a semiconductor wafer during ion implantation, is essential. Typically this heat is transferred to the workpiece support, or platen. In one embodiment, the desired operating temperature is determined. Based on this, a gas having a vapor pressure within a desired range, such as 10-50 torr, is selected. This range is required to be sufficiently low so as to be less than the clamping force. This condensible gas is used to fill the volume between the workpiece and the workpiece support. Heat transfer occurs based on adsorption and desorption, thereby offering improved transfer properties than traditionally employed gases, such as helium, hydrogen, nitrogen, argon and air.
摘要翻译：公开了一种工件冷却系统和方法。在离子注入期间将热量从工件（例如半导体晶片）传出是至关重要的。通常，这种热量传递到工件支撑件或压板。在一个实施例中，确定期望的操作温度。基于此，选择蒸气压在所需范围内的气体，例如10-50乇。该范围要求足够低以便小于夹紧力。该可冷凝气体用于填充工件和工件支架之间的体积。基于吸附和解吸发生热传递，从而提供比传统使用的气体（例如氦气，氢气，氮气，氩气和空气）更好的转移性能。

5. 发明申请

WO2009009272A2 CONFORMAL DOPING USING HIGH NEUTRAL PLASMA IMPLANT 审中-公开
标题翻译：使用高中等离子体植入物进行均匀切割
公开(公告)号：WO2009009272A2
公开(公告)日：2009-01-15
申请号：PCT/US2008/067587
申请日：2008-06-20
申请人： VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. , WALTHER, Steven, R.
发明人： WALTHER, Steven, R.
IPC分类号： C23C16/00 , H01L21/26
CPC分类号： H01J37/32339 , H01J37/32412
摘要： A plasma doping apparatus includes a plasma source that generates a pulsed plasma. A platen supports a substrate proximate to the plasma source for plasma doping. A structure absorbs a film which provides a plurality of neutrals when desorbed. A bias voltage power supply generates a bias voltage waveform having a negative potential that attracts ions in the plasma to the substrate for plasma doping. A radiation source irradiates the film absorbed on the structure, thereby desorbing the film and generating a plurality of neutrals that scatter ions from the plasma while the ions are being attracted to the substrate, thereby performing conformal plasma doping.
摘要翻译：等离子体掺杂装置包括产生脉冲等离子体的等离子体源。压板支撑靠近等离子体源的基板用于等离子体掺杂。结构吸收当解吸时提供多个中性粒子的膜。偏置电压电源产生具有负电位的偏压电压波形，其将等离子体中的离子吸引到用于等离子体掺杂的衬底。辐射源照射吸收在结构上的膜，从而解离该膜并产生多个中和体，其中离子从等离子体中散射，同时离子被吸引到衬底上，由此进行保形等离子体掺杂。

6. 发明申请

WO2006026180A2 REDUCTION OF SOURCE AND DRAIN PARASITIC CAPACITANCE IN CMOS DEVICES 审中-公开
标题翻译： CMOS器件中源极和漏极寄生电容的降低
公开(公告)号：WO2006026180A2
公开(公告)日：2006-03-09
申请号：PCT/US2005/029454
申请日：2005-08-18
申请人： VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. , EROKHIN, Yuri , JEONG, Ukyo , SCHEUER, Jay, T. , WALTHER, Steven, R.
发明人： EROKHIN, Yuri , JEONG, Ukyo , SCHEUER, Jay, T. , WALTHER, Steven, R.
IPC分类号： H01L21/225 , H01L21/265 , H01L21/336 , H01L29/78
CPC分类号： H01L21/2236 , H01L29/66575
摘要： A method for fabricating a semiconductor-based device includes providing a doped semiconductor substrate, introducing a second dopant into the substrate to define a pn junction, and introducing a neutralizing species into the substrate in the neighborhood of the pn junction to reduce a capacitance associated with the pn junction. A semiconductor-based device includes a semiconductor substrate having first and second dopants, and a neutralizing species. The first and second dopants define a pn junction, and the neutralizing species neutralizes a portion of the first dopant in the neighborhood of the pn junction to decrease a capacitance associated with the pn junction.
摘要翻译：用于制造基于半导体的器件的方法包括提供掺杂的半导体衬底，将第二掺杂剂引入到衬底中以限定pn结，并且将中和物质引入衬底中的邻近衬底 pn结以减小与pn结相关联的电容。基于半导体的器件包括具有第一和第二掺杂剂以及中和物质的半导体衬底。第一和第二掺杂剂限定pn结，并且中和物质中和pn结附近的第一掺杂剂的一部分，以减小与pn结相关的电容。

7. 发明申请

WO2009052453A3 PLASMA DOPING SYSTEM WITH CHARGE CONTROL 审中-公开
公开(公告)号：WO2009052453A3
公开(公告)日：2009-04-23
申请号：PCT/US2008/080400
申请日：2008-10-18
申请人： VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. , JEON, Yongbae , SINGH, Vikram , MILLER, Timothy, J. , FANG, Ziwei , WALTHER, Steven, R. , GUPTA, Atul
发明人： JEON, Yongbae , SINGH, Vikram , MILLER, Timothy, J. , FANG, Ziwei , WALTHER, Steven, R. , GUPTA, Atul
IPC分类号： H01L21/22 , H01L21/265 , C23C16/00 , C23C14/00 , H01J37/32
摘要： A method of plasma doping includes generating a plasma comprising dopant ions proximate to a platen supporting a substrate in a plasma chamber. The platen is biased with a bias voltage waveform having a negative potential that attracts ions in the plasma to the substrate for plasma doping. At least one sensor measuring data related to charging conditions favorable for forming an electrical discharge is monitored. At least one plasma process parameter is modified in response to the measured data, thereby reducing a probability of forming an electrical discharge.

8. 发明申请

WO2009045722A1 TWO-DIEMENSIONAL UNIFORMITY CORRECTION FOR ION BEAM ASSISTED ETCHING 审中-公开
标题翻译：用于离子束辅助蚀刻的双重均匀校正
公开(公告)号：WO2009045722A1
公开(公告)日：2009-04-09
申请号：PCT/US2008/076644
申请日：2008-09-17
申请人： VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. , WALTHER, Steven, R. , NUNAN, Peter, D. , EROKHIN, Yuri
发明人： WALTHER, Steven, R. , NUNAN, Peter, D. , EROKHIN, Yuri
IPC分类号： H01L21/265
CPC分类号： H01J37/3171 , H01J37/244 , H01J37/3045 , H01J37/3053 , H01J2237/24507 , H01J2237/24542 , H01J2237/30477 , H01L21/3065 , H01L22/12
摘要： An approach for providing two-dimensional uniformity correction for ion beam assisted etching is described. In one embodiment, there is a method for ion beam etching a substrate. In this embodiment, an ion implant dose map containing a correlation between implant dose rate and etch rate is retrieved. In addition, a recipe that contains values for ion beam parameters used in the ion beam etching of the substrate is obtained. An ion beam is directed at the surface of the substrate and the surface is etched with the ion beam according to the ion implant dose map and the values of the ion beam parameters in the recipe. The etching of the surface is controlled in accordance with the ion implant dose map and the ion beam parameter values.
摘要翻译：描述了一种用于离子束辅助蚀刻提供二维均匀性校正的方法。在一个实施例中，存在用于离子束蚀刻衬底的方法。在该实施例中，检索包含植入物剂量率和蚀刻速率之间的相关性的离子注入剂量图。此外，获得了包含用于衬底的离子束蚀刻中的离子束参数的值的配方。离子束被引导到衬底的表面，并且根据离子注入剂量图和配方中离子束参数的值，用离子束蚀刻表面。根据离子注入剂量图和离子束参数值来控制表面的蚀刻。

9. 发明申请

WO2008083023A1 METHOD AND APPARATUSES FOR PROVIDING ELECTRICAL CONTACT FOR PLASMA PROCESSING APPLICATIONS 审中-公开
标题翻译：用于提供等离子体处理应用的电气接触的方法和装置
公开(公告)号：WO2008083023A1
公开(公告)日：2008-07-10
申请号：PCT/US2007/088291
申请日：2007-12-20
申请人： VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. , KOO, Bon-woong , WALTHER, Steven, R. , LEAVITT, Christopher, J. , TOCCO, Justin , HYUN, Sung-Hwan , MILLER, Timothy, J. , SCHEUER, Jay, T. , GUPTA, Atul , SINGH, Vikram , RAJ, Deven
发明人： KOO, Bon-woong , WALTHER, Steven, R. , LEAVITT, Christopher, J. , TOCCO, Justin , HYUN, Sung-Hwan , MILLER, Timothy, J. , SCHEUER, Jay, T. , GUPTA, Atul , SINGH, Vikram , RAJ, Deven
IPC分类号： H01J37/32 , H01L21/00
CPC分类号： H01J37/32706 , H01J37/32623 , H01L21/67011 , H01L21/67069 , H01L21/68714 , H01L21/68735
摘要： A method and apparatuses for providing improved electrical contact to a semiconductor wafer during plasma processing applications are disclosed. In one embodiment, an apparatus (100) includes a wafer platen (106) for supporting the wafer; and a plurality of electrical contact elements (120), each of the plurality of electrical contact elements (1'2O) are configured to provide a path for supplying a bias voltage from a bias power supply to the wafer (102) on the wafer platen (106). The plurality of electrical contact elements (120) are also geometrically arranged such that at least one electrical contact element contacts an inner surface region (114) (e.g., region between a center of wafer and a distance approximately half of the radius of the wafer) and at least one electrical contact element contacts an outer annular surface region (116) (e.g., region between an outer edge of wafer and a distance approximately half of the radius of the wafer).
摘要翻译：公开了一种用于在等离子体处理应用期间提供与半导体晶片的改进的电接触的方法和装置。在一个实施例中，装置（100）包括用于支撑晶片的晶圆台（106）和多个电接触元件（120），所述多个电接触元件（1'20）中的每一个被配置为提供用于将来自偏置电源的偏置电压提供给晶片台板上的晶片（102）的路径（106）。多个电接触元件（120）也几何地布置成使得至少一个电接触元件接触内表面区域（114）（例如，晶片中心与晶片半径的一半的距离）并且至少一个电接触元件接触外部环形表面区域（116）（例如，晶片的外边缘与晶片的半径的一半的距离之间的区域）。

10. 发明申请

WO2007142912A3 NON-UNIFORM ION IMPLANTATION 审中-公开
公开(公告)号：WO2007142912A3
公开(公告)日：2007-12-13
申请号：PCT/US2007/012604
申请日：2007-05-24
申请人： VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. , WALTHER, Steven, R. , MEHTA, Sandeep
发明人： WALTHER, Steven, R. , MEHTA, Sandeep
IPC分类号： H01J37/317 , H01J37/302
摘要： A method includes receiving an input signal representative of a desired two-dimensional non-uniform dose pattern for a front surface of a workpiece, driving the workpiece relative to an ion beam to distribute the ion beam across the front surface of the workpiece, and controlling at least one parameter of an ion impianter when the ion beam is incident on the front surface of the workpiece to directly create the desired two-dimensional non-uniform dose pattern in one pass of the front surface of workpiece relative to the ion beam. The beam may be a scanned beam or a ribbon beam. An ion impianter is also provided.

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