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91. 发明申请

US20090231348A1 Image Processing with Highly Threaded Texture Fragment Generation 有权
标题翻译：具有高线程纹理片段生成的图像处理
公开(公告)号：US20090231348A1
公开(公告)日：2009-09-17
申请号：US12045737
申请日：2008-03-11
申请人： Eric Oliver Mejdrich , Paul Emery Schardt , Robert Allen Shearer
发明人： Eric Oliver Mejdrich , Paul Emery Schardt , Robert Allen Shearer
IPC分类号： G06T1/20 , G06T1/00
CPC分类号： G06T15/005
摘要： A circuit arrangement and method support a multithreaded rendering architecture capable of dynamically routing pixel fragments from a pixel fragment generator to any pixel shader from among a pool of pixel shaders. The pixel fragment generator is therefore not tied to a specific pixel shader, but is instead able to utilize multiple pixel shaders in a pool of pixel shaders to minimize bottlenecks and improve overall hardware utilization and performance during image processing.
摘要翻译：电路布置和方法支持能够将像素片段生成器中的像素片段从像素着色器池中的任何像素着色器动态路由的多线程渲染架构。因此，像素片段生成器不与特定的像素着色器相关联，而是能够在像素着色器池中使用多个像素着色器来最小化瓶颈并提高图像处理期间的整体硬件利用率和性能。

92. 发明申请

US20090187734A1 Efficient Texture Processing of Pixel Groups with SIMD Execution Unit 有权
标题翻译：使用SIMD执行单元的像素组的高效纹理处理
公开(公告)号：US20090187734A1
公开(公告)日：2009-07-23
申请号：US12016306
申请日：2008-01-18
申请人： Eric Oliver Mejdrich , Paul Emery Schardt , Robert Allen Shearer
发明人： Eric Oliver Mejdrich , Paul Emery Schardt , Robert Allen Shearer
IPC分类号： G06F15/80 , G06F9/30
CPC分类号： G06F9/30036 , G06F9/3851 , G06F9/3887 , G06T1/20 , G06T15/04
摘要： A circuit arrangement and method perform concurrent texture processing of groups of pixels with a single instruction multiple data (SIMD) execution unit to improve the utilization of the SIMD execution unit when performing scalar operations associated with a texture processing algorithm. In addition, when utilized in connection with a multi-threaded SIMD execution unit, groups of pixels may be concurrently processed in different threads executed by the SIMD execution unit to further maximize the utilization of the SIMD execution unit by reducing the adverse effects of dependencies in scalar and/or vector operations incorporated into a texture processing algorithm.
摘要翻译：电路布置和方法利用单指令多数据（SIMD）执行单元执行像素组的并行纹理处理，以在执行与纹理处理算法相关联的标量运算时提高SIMD执行单元的利用率。此外，当与多线程SIMD执行单元结合使用时，可以在由SIMD执行单元执行的不同线程中同时处理像素组，以通过减少SIMD执行单元的依赖性的不利影响来进一步最大化利用SIMD执行单元结合到纹理处理算法中的标量和/或矢量操作。

93. 发明申请

US20090182987A1 Processing Unit Incorporating Multirate Execution Unit 失效
标题翻译：加工单元并入多速率执行单元
公开(公告)号：US20090182987A1
公开(公告)日：2009-07-16
申请号：US11972746
申请日：2008-01-11
申请人： Eric Oliver Mejdrich , Adam James Muff , Matthew Ray Tubbs
发明人： Eric Oliver Mejdrich , Adam James Muff , Matthew Ray Tubbs
IPC分类号： G06F9/30
CPC分类号： G06F9/3869 , G06F1/3203 , G06F1/324 , G06F9/3836 , G06F9/3838 , G06F9/3851 , G06F9/3885 , Y02D10/126
摘要： A multirate execution unit is capable of being operated in a plurality of modes, with the execution unit being capable of clocked at multiple different rates relative to a multithreaded issue unit such that, in applications where maximum performance is desired, the execution unit can be clocked at a rate that is faster than the clock rate for the multithreaded issue unit, and in applications where a lower power profile is desired, the execution unit can be throttled back to a slower rate to reduce the power consumption of the execution unit. When the execution unit is clocked at a faster rate than the multithreaded issue unit, the issue unit is permitted to issue more instructions per cycle than when the execution unit is throttled to the slower rate to increase overall instruction throughput.
摘要翻译：多速率执行单元能够以多种模式操作，其中执行单元能够以相对于多线程发布单元的多个不同速率进行计时，使得在需要最大性能的应用中，执行单元可被计时以比多线程发布单元的时钟速率快的速率，以及在需要较低功率配置的应用中，执行单元可以被限制回到较慢的速率以降低执行单元的功耗。当执行单元以比多线程发布单元更快的速度进行计时时，允许发布单元每循环发出更多指令，而不是执行单元被限制到较慢的速率以增加总体指令吞吐量。

94. 发明申请

US20090182944A1 Processing Unit Incorporating L1 Cache Bypass 失效
标题翻译：结合L1缓存旁路的处理单元
公开(公告)号：US20090182944A1
公开(公告)日：2009-07-16
申请号：US11972221
申请日：2008-01-10
申请人： Miguel Comparan , Eric Oliver Mejdrich , Adam James Muff
发明人： Miguel Comparan , Eric Oliver Mejdrich , Adam James Muff
IPC分类号： G06F12/08
CPC分类号： G06F12/0888 , G06F12/0811
摘要： A circuit arrangement and method bypass the storage of requested data in a higher level cache of a multi-level memory architecture during the return of the requested data to a requester, while caching the requested data in a lower level cache. For certain types of data, e.g., data that is only used once and/or that is rarely modified or written back to memory, bypassing storage in a higher level cache reduces the likelihood of the requested data casting out frequently used data from the higher level cache. By caching the data in a lower level cache, however, the lower level cache can still snoop data requests and return requested data in the event the data is already cached in the lower level cache.
摘要翻译：在将所请求的数据返回到请求者的同时，在将所请求的数据缓存在较低级别的高速缓存中的同时，电路装置和方法将所请求的数据的存储绕过多层存储器体系结构的更高级缓存。对于某些类型的数据，例如仅使用一次和/或很少被修改或写回存储器的数据，绕过较高级别高速缓存中的存储降低了请求的数据从较高级别投出常用数据的可能性缓存。然而，通过将数据缓存在较低级别的缓存中，低级缓存仍然可以窥探数据请求，并在数据已经缓存在较低级别缓存中的情况下返回请求的数据。

95. 发明申请

US20090063608A1 Full Vector Width Cross Product Using Recirculation for Area Optimization 审中-公开
标题翻译：全矢量宽度交叉产品使用再循环进行区域优化
公开(公告)号：US20090063608A1
公开(公告)日：2009-03-05
申请号：US11849495
申请日：2007-09-04
申请人： Eric Oliver Mejdrich , Adam James Muff , Matthew Ray Tubbs
发明人： Eric Oliver Mejdrich , Adam James Muff , Matthew Ray Tubbs
IPC分类号： G06F7/32
CPC分类号： G06F17/16 , G06F9/30014 , G06F9/30036 , G06F9/3824 , G06F9/3826 , G06F9/3885 , G06T15/005
摘要： Embodiments of the invention are generally related to the field of image processing, and more specifically to vector units for supporting image processing. A vector unit may comprise a plurality of operand multiplexers associated with each vector processing lane of the vector unit. The operand multiplexers may select vector operands from one or more register files for performing a cross product operation. A first multiply operation may be performed in a first pipeline stage by multiplying a first set of operands in a multiplier. In a second pipeline stage, a second multiply operation may be performed by multiplying a second set of operands. The results of the first multiply operation and the second multiply operation may be transferred to an adder to complete the cross product instruction.
摘要翻译：本发明的实施例通常涉及图像处理领域，更具体地涉及用于支持图像处理的矢量单元。矢量单元可以包括与矢量单元的每个矢量处理通道相关联的多个操作数复用器。操作数复用器可以从一个或多个寄存器文件中选择矢量操作数，以执行交叉产品操作。可以在第一流水线级中通过乘法乘法器中的第一组操作数来执行第一乘法运算。在第二流水线级中，可以通过乘以第二组操作数来执行第二乘法运算。可以将第一乘法运算和第二乘法运算的结果传送到加法器以完成交叉乘积指令。

96. 发明申请

US20090033653A1 Adaptive Sub-Sampling for Reduction in Issued Rays 有权
标题翻译：自适应子采样减少发射光线
公开(公告)号：US20090033653A1
公开(公告)日：2009-02-05
申请号：US11830928
申请日：2007-07-31
申请人： Jeffrey Douglas Brown , Russell Dean Hoover , Eric Oliver Mejdrich
发明人： Jeffrey Douglas Brown , Russell Dean Hoover , Eric Oliver Mejdrich
IPC分类号： G06T15/00
CPC分类号： G06T15/06
摘要： According to one embodiment of the invention, by increasing the number of rays issued through adjacent pixels with colors of high contrast while maintaining the number of rays issued through adjacent pixels which do not have colors of high contrast, a ray tracing image processing system may render an anti-aliased image while minimizing the increase in workload experienced by the image processing system. Additionally, according to another embodiment of the invention, by maintaining the number of rays issued through adjacent pixels which have colors of low contrast while increasing the number of rays issued through adjacent pixels which do not have colors of low contrast, the image processing system may reduce workload experienced while performing ray tracing while maintaining the quality of the rendered image.
摘要翻译：根据本发明的一个实施例，通过在保持通过不具有高对比度的颜色的相邻像素发出的光线的数量的同时增加通过相邻像素发出的具有高对比度的颜色的光线的数量，光线跟踪图像处理系统可以呈现抗锯齿图像，同时最小化图像处理系统经历的工作量的增加。此外，根据本发明的另一实施例，通过保持通过具有低对比度的颜色的相邻像素发出的光线的数量，同时增加通过不具有低对比度的颜色的相邻像素发出的光线的数量，图像处理系统减少在执行光线跟踪同时保持渲染图像的质量时遇到的工作量。

97. 发明申请

US20080307147A1 COMPUTER SYSTEM BUS BRIDGE 失效
标题翻译：计算机系统总线桥
公开(公告)号：US20080307147A1
公开(公告)日：2008-12-11
申请号：US12195134
申请日：2008-08-20
申请人： Giora Biran , Robert Allen Drehmel , Robert Spencer Horton , Mark E. Kautzman , Jamie Randall Kuesel , Ming-i Mark Lin , Eric Oliver Mejdrich , Clarence Rosser Ogilvie , Charles S. Woodruff
发明人： Giora Biran , Robert Allen Drehmel , Robert Spencer Horton , Mark E. Kautzman , Jamie Randall Kuesel , Ming-i Mark Lin , Eric Oliver Mejdrich , Clarence Rosser Ogilvie , Charles S. Woodruff
IPC分类号： G06F13/36 , G06F12/08 , G06F13/00
CPC分类号： G06F13/4059 , G06F12/0831
摘要： A bus bridge between a high speed computer processor bus and a high speed output bus. The preferred embodiment is a bus bridge between a GPUL bus for a GPUL PowerPC microprocessor from International Business Machines Corporation (IBM) and an output high speed interface (MPI). Another preferred embodiment is a bus bridge in a bus transceiver on a multi-chip module.
摘要翻译：高速计算机总线与高速输出总线之间的总线桥。优选实施例是用于来自国际商业机器公司（IBM）的GPUL PowerPC微处理器的GPUL总线与输出高速接口（MPI）之间的总线桥。另一个优选实施例是多芯片模块上的总线收发器中的总线桥。

98. 发明申请

US20080180442A1 Stochastic Addition of Rays in a Ray Tracing Image Processing System 有权
标题翻译：光线跟踪图像处理系统随机添加光线
公开(公告)号：US20080180442A1
公开(公告)日：2008-07-31
申请号：US11668522
申请日：2007-01-30
申请人： Jeffrey Douglas Brown , Russell Dean Hoover , Eric Oliver Mejdrich
发明人： Jeffrey Douglas Brown , Russell Dean Hoover , Eric Oliver Mejdrich
IPC分类号： G06T15/10
CPC分类号： G06T15/06 , G06T15/40
摘要： According to embodiments of the invention, rays may be stochastically culled before they are issued into the three-dimensional scene. Stochastically culling rays may reduce the number of rays which need to be traced by the image processing system. Furthermore, by stochastically culling rays before they are issued into the three-dimensional scene, minor imperfections may be added to the final rendered image, thereby improving the realism of the rendered image. Therefore, stochastic culling of rays may improve the performance of the image processing system by reducing workload imposed on the image processing system and improving the realism of the images rendered by the image processing system. According to another embodiment of the invention, the realism of images rendered by the image processing system may also be improved by stochastically adding secondary rays after ray-primitive intersections have occurred.
摘要翻译：根据本发明的实施例，射线可以在它们被发放到三维场景之前被随机地淘汰。随机剔除光线可能减少图像处理系统需要追踪的光线数量。此外，通过在将它们发布到三维场景之前随机剔除光线，可以将最小的缺陷添加到最终渲染图像，从而改善渲染图像的真实性。因此，通过减少图像处理系统的工作量，提高图像处理系统所呈现的图像的真实性，可以提高图像处理系统的性能。根据本发明的另一个实施例，图像处理系统呈现的图像的真实性也可以通过在发生光线原始交点之后随机添加二次光线来改善。

99. 发明申请

US20080126745A1 Operand Multiplexor Control Modifier Instruction in a Fine Grain Multithreaded Vector Microprocessor 审中-公开
标题翻译：精细多线程向量微处理器中的操作数多路复用器控制修改器指令
公开(公告)号：US20080126745A1
公开(公告)日：2008-05-29
申请号：US11925278
申请日：2007-10-26
申请人： Eric Oliver Mejdrich , Adam James Muff , Matthew Ray Tubbs
发明人： Eric Oliver Mejdrich , Adam James Muff , Matthew Ray Tubbs
IPC分类号： G06F15/76
CPC分类号： G06T1/20
摘要： The present invention is generally related to integrated circuit devices, and more particularly, to methods, systems and design structures for the field of image processing, and more specifically to an instruction set for processing images. Vector processing may involve rearranging vector operands in one or more source registers prior to performing vector operations. Typically, rearranging of operands in source registers is done by issuing a plurality of permute instructions that require excessive usage of temporary registers. Furthermore, the permute instructions may cause dependencies between instructions executing in a pipeline, thereby adversely affecting performance. Embodiments of the invention provide a level of muxing between a register file and a vector unit that allow for rearrangement of vector operands in source registers prior to providing the operands to the vector unit, thereby obviating the need for permute instructions.
摘要翻译：本发明通常涉及集成电路装置，更具体地涉及图像处理领域的方法，系统和设计结构，更具体地涉及用于处理图像的指令集。矢量处理可以包括在执行向量操作之前在一个或多个源寄存器中重新排列向量操作数。通常，通过发出需要临时寄存器过度使用的多个置换指令来完成源寄存器中操作数的重新排列。此外，置换指令可能导致在流水线中执行的指令之间的相关性，从而不利地影响性能。本发明的实施例提供了一种在寄存器文件和向量单元之间的复用水平，其允许在将操作数提供给向量单元之前重新排列源寄存器中的向量操作数，从而避免了对置换指令的需要。

100. 发明申请

US20080122846A1 Adaptive Ray Data Reorder for Optimized Ray Temporal Locality 失效
标题翻译：自适应光线数据重新排序优化的光时域
公开(公告)号：US20080122846A1
公开(公告)日：2008-05-29
申请号：US11564030
申请日：2006-11-28
申请人： Jeffrey Douglas Brown , Russell Dean Hoover , Eric Oliver Mejdrich
发明人： Jeffrey Douglas Brown , Russell Dean Hoover , Eric Oliver Mejdrich
IPC分类号： G06T15/10
CPC分类号： G06T15/06
摘要： According to embodiments of the invention, secondary rays may be pooled after they are generated by a vector throughput engine. After pooling the secondary rays, they may be reordered according to similarities in trajectory and originating location. The secondary rays may be sent in the new order to a workload manager for spatial index traversal. The reordering of the secondary rays may cause rays which traverse similar portions of the spatial index to be traversed immediately following (or shortly thereafter) one another. Consequently, the necessary portions of the spatial index may remain within the workload manager's memory cache, thereby reducing the number of cache misses and the amount of time necessary to traverse secondary rays through the spatial index. The reduction in time necessary to traverse the secondary rays through the spatial index may improve the overall performance of the image processing system.
摘要翻译：根据本发明的实施例，在由矢量通过量引擎生成二次射线之后，可以汇集二次射线。在汇集二次射线之后，它们可以根据轨迹和起始位置的相似性重新排序。二次射线可以以新的顺序发送到工作负载管理器，用于空间索引遍历。二次射线的重新排序可能导致穿过空间索引的类似部分的光线在彼此之后（或不久之后）紧随其后穿过。因此，空间索引的必要部分可以保留在工作负载管理器的存储器高速缓存内，从而减少高速缓存未命中的数量以及穿过空间索引穿过二次射线所需的时间量。通过空间索引穿过二次射线所需的时间的减少可以提高图像处理系统的整体性能。

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