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11. 发明申请

US20090197357A1 HIGH-TEMPERATURE ION IMPLANTATION APPARATUS AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES USING HIGH-TEMPERATURE ION IMPLANTATION 有权
标题翻译：高温离子植入装置及使用高温离子植入制作半导体器件的方法
公开(公告)号：US20090197357A1
公开(公告)日：2009-08-06
申请号：US12422826
申请日：2009-04-13
申请人： Alexander Suvorov
发明人： Alexander Suvorov
IPC分类号： H01L21/66 , H01J37/08 , H01L21/425
CPC分类号： H01L21/67213 , Y10T16/469 , Y10T16/4707
摘要： A semiconductor device fabrication apparatus includes a load lock chamber, a loading assembly in the load lock chamber, and an ion implantation target chamber that is hermetically connected to the load lock chamber. The load lock chamber is configured to store a plurality of wafer plates. Each wafer plate respectively includes at least one semiconductor wafer thereon. The ion implantation target chamber is configured to implant an ion species into a semiconductor wafer on a currently loaded wafer plate. The loading assembly is also configured to load a next one of the plurality of wafer plates from the load lock chamber into the ion implantation target chamber. The loading assembly may be configured to load the next wafer plate from the load lock chamber into the ion implantation target chamber while substantially maintaining a current temperature within the ion implantation target chamber and/or without depressurizing the ion implantation target chamber. Related methods and devices are also discussed.
摘要翻译：半导体器件制造装置包括负载锁定室，负载锁定室中的装载组件和气密地连接到负载锁定室的离子注入目标室。负载锁定室被配置为存储多个晶片板。每个晶片板分别包括至少一个半导体晶片。离子注入靶室被配置为将离子物质注入到当前装载的晶片板上的半导体晶片中。装载组件还构造成将多个晶片板中的下一个从负载锁定室装载到离子注入目标室中。加载组件可以被配置为将下一个晶片板从负载锁定室加载到离子注入靶室中，同时基本上保持离子注入靶室内的当前温度和/或不使离子注入靶室减压。还讨论了相关的方法和设备。

12. 发明授权

US07547897B2 High-temperature ion implantation apparatus and methods of fabricating semiconductor devices using high-temperature ion implantation 有权
标题翻译：高温离子注入装置及使用高温离子注入制造半导体器件的方法
公开(公告)号：US07547897B2
公开(公告)日：2009-06-16
申请号：US11441524
申请日：2006-05-26
申请人： Alexander Suvorov
发明人： Alexander Suvorov
IPC分类号： H01J37/20 , H01J37/317
CPC分类号： H01L21/67213 , Y10T16/469 , Y10T16/4707
摘要： A semiconductor device fabrication apparatus includes a load lock chamber, a loading assembly in the load lock chamber, and an ion implantation target chamber that is hermetically connected to the load lock chamber. The load lock chamber is configured to store a plurality of wafer plates. Each wafer plate respectively includes at least one semiconductor wafer thereon. The ion implantation target chamber is configured to implant an ion species into a semiconductor wafer on a currently loaded wafer plate. The loading assembly is also configured to load a next one of the plurality of wafer plates from the load lock chamber into the ion implantation target chamber. The loading assembly may be configured to load the next wafer plate from the load lock chamber into the ion implantation target chamber while substantially maintaining a current temperature within the ion implantation target chamber and/or without depressurizing the ion implantation target chamber. Related methods and devices are also discussed.
摘要翻译：半导体器件制造装置包括负载锁定室，负载锁定室中的装载组件和气密地连接到负载锁定室的离子注入目标室。负载锁定室被配置为存储多个晶片板。每个晶片板分别包括至少一个半导体晶片。离子注入靶室被配置为将离子物质注入到当前装载的晶片板上的半导体晶片中。装载组件还构造成将多个晶片板中的下一个从负载锁定室装载到离子注入目标室中。加载组件可以被配置为将下一个晶片板从负载锁定室加载到离子注入靶室中，同时基本上保持离子注入靶室内的当前温度和/或不使离子注入靶室减压。还讨论了相关的方法和设备。

13. 发明申请

US20080179637A1 Transistors having implanted channels and implanted P-type regions beneath the source region and methods of fabricating the same 有权
标题翻译：具有注入通道的晶体管和源极区下方的P型区域及其制造方法
公开(公告)号：US20080179637A1
公开(公告)日：2008-07-31
申请号：US11700268
申请日：2007-01-31
申请人： Jason P. Henning , Allan Ward , Alexander Suvorov
发明人： Jason P. Henning , Allan Ward , Alexander Suvorov
IPC分类号： H01L29/76 , H01L21/338
CPC分类号： H01L29/8128 , H01L29/0607 , H01L29/1029 , H01L29/1608 , H01L29/45 , H01L29/47
摘要： A unit cell of a metal-semiconductor field-effect transistor (MESFET) includes a semi-insulating substrate having a surface, an implanted n-type channel region in the substrate, and implanted source and drain regions extending from the surface of the substrate into the implanted channel region. A gate contact is between the source and the drain regions, and an implanted p-type region is beneath the source region. The implanted p-type region has an end that extends towards the drain region, is spaced apart vertically from the implanted channel layer, and is electrically coupled to the source region. Methods of forming transistors including implanted channels and implanted p-type regions beneath the source region are also disclosed.
摘要翻译：金属半导体场效应晶体管（MESFET）的单位电池包括具有表面的半绝缘基板，衬底中注入的n型沟道区，以及从衬底的表面延伸的注入源极和漏极区域植入通道区域。源极和漏极区之间的栅极接触，并且植入的p型区域在源极区域下方。植入的p型区域具有朝着漏极区延伸的端部，与注入沟道层垂直间隔开，并且电耦合到源极区域。还公开了在源极区域下方形成包括注入沟道和注入的p型区域的晶体管的方法。

14. 发明申请

US20070269966A1 Methods and apparatus for fabricating semiconductor devices having reduced implant contamination and related devices 有权
标题翻译：用于制造具有减少的植入物污染和相关装置的半导体器件的方法和装置
公开(公告)号：US20070269966A1
公开(公告)日：2007-11-22
申请号：US11434854
申请日：2006-05-16
申请人： Alexander Suvorov
发明人： Alexander Suvorov
IPC分类号： H01L21/425
CPC分类号： H01L21/26546 , H01L21/2658
摘要： A method of fabricating a semiconductor device includes selecting an element for implanting into a substrate. The element has at least a first isotope and a second isotope. At least one implant contaminant is identified as having a particle weight that is substantially identical to an atomic weight of the first isotope of the element. As such, ions of the second isotope of the element are selectively implanted into a region of the substrate. The second isotope has an atomic weight that is different from the particle weight of the at least one implant contaminant. For example, the selected element may be silicon (Si), the implant contaminant may be nitrogen (N2), the first isotope having the substantially identical atomic weight may be silicon-28, and the second isotope having the different atomic weight may be silicon-29. Related methods, apparatus, and devices are also discussed.
摘要翻译：制造半导体器件的方法包括选择用于植入衬底的元件。元素具有至少第一同位素和第二同位素。至少一种植入物污染物被鉴定为具有与元件的第一同位素的原子量基本相同的粒子重量。因此，元件的第二同位素的离子被选择性地注入到衬底的区域中。第二同位素具有与至少一种植入物污染物的颗粒重量不同的原子量。例如，所选择的元素可以是硅（Si），植入物污染物可以是氮（N 2 N 2），具有基本上相同的原子量的第一同位素可以是硅-28，第二同位素具有不同的原子量可以是硅-29。还讨论了相关方法，装置和装置。

15. 发明申请

US20060226482A1 Methods of fabricating silicon nitride regions in silicon carbide and resulting structures 有权
公开(公告)号：US20060226482A1
公开(公告)日：2006-10-12
申请号：US11093586
申请日：2005-03-30
申请人： Alexander Suvorov
发明人： Alexander Suvorov
IPC分类号： H01L27/12 , H01L21/425
CPC分类号： H01L21/3185 , H01L21/265 , H01L21/76243 , H01L29/66068 , Y10S438/931
摘要： A method is disclosed for fabricating a silicon nitride regions in silicon carbide. The method includes the steps of implanting a sufficient dose and energy of nitrogen ions into a silicon carbide substrate maintained at a temperature above about 350° C. to produce an as-implanted layer of a silicon nitride composition in the silicon carbide, and annealing the as-implanted layer to form a silicon nitride composition. In some embodiments, the formed region of silicon nitride provides an insulating layer. In some embodiments, the silicon nitride region is buried under a surface layer of silicon carbide. Methods of separating silicon carbide by implantation and lift-off are additionally disclosed.

16. 发明申请

US20060033111A1 Methods of treating a silicon carbide substrate for improved epitaxial deposition and resulting structures and devices 有权
标题翻译：处理碳化硅衬底以改善外延沉积以及所得结构和器件的方法
公开(公告)号：US20060033111A1
公开(公告)日：2006-02-16
申请号：US11243581
申请日：2005-10-05
申请人： Davis McClure , Alexander Suvorov , John Edmond , David Slater
发明人： Davis McClure , Alexander Suvorov , John Edmond , David Slater
IPC分类号： H01L31/0312
CPC分类号： H01L33/007 , H01L21/02378 , H01L21/02658 , H01L21/046 , H01L21/2003 , H01L29/6606 , H01L33/0062 , Y10S438/931
摘要： A silicon carbide structure is disclosed that is suitable for use as a substrate in the manufacture of electronic devices such as light emitting diodes. The structure includes a silicon carbide wafer having a first and second surface and having a predetermined conductivity type and an initial carrier concentration; a region of implanted dopant atoms extending from the first surface into the silicon carbide wafer to a predetermined depth, with the region having a higher carrier concentration than the initial carrier concentration in the remainder of the wafer; and an epitaxial layer on the first surface of the silicon carbide wafer.
摘要翻译：公开了一种碳化硅结构，其适用于制造诸如发光二极管的电子器件中的基板。该结构包括具有第一表面和第二表面并具有预定导电类型和初始载流子浓度的碳化硅晶片; 注入掺杂剂原子的区域从第一表面延伸到碳化硅晶片到预定深度，该区域具有比晶片剩余部分中的初始载流子浓度更高的载流子浓度; 以及在碳化硅晶片的第一表面上的外延层。

17. 发明授权

US06303475B1 Methods of fabricating silicon carbide power devices by controlled annealing 有权
标题翻译：通过控制退火制造碳化硅功率器件的方法
公开(公告)号：US06303475B1
公开(公告)日：2001-10-16
申请号：US09451640
申请日：1999-11-30
申请人： Alexander Suvorov , John W. Palmour , Ranbir Singh
发明人： Alexander Suvorov , John W. Palmour , Ranbir Singh
IPC分类号： H01L21336
CPC分类号： H01L29/7816 , H01L21/0445 , H01L21/046 , H01L29/1608 , H01L29/66068 , H01L29/7801 , H01L29/7802 , Y10S438/965
摘要： Silicon carbide power devices are fabricated by masking the surface of a silicon carbide substrate to define an opening at the substrate, implanting p-type dopants into the silicon carbide substrate through the opening at implant energy and dosage that form a deep p-type implant, and implanting n-type dopants into the silicon carbide substrate through the opening at implant energy and dosage that form a shallow n-type implant relative to the deep p-type implant. The deep p-type implant and the shallow n-type implant are annealed at less than 1650° C., but preferably more than about 1500°. The annealing preferably takes place for between about five minutes and about thirty minutes. Ramp-up time from room temperature to the anneal temperature is also controlled to be less than about one hundred minutes but more than about thirty minutes. Ramp-down time after annealing is also controlled by decreasing the temperature from the annealing temperature to below about 1500° C. in less than about two minutes. By controlling the ramp-up time, the annealing time and/or temperature and/or the ramp-down time, high performance silicon carbide power devices may be fabricated.
摘要翻译：碳化硅功率器件通过掩蔽碳化硅衬底的表面来限定衬底上的开口来制造，通过开口以通过开口将p型掺杂剂注入到碳化硅衬底中，所述注入能量和剂量形成深P型植入物，以及通过所述开口以注入能量和剂量将n型掺杂剂注入到所述碳化硅衬底中，所述能量和剂量相对于深P型植入物形成浅的n型植入物。深p型植入物和浅n型植入物在小于1650℃，但优选大于约1500°退火。退火优选发生约5分钟至约30分钟。从室温到退火温度的上升时间也被控制在小于约百分钟但大于约三十分钟。退火后的斜坡时间也可以通过将温度从退火温度降低到低于约1500℃，在少于约两分钟内来控制。通过控制升温时间，退火时间和/或温度和/或减速时间，可以制造高性能碳化硅功率器件。

18. 发明授权

US6107142A Self-aligned methods of fabricating silicon carbide power devices by implantation and lateral diffusion 失效
标题翻译：通过注入和横向扩散制造碳化硅功率器件的自对准方法
公开(公告)号：US6107142A
公开(公告)日：2000-08-22
申请号：US93207
申请日：1998-06-08
申请人： Alexander Suvorov , John W. Palmour , Ranbir Singh
发明人： Alexander Suvorov , John W. Palmour , Ranbir Singh
IPC分类号： H01L21/04 , H01L21/225 , H01L21/265 , H01L21/336 , H01L29/12 , H01L29/24 , H01L29/78
CPC分类号： H01L29/7816 , H01L21/046 , H01L29/66068 , H01L29/7801 , H01L29/7802 , H01L29/1608 , Y10S438/931
摘要： Silicon carbide power devices are fabricated by implanting p-type dopants into a silicon carbide substrate through an opening in a mask, to form a deep p-type implant. N-type dopants are implanted into the silicon carbide substrates through the same opening in the mask, to form a shallow n-type implant relative to the p-type implant. Annealing is then performed at temperature and time that is sufficient to laterally diffuse the deep p-type implant to the surface of the silicon carbide substrate surrounding the shallow n-type implant, without vertically diffusing the p-type implant to the surface of the silicon carbide substrate through the shallow n-type implant. Accordingly, self-aligned shallow and deep implants may be performed by ion implantation, and a well-controlled channel may be formed by the annealing that promotes significant diffusion of the p-type dopant having high diffusivity, while the n-type dopant having low diffusivity remains relatively fixed. Thereby, a p-base may be formed around an n-type source. Lateral and vertical power MOSFETs may be fabricated.
摘要翻译：通过在掩模中的开口将p型掺杂剂注入到碳化硅衬底中以形成深p型植入物来制造碳化硅功率器件。 N型掺杂剂通过掩模中相同的开口注入到碳化硅衬底中，以形成相对于p型植入物的浅n型植入物。然后在足以使深p型植入物横向扩散到围绕浅n型植入物的碳化硅衬底的表面而不将p型植入物垂直扩散到硅表面的温度和时间进行退火碳化物衬底通过浅的n型植入物。因此，可以通过离子注入来执行自对准的浅和深的植入物，并且可以通过退火形成良好控制的通道，其促进具有高扩散率的p型掺杂剂的显着扩散，而n型掺杂剂具有低的扩散性保持相对固定。由此，可以在n型源周围形成p基。可以制造横向和垂直功率MOSFET。

19. 发明授权

US08853065B2 Methods for fabricating semiconductor devices having reduced implant contamination 有权
标题翻译：制造具有减少的植入物污染的半导体器件的方法
公开(公告)号：US08853065B2
公开(公告)日：2014-10-07
申请号：US11434854
申请日：2006-05-16
申请人： Alexander Suvorov
发明人： Alexander Suvorov
IPC分类号： H01L21/425 , H01L21/265
CPC分类号： H01L21/26546 , H01L21/2658
摘要： A method of fabricating a semiconductor device includes selecting an element for implanting into a substrate. The element has at least a first isotope and a second isotope. At least one implant contaminant is identified as having a particle weight that is substantially identical to an atomic weight of the first isotope of the element. As such, ions of the second isotope of the element are selectively implanted into a region of the substrate. The second isotope has an atomic weight that is different from the particle weight of the at least one implant contaminant. For example, the selected element may be silicon (Si), the implant contaminant may be nitrogen (N2), the first isotope having the substantially identical atomic weight may be silicon-28, and the second isotope having the different atomic weight may be silicon-29. Related methods, apparatus, and devices are also discussed.
摘要翻译：制造半导体器件的方法包括选择用于植入衬底的元件。元素具有至少第一同位素和第二同位素。至少一种植入物污染物被鉴定为具有与元件的第一同位素的原子量基本相同的粒子重量。因此，元件的第二同位素的离子被选择性地注入到衬底的区域中。第二同位素具有与至少一种植入物污染物的颗粒重量不同的原子量。例如，所选择的元素可以是硅（Si），植入物污染物可以是氮（N 2），具有基本上相同的原子量的第一同位素可以是硅-28，并且具有不同原子量的第二同位素可以是硅 -29。还讨论了相关方法，装置和装置。

20. 发明授权

US08822315B2 Methods of treating a silicon carbide substrate for improved epitaxial deposition and resulting structures and devices 有权
标题翻译：处理碳化硅衬底以改善外延沉积以及所得结构和器件的方法
公开(公告)号：US08822315B2
公开(公告)日：2014-09-02
申请号：US11022496
申请日：2004-12-22
申请人： Davis Andrew McClure , Alexander Suvorov , John Adam Edmond , David Beardsley Slater, Jr.
发明人： Davis Andrew McClure , Alexander Suvorov , John Adam Edmond , David Beardsley Slater, Jr.
IPC分类号： H01L21/425 , H01L33/00 , H01L21/20 , H01L21/04 , H01L29/66
CPC分类号： H01L33/007 , H01L21/02378 , H01L21/02658 , H01L21/046 , H01L21/2003 , H01L29/6606 , H01L33/0062 , Y10S438/931
摘要： A method is disclosed for treating a silicon carbide substrate for improved epitaxial deposition thereon and for use as a precursor in the manufacture of devices such as light emitting diodes. The method includes the steps of implanting dopant atoms of a first conductivity type into the first surface of a conductive silicon carbide wafer having the same conductivity type as the implanting ions at one or more predetermined dopant concentrations and implant energies to form a dopant profile, annealing the implanted wafer, and growing an epitaxial layer on the implanted first surface of the wafer.
摘要翻译：公开了一种用于处理碳化硅衬底以改进其上的外延沉积并用作制造诸如发光二极管的器件中的前体的方法。该方法包括以下步骤：将第一导电类型的掺杂剂原子注入具有与一种或多种预定掺杂剂浓度的注入离子相同的导电类型的导电碳化硅晶片的第一表面，并且注入能量以形成掺杂剂分布，退火所述植入的晶片，以及在所述晶片的植入的第一表面上生长外延层。

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