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11. 发明申请

US20150043122A1 ELECTROSTATIC CHUCK, MOUNT PLATE SUPPORT, AND MANUFACTURING METHOD OF ELECTROSTATIC CHUCK 有权
标题翻译：静电K K OUNT OUNT K K K K K K K K K K K K K K K K K
公开(公告)号：US20150043122A1
公开(公告)日：2015-02-12
申请号：US14198779
申请日：2014-03-06
申请人： Kabushiki Kaisha Toshiba
发明人： Hideo ETO , Yasuhiro Nojiri , Makoto Saito
IPC分类号： H01L21/683 , B32B37/12 , B32B38/00
CPC分类号： B32B37/1284 , H01L21/67103 , H01L21/6831 , Y10T156/1002
摘要： According to one embodiment, an electrostatic chuck comprises a mount plate, a first layer, and a second layer. The first layer includes a heater. The second layer is provided between the mount plate and the first layer. The second layer transmits heat from the heater to the mount plate. The second layer includes a compressive attachment portion. The compressive attachment portion is formed at the outer edge. The face on the mount plate side of the compressive attachment portion is compressed and attached to the mount plate. The face on the first layer side of the compressive attachment portion is compressed and attached to the first layer.
摘要翻译：根据一个实施例，静电卡盘包括安装板，第一层和第二层。第一层包括加热器。第二层设置在安装板和第一层之间。第二层将热量从加热器传递到安装板。第二层包括压缩附着部分。压缩附着部形成在外缘。压缩安装部的安装板侧的面被压缩并安装在安装板上。压缩附着部分的第一层侧的表面被压缩并附着到第一层。

12. 发明申请

US20140061578A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：非易失性半导体存储器件
公开(公告)号：US20140061578A1
公开(公告)日：2014-03-06
申请号：US13780734
申请日：2013-02-28
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Shigeki KOBAYASHI , Yasuhiro Nojiri , Masaki Yamato , Hiroyuki Fukumizu , Takeshi Yamaguchi
IPC分类号： H01L27/24
CPC分类号： H01L27/2481 , H01L27/2409 , H01L45/08 , H01L45/12 , H01L45/1233 , H01L45/146
摘要： A nonvolatile semiconductor memory device below comprises: a memory cell array configured having memory cells arranged therein disposed at intersections of a plurality of first lines and a plurality of second lines formed so as to intersect each other, and the memory cells each comprising a variable resistance element; and a control circuit configured to select and drive the first lines and the second lines. The variable resistance element is configured by a transition metal oxide film. The variable resistance element is electrically connected to a first electrode configured from a metal at a first surface and is electrically connected to a second electrode at a second surface which is on an opposite side to the first surface. A first insulating film is formed between the first electrode and the variable resistance element. The first insulating film is formed by a first material that is formed by covalent binding.
摘要翻译：下面的非易失性半导体存储器件包括：存储单元阵列，其配置有存储单元，其布置在多个第一线和形成为彼此交叉的多个第二线的交点处，并且每个存储单元包括可变电阻元件; 以及控制电路，被配置为选择并驱动第一线和第二线。可变电阻元件由过渡金属氧化物膜构成。可变电阻元件电连接到由第一表面上的金属构成的第一电极，并且在与第一表面相反的第二表面处电连接到第二电极。在第一电极和可变电阻元件之间形成第一绝缘膜。第一绝缘膜由通过共价结合形成的第一材料形成。

13. 发明授权

US09248635B2 Electrostatic chuck, mount plate support, and manufacturing method of electrostatic chuck 有权
公开(公告)号：US09248635B2
公开(公告)日：2016-02-02
申请号：US14198779
申请日：2014-03-06
申请人： Kabushiki Kaisha Toshiba
发明人： Hideo Eto , Yasuhiro Nojiri , Makoto Saito
IPC分类号： H01T23/00 , B32B37/12 , H01L21/67 , H01L21/683
摘要： According to one embodiment, an electrostatic chuck comprises a mount plate, a first layer, and a second layer. The first layer includes a heater. The second layer is provided between the mount plate and the first layer. The second layer transmits heat from the heater to the mount plate. The second layer includes a compressive attachment portion. The compressive attachment portion is formed at the outer edge. The face on the mount plate side of the compressive attachment portion is compressed and attached to the mount plate. The face on the first layer side of the compressive attachment portion is compressed and attached to the first layer.

14. 发明授权

US09013912B2 Nonvolatile semiconductor memory device and method of forming same 有权
标题翻译：非易失性半导体存储器件及其形成方法
公开(公告)号：US09013912B2
公开(公告)日：2015-04-21
申请号：US13845668
申请日：2013-03-18
申请人： Kabushiki Kaisha Toshiba
发明人： Yasuhiro Nojiri , Shigeki Kobayashi , Masaki Yamato , Hiroyuki Fukumizu
IPC分类号： G11C11/4193 , G11C13/00
CPC分类号： G11C13/0002 , G11C13/0007 , G11C13/0069
摘要： A nonvolatile semiconductor memory device according to an embodiment comprises: a memory cell array including a plurality of memory layers; and a control unit configured to control a voltage applied to the memory cell array. Each of the memory layers comprises a first line and a second line, and further includes a memory cell disposed between the first line and the second line and including a variable resistance element. The control unit is configured to, when executing a forming operation on the memory cell array, execute the forming operation sequentially on the plurality of memory layers. The forming operation is executed sequentially on the memory layers in ascending order of a magnitude of a non-selected current flowing in a non-selected memory cell during the forming operation.
摘要翻译：根据实施例的非易失性半导体存储器件包括：包括多个存储层的存储单元阵列; 以及控制单元，被配置为控制施加到存储单元阵列的电压。每个存储层包括第一行和第二行，并且还包括位于第一行和第二行之间并包括可变电阻元件的存储单元。控制单元被配置为当在存储单元阵列上执行形成操作时，在多个存储层上顺序地执行形成操作。成形操作在成形操作期间以在未选择的存储单元中流动的未选择电流的大小的升序顺序地在存储器层上执行。

15. 发明授权

US08916846B2 Nonvolatile memory device 有权
标题翻译：非易失性存储器件
公开(公告)号：US08916846B2
公开(公告)日：2014-12-23
申请号：US13848318
申请日：2013-03-21
申请人： Kabushiki Kaisha Toshiba
发明人： Shigeki Kobayashi , Takeshi Yamaguchi , Yasuhiro Nojiri , Masaki Yamato , Hiroyuki Fukumizu
IPC分类号： H01L29/02 , H01L47/00 , H01L45/00 , H01L27/24
CPC分类号： H01L45/12 , H01L27/2409 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147
摘要： According to one embodiment, a nonvolatile memory device includes a first wiring, a second wiring, and a memory cell provided between the first wiring and the second wiring. The memory cell includes a memory layer, a rectifying element layer, and a protective resistance layer including a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type.
摘要翻译：根据一个实施例，非易失性存储器件包括第一布线，第二布线和设置在第一布线和第二布线之间的存储单元。存储单元包括存储层，整流元件层和包括第一导电类型的第一半导体层和第二导电类型的第二半导体层的保护电阻层。

16. 发明申请

US20140209853A1 SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：半导体存储器件
公开(公告)号：US20140209853A1
公开(公告)日：2014-07-31
申请号：US14026204
申请日：2013-09-13
申请人： Kabushiki Kaisha Toshiba
发明人： Masaki YAMATO , Yasuhiro Nojiri , Shiegeki Kobayashi , Hiroyuki Fukumizu , Takeshi Yamaguchi
IPC分类号： H01L45/00
CPC分类号： H01L27/249 , H01L27/2454 , H01L27/2472 , H01L45/04 , H01L45/085 , H01L45/1226 , H01L45/1233 , H01L45/1253 , H01L45/146
摘要： A plurality of first conductive layers are stacked at a predetermined pitch in a first direction perpendicular to a substrate. A memory layer is provided in common on side surfaces of the first conductive layers and functions as the memory cells. A second conductive layer comprises a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction. A width in a second direction of the first side surface at a first position is smaller than a width in the second direction of the first side surface at a second position lower than the first position. A thickness in the first direction of the first conductive layer at the first position is larger than a thickness in the first direction of the first conductive layer at the second position.
摘要翻译：多个第一导电层以垂直于基板的第一方向以预定间距堆叠。在第一导电层的侧表面上共同提供存储层，并且用作存储单元。第二导电层包括经由存储层与第一导电层的侧表面接触的第一侧表面，第二导电层沿第一方向延伸。在第一位置处的第一侧表面的第二方向上的宽度小于在比第一位置低的第二位置处的第一侧表面的第二方向上的宽度。第一导电层在第一位置的第一方向上的厚度大于第二导电层在第二位置的第一方向上的厚度。

17. 发明申请

US20130301339A1 SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：半导体存储器件
公开(公告)号：US20130301339A1
公开(公告)日：2013-11-14
申请号：US13778762
申请日：2013-02-27
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Hiroyuki FUKUMIZU , Shigeki Kobayashi , Yasuhiro Nojiri , Masaki Yamato , Takeshi Yamaguchi
IPC分类号： G11C13/00
CPC分类号： G11C13/0002 , G11C13/0007 , G11C13/0069 , G11C2013/0073 , G11C2013/0083 , G11C2213/52 , G11C2213/71 , G11C2213/72 , H01L27/2409 , H01L27/2481 , H01L45/04 , H01L45/12 , H01L45/1233 , H01L45/1253 , H01L45/146
摘要： A control circuit controls a voltage applied to a memory cell array. A first electrode contacts to a first surface of a variable resistance element, while a second electrode contacts to a second surface of the variable resistance element. The first electrode is configured by a metal, and the second electrode is configured by a P type semiconductor. The control unit, when performing a setting operation of a memory cell, applies a voltage such that a current flows in a direction from the first electrode toward the second electrode.
摘要翻译：控制电路控制施加到存储单元阵列的电压。第一电极接触可变电阻元件的第一表面，而第二电极接触可变电阻元件的第二表面。第一电极由金属构成，第二电极由P型半导体构成。控制单元在进行存储单元的设定动作时，施加电流使得电流从第一电极朝向第二电极的方向流动。

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