会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 41. 发明授权
    • Semiconductor architecture having field-effect transistors especially suitable for analog applications
    • 具有特别适用于模拟应用的场效应晶体管的半导体架构
    • US08395212B2
    • 2013-03-12
    • US13177552
    • 2011-07-06
    • Constantin Bulucea
    • Constantin Bulucea
    • H01L27/088
    • H01L21/823892H01L21/823807H01L21/823878H01L27/1203H01L29/1045H01L29/665H01L29/66659H01L29/7835
    • An insulated-gate field-effect transistor (100, 100V, 140, 150, 150V, 160, 170, 170V, 180, 180V, 190, 210, 210W, 220, 220U, 220V, 220W, 380, or 480) has a hypoabrupt vertical dopant profile below one (104 or 264) of its source/drain zones for reducing the parasitic capacitance along the pn junction between that source/drain zone and adjoining body material (108 or 268). In particular, the concentration of semiconductor dopant which defines the conductivity type of the body material increases by at least a factor of 10 in moving from that source/drain zone down to an underlying body-material location no more than 10 times deeper below the upper semiconductor surface than that source/drain zone. The body material preferably includes a more heavily doped pocket portion (120 or 280) situated along the other source/drain zone (102 or 262). The combination of the hypoabrupt vertical dopant profile below the first-mentioned source/drain zone, normally serving as the drain, and the pocket portion along the second-mentioned source/drain zone, normally serving as the source, enables the resultant asymmetric transistor to be especially suitable for high-speed analog applications.
    • 绝缘栅场效应晶体管(100,100V,140,150,150V,160,170,170V,180,180V,190,210,210W,220,220U,220V,220W,380或480)具有 低于其源极/漏极区(104或264)的垂直掺杂剂分布,用于减小源极/漏极区与邻接体材料(108或268)之间的pn结的寄生电容。 特别地,限定主体材料的导电类型的半导体掺杂剂的浓度在从该源极/漏极区向下移动到下面的主体材料位置时不小于10倍深度的上方增加至少10倍 半导体表面比该源/漏区。 主体材料优选地包括沿着另一个源极/漏极区(102或262)设置的更重掺杂的凹穴部分(120或280)。 通常用作漏极的第一提及的源极/漏极区下方的低破坏垂直掺杂物分布以及通常用作源的第二次提供的源极/漏极区的凹穴部分的组合使得所得的不对称晶体管能够 特别适用于高速模拟应用。
    • 43. 发明申请
    • BATTERY CHARGER ARCHITECTURE
    • 电池充电架构
    • US20130043828A1
    • 2013-02-21
    • US13211973
    • 2011-08-17
    • SANJAY GURLAHOSUR
    • SANJAY GURLAHOSUR
    • H02J7/00
    • H02J7/0081H02J7/0083H02J7/0091H02M3/1588Y02B40/90Y02B70/1466
    • A control circuit for use in a battery charger circuit that includes a switching voltage regulator, with the control circuit having a constant current charging mode and a constant voltage charging mode. A switcher controller is provided which configured to control a state of a top side switching transistor and a low side transistor of the switching voltage regulator in response to at least one error signal. A power path transistor switch is disposed intermediate an output of the switching voltage regulator and a first node for receiving a first terminal of a battery to be charged. Feedback circuitry is further provided to produce a first error signal relating to a difference between a first voltage and a first target voltage, with the first voltage being between the output of the switching voltage regulator and a second node for receiving a second terminal of the battery to be charged, with the first error signal being used by the switcher controller when the control circuit is in the constant voltage charging mode for controlling the top and low side switching transistors.
    • 一种用于包括开关电压调节器的电池充电器电路中的控制电路,其中控制电路具有恒定电流充电模式和恒定电压充电模式。 提供一种切换器控制器,其配置为响应于至少一个误差信号来控制开关电压调节器的顶侧开关晶体管和低侧晶体管的状态。 电源通道晶体管开关设置在开关电压调节器的输出端和用于接收要充电的电池的第一端子的第一节点之间。 还提供反馈电路以产生与第一电压和第一目标电压之间的差有关的第一误差信号,其中第一电压位于开关电压调节器的输出端和用于接收电池的第二端子的第二节点之间 当控制电路处于用于控制顶侧和底侧开关晶体管的恒压充电模式时,由开关控制器使用第一误差信号来充电。
    • 49. 发明授权
    • Reference current compensation circuit for D/A converter
    • D / A转换器的参考电流补偿电路
    • US08350739B2
    • 2013-01-08
    • US13072934
    • 2011-03-28
    • James Scott Prater
    • James Scott Prater
    • H03M1/10
    • H03M1/1061H03M1/785H03M1/808
    • A D/A converter having reference node for receiving a reference voltage and together network having a network reference bus connected to the reference node by way of a first electrical connection. The converter network produces a series of reference outputs derived from the reference voltage in response to a digital input applied to the converter, with the converter network sinking a network reference current at the network reference bus which varies with the converter digital input. A reference current compensator circuit is included which provides a compensation current at the network reference bus having a magnitude which varies in response to at least a portion of the digital input, with the compensation current operating to reduce variations in current through the first electrical connection caused by changes in the digital input.
    • 具有用于接收参考电压的参考节点和具有通过第一电连接连接到参考节点的网络参考总线的网络的D / A转换器。 转换器网络响应于施加到转换器的数字输入而产生从参考电压导出的一系列参考输出,转换器网络在网络参考总线处吸收网络参考电流,该参考电流随着转换器数字输入而变化。 包括参考电流补偿器电路,其在网络参考总线处提供补偿电流,其具有响应于数字输入的至少一部分而变化的幅度,其中补偿电流工作以减少通过第一电连接引起的电流的变化 通过数字输入的变化。