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81. 发明授权

US08275821B2 Area efficient transcendental estimate algorithm 失效
标题翻译：区域有效超验估计算法
公开(公告)号：US08275821B2
公开(公告)日：2012-09-25
申请号：US11851658
申请日：2007-09-07
申请人： Eric Oliver Mejdrich , Adam James Muff , Matthew Ray Tubbs
发明人： Eric Oliver Mejdrich , Adam James Muff , Matthew Ray Tubbs
IPC分类号： G06F7/38 , G06F1/02
CPC分类号： G06F7/548
摘要： A method, computer-readable medium, and an apparatus for generating a transcendental value. The method includes receiving an input containing an input value and an opcode and determining whether the opcode corresponds to a trigonometric operation or a power-of-two operation. The method also includes calculating a fractional value and an integer value from the input value, generating the transcendental value based on the fractional value by adding at least a portion of the fractional value with at least one of a shifted fractional value produced by shifting the portion of the fractional value and a constant value, and providing the transcendental value in response to the request. In this fashion, the same circuit area may be used to carry out both trigonometric and power-of-two calculations, leading to greater circuit area savings and performance advantages while not sacrificing significant accuracy.
摘要翻译：一种用于产生超验值的方法，计算机可读介质和装置。该方法包括接收包含输入值和操作码的输入，并确定操作码是否对应于三角运算或二进制运算。该方法还包括从输入值计算分数值和整数值，通过将分数值的至少一部分与通过移动部分产生的移位分数值中的至少一个相加而基于分数值生成超越值的分数值和恒定值，并且响应于该请求提供超验值。以这种方式，可以使用相同的电路面积来执行三角和二次幂计算，导致更大的电路面积节省和性能优点，而不牺牲显着的精度。

82. 发明申请

US20120236001A1 Tree Insertion Depth Adjustment Based on View Frustrum and Distance Culling 有权
标题翻译：基于视图和距离剔除的树插入深度调整
公开(公告)号：US20120236001A1
公开(公告)日：2012-09-20
申请号：US13476876
申请日：2012-05-21
申请人： Eric Oliver Mejdrich , Paul Emery Schardt , Robert Allen Shearer , Matthew Ray Tubbs
发明人： Eric Oliver Mejdrich , Paul Emery Schardt , Robert Allen Shearer , Matthew Ray Tubbs
IPC分类号： G06T15/60 , G06T15/00
CPC分类号： G06T15/06 , G06T17/005
摘要： A computer-implemented method includes initializing a driver associated with an input/output adapter in response to receiving an initialize driver request from a client application. The computer-implemented method includes initializing the input/output adapter to enable adapter capabilities of the input/output adapter to be determined. The computer-implemented method also includes determining the adapter capabilities of the input/output adapter. The computer-implemented method further includes determining slot capabilities of a slot associated with the input/output adapter. The computer-implemented method also includes setting configurable capabilities of the input/output adapter based on the adapter capabilities and the slot capabilities.
摘要翻译：计算机实现的方法包括初始化与输入/输出适配器相关联的驱动程序以响应于从客户端应用程序接收到初始化驱动程序请求。计算机实现的方法包括初始化输入/输出适配器以确定输入/输出适配器的适配器能力。计算机实现的方法还包括确定输入/输出适配器的适配器能力。计算机实现的方法还包括确定与输入/输出适配器相关联的时隙的时隙能力。计算机实现的方法还包括基于适配器能力和时隙能力来设置输入/输出适配器的可配置功能。

83. 发明授权

US08248402B2 Adaptive ray data reorder for optimized ray temporal locality 失效
标题翻译：自适应射线数据重新排序以优化射线时间局部性
公开(公告)号：US08248402B2
公开(公告)日：2012-08-21
申请号：US11564030
申请日：2006-11-28
申请人： Jeffrey Douglas Brown , Russell Dean Hoover , Eric Oliver Mejdrich
发明人： Jeffrey Douglas Brown , Russell Dean Hoover , Eric Oliver Mejdrich
IPC分类号： G06T15/00 , G06T17/00 , G06T15/50 , G06T15/20 , G09G5/00
CPC分类号： G06T15/06
摘要： According to embodiments of the invention, secondary rays may be pooled after they are generated by a vector throughput engine. After pooling the secondary rays, they may be reordered according to similarities in trajectory and originating location. The secondary rays may be sent in the new order to a workload manager for spatial index traversal. The reordering of the secondary rays may cause rays which traverse similar portions of the spatial index to be traversed immediately following (or shortly thereafter) one another. Consequently, the necessary portions of the spatial index may remain within the workload manager's memory cache, thereby reducing the number of cache misses and the amount of time necessary to traverse secondary rays through the spatial index. The reduction in time necessary to traverse the secondary rays through the spatial index may improve the overall performance of the image processing system.
摘要翻译：根据本发明的实施例，在由矢量通过量引擎生成二次射线之后，可以汇集二次射线。在汇集二次射线之后，它们可以根据轨迹和起始位置的相似性重新排序。二次射线可以以新的顺序发送到工作负载管理器，用于空间索引遍历。二次射线的重新排序可能导致穿过空间索引的类似部分的光线在彼此之后（或不久之后）紧随其后穿过。因此，空间索引的必要部分可以保留在工作负载管理器的存储器高速缓存内，从而减少高速缓存未命中的数量以及穿过空间索引穿过二次射线所需的时间量。通过空间索引穿过二次射线所需的时间的减少可以提高图像处理系统的整体性能。

84. 发明授权

US08205067B2 Context switching and synchronization 有权
标题翻译：上下文切换和同步
公开(公告)号：US08205067B2
公开(公告)日：2012-06-19
申请号：US12685443
申请日：2010-01-11
申请人： Jon K. Kriegel , Eric Oliver Mejdrich
发明人： Jon K. Kriegel , Eric Oliver Mejdrich
IPC分类号： G06F9/00
CPC分类号： G06F9/4812 , G06F9/461 , G06F9/463 , G06F9/5016 , G06F9/5027 , G06F12/0837 , G06F12/0842 , G06F12/1054 , G06F12/126 , G06F2209/481 , G06F2209/5018
摘要： A method, computer-readable medium, and apparatus for context switching between a first thread and a second thread. The method includes detecting an exception, wherein the exception is generated in response to receiving a packet of information directed to one of the first thread and the second thread, and in response to detecting the exception, invoking an exception handler. The exception handler is configured to execute one or more instructions removing access to at least a portion of a processor cache. The portion of the processor cache contains cached information for the first thread using a first address translation. Removing access to the portion of the processor cache prevents the second thread using a second address translation from accessing the cached information in the processor cache. The exception handler is also configured to branch to at least one of the first thread and the second thread.
摘要翻译：一种用于第一线程和第二线程之间的上下文切换的方法，计算机可读介质和装置。该方法包括检测异常，其中响应于接收到针对第一线程和第二线程之一的信息的分组而产生异常，并且响应于检测异常，调用异常处理程序。异常处理程序被配置为执行一个或多个指令，以移除对处理器高速缓存的至少一部分的访问。处理器缓存的部分包含使用第一个地址转换的第一个线程的缓存信息。去除对处理器高速缓存部分的访问阻止使用第二地址转换的第二线程访问处理器高速缓存中的缓存信息。异常处理程序还被配置为分支到第一线程和第二线程中的至少一个。

85. 发明授权

US08102391B2 Hybrid rendering of image data utilizing streaming geometry frontend interconnected to physical rendering backend through dynamic accelerated data structure generator 有权
标题翻译：使用流几何前端的图像数据的混合渲染通过动态加速数据结构生成器互连到物理渲染后端
公开(公告)号：US08102391B2
公开(公告)日：2012-01-24
申请号：US12101349
申请日：2008-04-11
申请人： Dave Fowler , Eric Oliver Mejdrich , Paul Emery Schardt , Robert Allen Shearer
发明人： Dave Fowler , Eric Oliver Mejdrich , Paul Emery Schardt , Robert Allen Shearer
IPC分类号： G06T15/00
CPC分类号： G06T15/506 , G06T15/06 , G06T2200/28
摘要： A circuit arrangement and method provide a hybrid rendering architecture capable of interfacing a streaming geometry frontend with a physical rendering backend using a dynamic accelerated data structure (ADS) generator. The dynamic ADS generator effectively parallelizes the generation of the ADS, such that an ADS may be built using a plurality of parallel threads of execution. By doing so, both the frontend and backend rendering processes are amendable to parallelization, and enabling if so desired real time rendering using physical rendering techniques such as ray tracing and photon mapping. Furthermore, streaming geometry frontends such as OpenGL and DirectX compatible frontends can readily be adapted for use with physical rendering backends, thereby enabling developers to continue to develop with raster-based API's, yet still obtain the benefits of physical rendering techniques.
摘要翻译：电路布置和方法提供了能够使用动态加速数据结构（ADS）发生器将流几何前沿与物理渲染后端连接的混合渲染架构。动态ADS发生器有效地并行化ADS的生成，使得可以使用多个并行执行线程构建ADS。通过这样做，前端和后端渲染过程可以修改为并行化，并且如果需要使用诸如光线跟踪和光子映射之类的物理渲染技术的实时渲染，则使能。此外，诸如OpenGL和DirectX兼容的前端之类的流式传输几何前端可以轻松适应与物理渲染后端一起使用，从而使开发人员能够使用基于光栅的API继续开发，但仍然可以获得物理渲染技术的优势。

86. 发明授权

US08082420B2 Method and apparatus for executing instructions 有权
标题翻译：用于执行指令的方法和装置
公开(公告)号：US08082420B2
公开(公告)日：2011-12-20
申请号：US11877754
申请日：2007-10-24
申请人： Miguel Comparan , Brent Francis Hilgart , Brian Lee Koehler , Eric Oliver Mejdrich , Adam James Muff , Alfred Thomas Watson, III
发明人： Miguel Comparan , Brent Francis Hilgart , Brian Lee Koehler , Eric Oliver Mejdrich , Adam James Muff , Alfred Thomas Watson, III
IPC分类号： G06F9/38
CPC分类号： G06F9/3885 , G06F9/3851
摘要： A method and apparatus for executing instructions in a processor are provided. In one embodiment of the invention, the method includes receiving a plurality of instructions. The plurality of instructions includes first instructions in a first thread and second instructions in a second thread. The method further includes forming a common issue group including an instruction of a first instruction type and an instruction of a second instruction type. The method also includes issuing the common issue group to a first execution unit and a second execution unit. The instruction of the first instruction type is issued to the first execution unit and the instruction of the second instruction type is issued to the second execution unit.
摘要翻译：提供了一种用于在处理器中执行指令的方法和装置。在本发明的一个实施例中，该方法包括接收多个指令。多个指令包括第一线程中的第一指令和第二线程中的第二指令。该方法还包括形成包括第一指令类型的指令和第二指令类型的指令的公共发行组。该方法还包括向第一执行单元和第二执行单元发布公共问题组。向第一执行单元发出第一指令类型的指令，并向第二执行单元发出第二指令类型的指令。

87. 发明授权

US07941644B2 Simultaneous multi-thread instructions issue to execution units while substitute injecting sequence of instructions for long latency sequencer instruction via multiplexer 失效
标题翻译：同时多线程指令发送到执行单元，同时通过多路复用器代替长延迟定序器指令的指令序列
公开(公告)号：US07941644B2
公开(公告)日：2011-05-10
申请号：US12252541
申请日：2008-10-16
申请人： Eric Oliver Mejdrich , Adam James Muff , Matthew Ray Tubbs
发明人： Eric Oliver Mejdrich , Adam James Muff , Matthew Ray Tubbs
IPC分类号： G06F9/46
CPC分类号： G06F9/3885 , G06F9/22 , G06F9/3009 , G06F9/3851 , G06F9/3867
摘要： A processing unit includes multiple execution units and sequencer logic that is disposed downstream of instruction buffer logic, and that is responsive to a sequencer instruction present in an instruction stream. In response to such an instruction, the sequencer logic issues a plurality of instructions associated with a long latency operation to one execution unit, while blocking instructions from the instruction buffer logic from being issued to that execution unit. In addition, the blocking of instructions from being issued to the execution unit does not affect the issuance of instructions to any other execution unit, and as such, other instructions from the instruction buffer logic are still capable of being issued to and executed by other execution units even while the sequencer logic is issuing the plurality of instructions associated with the long latency operation.
摘要翻译：处理单元包括多个执行单元和定序器逻辑，其布置在指令缓冲器逻辑的下游，并且响应于指令流中存在的定序器指令。响应于这样的指令，定序器逻辑向一个执行单元发出与长等待时间操作相关联的多个指令，同时阻止来自指令缓冲器逻辑的指令被发布到该执行单元。此外，指令的阻塞被发布到执行单元不影响向任何其他执行单元发出指令，因此来自指令缓冲器逻辑的其他指令仍然能够被发出并由其他执行执行即使当定序器逻辑发出与长延迟操作相关联的多个指令时。

88. 发明授权

US07904700B2 Processing unit incorporating special purpose register for use with instruction-based persistent vector multiplexer control 失效
标题翻译：包含专用寄存器的处理单元，用于基于指令的持久矢量多路复用器控制
公开(公告)号：US07904700B2
公开(公告)日：2011-03-08
申请号：US12045222
申请日：2008-03-10
申请人： Eric Oliver Mejdrich , Adam James Muff , Robert Allen Shearer , Matthew Ray Tubbs
发明人： Eric Oliver Mejdrich , Adam James Muff , Robert Allen Shearer , Matthew Ray Tubbs
IPC分类号： G06F9/00
CPC分类号： G06F9/30032 , G06F9/30036 , G06F9/30109 , G06F9/30123
摘要： A software-accessible special purpose register is architected into a processing unit in order to implement persistent vector multiplexer control of a vector-based execution unit. A persistent swizzle instruction is defined in an instruction set for the vector-based execution unit and is used to cause state information to be stored in the special purpose register such that the operand vectors processed by subsequent vector instructions executed by the vector-based execution unit will be selectively shuffled using the persisted state information. As a result, when multiple vector instructions require a common custom word ordering for one or more operand vectors, a single persistent swizzle instruction may be used to select the desired custom word ordering for all of the vector instructions.
摘要翻译：软件可访问专用寄存器被设计成处理单元，以便实现基于向量的执行单元的持久矢量多路复用器控制。在基于向量的执行单元的指令集中定义持续转换指令，并且用于使状态信息存储在专用寄存器中，使得由基于向量的执行单元执行的后续向量指令处理的操作数向量将使用持久状态信息选择性地进行混洗。因此，当多个向量指令需要一个或多个操作数向量的公共自定义单词排序时，可以使用单个持续旋转指令来选择所有向量指令的期望的定制单词排序。

89. 发明授权

US07818503B2 Method and apparatus for memory utilization 有权
标题翻译：用于存储器利用的方法和装置
公开(公告)号：US07818503B2
公开(公告)日：2010-10-19
申请号：US11567874
申请日：2006-12-07
申请人： Russell Dean Hoover , Jon K. Kriegel , Eric Oliver Mejdrich , Robert Allen Shearer
发明人： Russell Dean Hoover , Jon K. Kriegel , Eric Oliver Mejdrich , Robert Allen Shearer
IPC分类号： G06F12/00
CPC分类号： G06T15/50 , G06T15/06
摘要： One embodiment of the invention provides a method and apparatus for utilizing memory. The method includes reserving a first portion of a cache in a processor for an inbox. The inbox is associated with a first thread being executed by the processor. The method also includes receiving a packet from a second thread, wherein the packet includes an access request. The method further includes using inbox control circuitry for the inbox to process the received packet and determine whether to grant the access request included in the packet.
摘要翻译：本发明的一个实施例提供一种利用存储器的方法和装置。该方法包括在收件箱的处理器中预留高速缓存的第一部分。收件箱与由处理器执行的第一个线程相关联。该方法还包括从第二线程接收分组，其中分组包括接入请求。该方法还包括使用收件箱控制电路来收件箱来处理接收到的分组并且确定是否授予包含在分组中的接入请求。

90. 发明申请

US20090315908A1 Anisotropic Texture Filtering with Texture Data Prefetching 有权
标题翻译：各向异性纹理过滤与纹理数据预取
公开(公告)号：US20090315908A1
公开(公告)日：2009-12-24
申请号：US12110045
申请日：2008-04-25
申请人： Miguel Comparan , Eric Oliver Mejdrich , Adam James Muff , Matthew Ray Tubbs
发明人： Miguel Comparan , Eric Oliver Mejdrich , Adam James Muff , Matthew Ray Tubbs
IPC分类号： G09G5/00 , G06K9/40
CPC分类号： G06T15/04 , G06T2200/12
摘要： A circuit arrangement and method utilize texture data prefetching to prefetch texture data used by an anisotropic filtering algorithm. In particular, stride-based prefetching may be used to prefetch texture data for use in anisotropic filtering, where the value of the stride, or difference between successive accesses, is based upon a distance in a memory address space between sample points taken along the line of anisotropy used in an anisotropic filtering algorithm.
摘要翻译：电路布置和方法利用纹理数据预取来预取由各向异性滤波算法使用的纹理数据。特别地，可以使用基于步幅的预取来预取用于各向异性过滤中的纹理数据，其中步幅的值或连续访问之间的差是基于沿着线所取的采样点之间的存储器地址空间中的距离在各向异性过滤算法中使用各向异性。

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