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81. 发明授权

US06858161B2 Method for purifying electronic item material 失效
标题翻译：电子产品材料净化方法
公开(公告)号：US06858161B2
公开(公告)日：2005-02-22
申请号：US09893684
申请日：2001-06-29
申请人： Katsumi Abe , Tomonori Nishimura , Takanobu Watanabe , Susumu Suzuka
发明人： Katsumi Abe , Tomonori Nishimura , Takanobu Watanabe , Susumu Suzuka
IPC分类号： G03G5/00 , B01D15/00 , B01J20/12 , C07C211/54 , C07C211/60 , C07C251/86 , C09K11/06 , G03G5/047 , G03G5/05 , G03G5/06 , H01B1/12
CPC分类号： G03G5/0668 , C07C211/54 , C07C211/60 , C07C251/86 , C07C2602/08 , C07C2603/18 , G03G5/047 , G03G5/05 , G03G5/0614 , G03G5/0629 , G03G5/0642 , G03G5/0696 , Y10S423/14
摘要： A method for purifying an electronic item material, which comprises dissolving an electronic item material or its intermediate product in an organic solvent and having the solution contacted with activated clay at a temperature of 65° C. to 200° C.
摘要翻译：一种净化电子物品的方法，包括将电子物品或其中间产物溶解在有机溶剂中并使溶液与活性粘土接触，温度为65℃至200℃。

82. 发明授权

US06483772B2 Semiconductor memory device capable of masking data to be written 失效
公开(公告)号：US06483772B2
公开(公告)日：2002-11-19
申请号：US09951230
申请日：2001-09-12
申请人： Susumu Ozawa , Shigeo Ohshima , Katsumi Abe
发明人： Susumu Ozawa , Shigeo Ohshima , Katsumi Abe
IPC分类号： G11C800
CPC分类号： G11C7/1087 , G11C7/1006 , G11C7/1078
摘要： A specifying circuit specifies either the first masking method or the second masking method. A first generation circuit generates a signal corresponding to the first method. A second generation circuit generates a signal corresponding to the second method. A third generation circuit generates a write pulse signal on the basis of the output signal of the first generation circuit in response to the specification of the first masking method made by the specifying circuit and on the basis of the output signal of the second generation circuit in response to the specification of the second masking method made by the specifying circuit.

83. 发明授权

US06169509A Switched capacitor type D/A converter and display driver 有权
标题翻译：开关电容式D / A转换器和显示驱动器
公开(公告)号：US06169509A
公开(公告)日：2001-01-02
申请号：US09337554
申请日：1999-06-22
申请人： Katsumi Abe
发明人： Katsumi Abe
IPC分类号： H03M166
CPC分类号： H03M1/1023 , H03M1/804
摘要： Disclosed is a switched capacitor type D/A converter, which comprises: an operational amplifier; a plurality of capacitors; a plurality of first switches which alternatively change connection thereof dependently on whether the filter is in an output mode or a reset mode so that the filter realizes an offset canceling function; a voltage source; and a second switch for directly connecting an output of said operational amplifier with said voltage source at a beginning of the reset mode.
摘要翻译：公开了一种开关电容器型D / A转换器，其包括：运算放大器; 多个电容器; 多个第一开关交替地改变其连接，这取决于滤波器是处于输出模式还是复位模式，使得滤波器实现偏移消除功能; 电压源; 以及在复位模式开始时直接连接所述运算放大器的输出与所述电压源的第二开关。

84. 发明授权

US08659519B2 Pixel circuit with a writing period and a driving period, and driving method thereof 有权
标题翻译：具有写入周期和驱动周期的像素电路及其驱动方法
公开(公告)号：US08659519B2
公开(公告)日：2014-02-25
申请号：US12548796
申请日：2009-08-27
申请人： Katsumi Abe , Kenji Takahashi , Ryo Hayashi , Hideya Kumomi
发明人： Katsumi Abe , Kenji Takahashi , Ryo Hayashi , Hideya Kumomi
IPC分类号： G09G3/30
CPC分类号： G09G3/325 , G09G2300/0426 , G09G2300/0439 , G09G2300/0814 , G09G2300/0852 , G09G2310/0251 , G09G2310/0262 , G09G2320/0223
摘要： A pixel circuit including at least a light emitting element, and a thin film transistor that supplies to the light emitting element a first current controlling a gray scale according to luminance-current characteristics of the light emitting element, wherein the thin film transistor has a back gate electrode, at least a driving period in which the thin film transistor supplies the first current to the light emitting element, and a writing period in which a second current is written to the thin film transistor before the driving period in order to pass the first current to the thin film transistor during the driving period are included, and by changing voltages which are applied to the back gate electrode in the driving period and the writing period, current capability to a gate voltage of the thin film transistor is made to differ.
摘要翻译：至少包括发光元件的像素电路和薄膜晶体管，其向发光元件提供根据发光元件的亮度 - 电流特性控制灰度的第一电流，其中所述薄膜晶体管具有背面至少一个驱动周期，其中薄膜晶体管将第一电流提供给发光元件;以及写入周期，其中第二电流在驱动周期之前被写入薄膜晶体管，以便通过第一包括在驱动周期期间到薄膜晶体管的电流，并且通过改变在驱动周期和写入周期中施加到背栅电极的电压，使薄膜晶体管的栅极电压的电流能力不同。

85. 发明授权

US08486594B2 P-terphenyl compound mixture and electrophotographic photoreceptors made by using the same 有权
标题翻译：对三联苯化合物混合物和使用它们的电子照相感光体
公开(公告)号：US08486594B2
公开(公告)日：2013-07-16
申请号：US12161964
申请日：2007-01-24
申请人： Shinya Nagai , Atsushi Takesue , Makoto Koike , Katsumi Abe , Takehiro Nakajima
发明人： Shinya Nagai , Atsushi Takesue , Makoto Koike , Katsumi Abe , Takehiro Nakajima
IPC分类号： G03G5/06
CPC分类号： G03G5/0618 , C07C211/54 , G03G5/0614 , G03G5/0696
摘要： An object of the invention is to provide: a p-terphenyl compound mixture useful as a charge-transporting agent which has improved solubility in organic solvents to thereby diminish a cracking phenomenon, which poses problems concerning photoreceptor characteristics, and can realize an electrophotographic photoreceptor having high sensitivity and high durability; and an electrophotographic photoreceptor employing the compound mixture. The invention relates to: a p-terphenyl compound mixture which includes two symmetric p-terphenyl compounds respectively represented by the following general formula (1) and general formula (2) and an asymmetric p-terphenyl compound represented by the following general formula (3) which has both a group of substituents of the compound represented by general formula (1) and a group of substituents of the compound represented by general formula (2); and an electrophotographic photoreceptor containing the compound mixture.
摘要翻译：本发明的目的是提供：可用作电荷输送剂的对三联苯化合物混合物，其在有机溶剂中具有改善的溶解度从而减少裂纹现象，这导致关于感光体特性的问题，并且可以实现具有高灵敏度和高耐用性; 和使用该化合物混合物的电子照相感光体。本发明涉及：对三联苯化合物混合物，其包含分别由以下通式（1）和通式（2）表示的两个对称的对三联苯化合物和由以下通式（3）表示的不对称对三联苯化合物），其具有由通式（1）表示的化合物的一组取代基和由通式（2）表示的化合物的取代基的一组; 和含有该化合物混合物的电子照相感光体。

86. 发明授权

US08304298B2 Inverter manufacturing method and inverter 有权
标题翻译：变频器制造方法及变频器
公开(公告)号：US08304298B2
公开(公告)日：2012-11-06
申请号：US12597211
申请日：2008-05-15
申请人： Masato Ofuji , Katsumi Abe , Ryo Hayashi , Masafumi Sano , Hideya Kumomi
发明人： Masato Ofuji , Katsumi Abe , Ryo Hayashi , Masafumi Sano , Hideya Kumomi
IPC分类号： H01L21/00
CPC分类号： H01L29/7869 , H01L27/1233
摘要： To provide an enhancement-depletion (E/D) inverter which can be easily manufactured, in the present invention, a method of manufacturing an inverter which is composed of an oxide semiconductor in which a channel layer includes at least one element selected from In, Ga and Zn formed on a same substrate, the inverter being the E/D inverter having plural thin film transistors, is characterized by comprising the steps of: forming a first transistor and a second transistor, the thicknesses of the channel layers of the first and second transistors being mutually different; and executing heat treatment to at least one of the channel layers of the first and second transistors.
摘要翻译：为了提供易于制造的增强耗尽（E / D）逆变器，在本发明中，制造由氧化物半导体构成的逆变器的制造方法，其中沟道层包括选自In， Ga和Zn形成在同一衬底上，所述逆变器是具有多个薄膜晶体管的E / D逆变器，其特征在于包括以下步骤：形成第一晶体管和第二晶体管，第一和第二晶体管的沟道层的厚度第二晶体管是相互不同的; 以及对所述第一和第二晶体管的至少一个沟道层执行热处理。

87. 发明授权

US08284612B2 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US08284612B2
公开(公告)日：2012-10-09
申请号：US12884721
申请日：2010-09-17
申请人： Masahiro Yoshihara , Teruo Takagiwa , Katsumi Abe
发明人： Masahiro Yoshihara , Teruo Takagiwa , Katsumi Abe
IPC分类号： G11C16/06
CPC分类号： G11C16/3436
摘要： According to one embodiment, a semiconductor memory device includes memory cells, holding circuits, and a logical gate chain. The memory cells are associated with columns. The holding circuits are associated with the columns and capable of holding first information indicating whether associated one of the columns is a verify-failed column or not. The logical gate chain includes a plurality of first logical gates associated with the columns and connected in series. Each of the first logical gates outputs a logical level to a next-stage first logical gate in a series connection. The logical level indicates whether the verify-failed column exists or not based on the first information in associated one of the holding circuit. The content indicated by the logical level output from each of the first logical gates is inverted using one of the first logical gates associated with the verify-failed column as a border.
摘要翻译：根据一个实施例，半导体存储器件包括存储单元，保持电路和逻辑门极链。存储单元与列相关联。保持电路与列相关联，并且能够保存指示相关联的一个列是否为验证失败列的第一信息。逻辑门链包括与列相关联并且串联连接的多个第一逻辑门。第一逻辑门中的每一个在串联连接中将逻辑电平输出到下一级第一逻辑门。逻辑电平基于保持电路中相关联的一个中的第一信息指示验证失败列是否存在。使用与验证失败列相关联的第一逻辑门之一作为边界来反转从每个第一逻辑门输出的逻辑电平指示的内容。

88. 发明申请

US20120208117A1 DIPHENYLNAPHTHYLAMINE DERIVATIVES 有权
标题翻译：二苯基苯胺衍生物
公开(公告)号：US20120208117A1
公开(公告)日：2012-08-16
申请号：US13503227
申请日：2010-11-04
申请人： Shigetaka Numazawa , Katsumi Abe , Makoto Koike , Kiyotaka Ihara
发明人： Shigetaka Numazawa , Katsumi Abe , Makoto Koike , Kiyotaka Ihara
IPC分类号： G03G5/047 , C07C217/94
CPC分类号： C07C211/58 , G03G5/0614
摘要： [Problems] To provide a novel compound which has a high carrier mobility and is useful as a charge-transporting agent that is not only capable of stably forming a photosensitive layer without precipitating crystals or forming pinholes at the time of forming the photosensitive layer but is also capable of forming an organic photosensitive material for electrophotography that has a high sensitivity and a low residual potential.[Means for Solution] A diphenylnaphthylamine derivative represented by the following general formula (1), wherein R1 to R3 are alkyl groups, k is an integer of 0 to 3, j is an integer of 0 to 4, l is an integer of 0 to 6, and X1 and X2 are hydrocarbon groups having at least one ethylenically unsaturated bond.
摘要翻译： [问题]提供具有高载流子迁移率并可用作电荷输送剂的新型化合物，其不仅能够在形成感光层时不会析出晶体或形成针孔而稳定地形成感光层，而且可以形成光敏层也能够形成具有高灵敏度和低残留电位的电子照相用有机感光材料。 [解决方案]由以下通式（1）表示的二苯基萘胺衍生物，其中R 1至R 3为烷基，k为0至3的整数，j为0至4的整数，l为0的整数至6，并且X 1和X 2为具有至少一个烯属不饱和键的烃基。

89. 发明授权

US08243539B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US08243539B2
公开(公告)日：2012-08-14
申请号：US12782159
申请日：2010-05-18
申请人： Makoto Takizawa , Shoichi Ozaki , Katsumi Abe
发明人： Makoto Takizawa , Shoichi Ozaki , Katsumi Abe
IPC分类号： G11C7/00
CPC分类号： G11C16/26 , G11C16/0483 , G11C29/02 , G11C29/025 , G11C29/34 , G11C2029/1204
摘要： When bit lines or sense amplifiers are checked whether they are defective during a test performed to check whether the bit lines are defectively open, an electrical current supplied from one sense amplifier is detected by another sense amplifier. Thus, if plural bit lines are defectively open, they can be detected simultaneously. Consequently, the test time can be shortened greatly.
摘要翻译：当检查位线或读出放大器在执行测试期间是否有缺陷以检查位线是否有缺陷时，由另一个读出放大器检测从一个读出放大器提供的电流。因此，如果多个位线有缺陷，则可以同时检测。因此，可以大大缩短测试时间。

90. 发明授权

US08203146B2 Integrated circuits utilizing amorphous oxides 有权
标题翻译：采用无定形氧化物的集成电路
公开(公告)号：US08203146B2
公开(公告)日：2012-06-19
申请号：US12882404
申请日：2010-09-15
申请人： Katsumi Abe , Hideo Hosono , Toshio Kamiya , Kenji Nomura
发明人： Katsumi Abe , Hideo Hosono , Toshio Kamiya , Kenji Nomura
IPC分类号： H01L31/20
CPC分类号： H01L29/7869
摘要： Semiconductor devices and circuits with use of transparent oxide film are provided. The semiconductor device having a P-type region and an N-type region, wherein amorphous oxides with electron carrier concentration less than 1018/cm3 is used for the N-type region.
摘要翻译：提供了使用透明氧化膜的半导体器件和电路。具有P型区域和N型区域的半导体器件，其中电子载流子浓度小于1018 / cm3的非晶形氧化物用于N型区域。

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