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81. 发明授权

US5418721A Control device for transmission of supervisory control data in vehicle 失效
标题翻译：车辆监控数据传输控制装置
公开(公告)号：US5418721A
公开(公告)日：1995-05-23
申请号：US199886
申请日：1994-02-22
申请人： Youichi Arai , Kazuyoshi Ogasawara
发明人： Youichi Arai , Kazuyoshi Ogasawara
IPC分类号： B60R16/02 , B60R16/023 , B60R16/03 , H04L1/00 , H04L12/413 , H04L25/493 , G01M15/00 , H04J15/00
CPC分类号： H04L12/4135 , H04L25/493 , B60R16/0315 , H04L2001/0093 , H04L2012/40273
摘要： A data transmission control device is provided for each of a plurality of units for controlling transmission of supervisory control data. Each control device includes a data error checking unit which causes a data reception unit to transmit a response signal when an error has been detected in the data by the data error checking unit. If a response signal detecting section in the transmitting unit detects a response signal, a data transmission unit resends the common data.
摘要翻译：为多个单元中的每一个提供数据传输控制装置，用于控制监控数据的传输。每个控制装置包括数据错误检查单元，当数据错误检查单元在数据中检测到错误时，使数据接收单元发送响应信号。如果发送单元中的响应信号检测部分检测到响应信号，则数据发送单元重新发送公共数据。

82. 发明授权

US5353303A Technique for increasing the data rate in a spread spectrum data link 失效
标题翻译：用于增加扩频数据链路中的数据速率的技术
公开(公告)号：US5353303A
公开(公告)日：1994-10-04
申请号：US134011
申请日：1993-10-04
申请人： David E. Walthall
发明人： David E. Walthall
IPC分类号： H04B1/707 , H04L23/02 , H04L25/493 , H04L27/30 , H03C7/00
CPC分类号： H04L25/493 , H04B1/707 , H04L23/02
摘要： A method for increasing the bit rate of a data link is to select two additional 31-bit chip code patterns that are orthogonal to the present two chip codes, and to each other. This method will not require any more bandwidth that the present 10 MHz used. This method suggests that each of the four chip code patterns are assigned a two bit value i.e.: 00, 01, 10, 11. At present, the two correlated chip codes represent data in a pulse position method. No information is transferred by determining which of the two chip codes actually correlated. This new method suggests each of the four chip code patterns will still perform the pulse position modulation and also provide two additional bits of data. These additional two bits of data will up the data rate of the link by 100 percent. Alternatively, the data rate may be increased by coding the datasuch that a reduction in duty cycle is realized as well as an increase in the data rate. Variations of the coding scheme avoid repeating a chip code in successive windows to reduce the effects of multipath propagation.
摘要翻译：用于增加数据链路的比特率的方法是选择与本发明的两个码片码相互正交的两个附加的31位码片码型。该方法不需要使用当前10 MHz的任何带宽。该方法表明，四个芯片码模式中的每一个被分配两个比特值，即：00,01,10,11。目前，两个相关芯片码表示脉冲位置方法中的数据。通过确定两个芯片代码中的哪一个实际相关来传送信息。这种新方法表明，四种码片模式中的每一种仍将执行脉冲位置调制，并且还提供两个额外的数据位。这些额外的两位数据将使链路的数据速率提高100％。或者，可以通过对数据库的编码来实现数据速率，即实现占空比的减小以及数据速率的增加。编码方案的变化避免了在连续窗口中重复码片码，以减少多径传播的影响。

83. 发明授权

US5206909A Method for secure PPM-based laser communications 失效
标题翻译：基于PPM的激光通信方法
公开(公告)号：US5206909A
公开(公告)日：1993-04-27
申请号：US643250
申请日：1991-01-18
申请人： John A. Gates
发明人： John A. Gates
IPC分类号： H04J3/16 , H04L25/493
CPC分类号： H04L25/493 , H04J3/1676
摘要： A system for secure communication between transmitting and receiving devices in a laser communications system using pulse position modulation, has a transmitter means to modulate and a receiver means to demodulate a transmission utilizing a protocol in which a number N (N.gtoreq.1) of optical pulses represents each symbol to be transmitted. A transmission is initiated with a trigger event. Thereafter, a multi-pulse synchronization signal is transmitted as the first symbol of each transmission, the first pulse of said synchronization symbol being transmitted within a first time frame after said trigger. A buffer in said receiver receives and stores the first of said N frames of said synchronization symbol. Each subsequently received frame of said N frames of said synchronization symbol is added to data previously stored in said buffer. A frame template is calculated from the stored pulse data of said first N pulses in said buffer and from said synchronization symbol protocol. The calculated frame template is used for transmission of subsequent message symbols, which are then transmitted in N frames per symbol. The system includes an algorithm for the synchronization symbol format which pseudo-randomly positions each of said N-1 pulses after said first pulse within its frame by offsetting the start time of its frame by a predetermined amount of time, with reference to the start time of said first frame. The system also includes an algorithm for the message symbol format which pseudo-randomly positions each of said N-1 pulses after said first pulse within its frame by offsetting its pulse position from that of said first frame such that the separations of said pulses vary from frame to frame within a symbol, and said algorithmically determined position of any pulse falls within the live time of its frame.
摘要翻译：在使用脉冲位置调制的激光通信系统中的发射和接收装置之间进行安全通信的系统具有调制发射机装置和接收机装置，利用其中N（N> / = 1）个数的协议来解调传输光脉冲表示要发送的每个符号。通过触发事件启动传输。此后，发送多脉冲同步信号作为每次发送的第一符号，所述同步符号的第一脉冲在所述触发之后的第一时间帧内发送。所述接收机中的缓冲器接收并存储所述同步符号的所述N个帧的第一个。将所述同步符号的所述N个帧的后续接收帧加到预先存储在所述缓冲器中的数据中。从所述缓冲器中的所述前N个脉冲的存储的脉冲数据和所述同步符号协议计算帧模板。计算的帧模板用于后续消息符号的传输，然后以每个符号N个帧的形式传输。该系统包括用于同步符号格式的算法，其通过参考起始时间将其帧的开始时间偏移预定的时间量来在其帧内的所述第一脉冲之后伪随机地定位所述N-1个脉冲中的每一个的所述第一框架。该系统还包括消息符号格式的算法，其通过将其脉冲位置与所述第一帧的脉冲位置相抵消来在其帧内的所述第一脉冲之后伪随机地定位所述N-1个脉冲中的每一个，使得所述脉冲的分离从帧到帧内，并且所述算法确定的任何脉冲的位置落在其帧的实时时间内。

84. 发明授权

US4823364A Receive coupler for binary data communication systems 失效
标题翻译：接收二进制数据通信系统的耦合器
公开(公告)号：US4823364A
公开(公告)日：1989-04-18
申请号：US25168
申请日：1987-03-12
申请人： Hans K. Herzog
发明人： Hans K. Herzog
IPC分类号： H04L25/02 , H03K5/125 , H04L12/40 , H04L25/03 , H04L25/493 , H04B3/02
CPC分类号： H04L25/0266 , H04L25/493 , H04L2012/4028
摘要： A receive coupler for a binary data communication system that transmits signals in rectangular waveform on a data bus (11) is provided. The receive coupler includes a transition and polarity detector (17) that differentiates received signals and produces an output pulse on one or the other of two output lines (21a and 21b) for each transition of the received signal, the output line being dependent upon the rise-fall direction of the transition. That is, rise transitions create pulses on one output line (21a) and fall transitions create pulses on the other output line (21b). The receive coupler also includes reconstruction logic (19) connected to the output lines of the transition and polarity detector (17) that reconstructs the receive signal based on the pulses. The pulses are created in the transition and polarity detector by two differentiator-comparator combinations. One differentiator-comparator combination differentiates transitions of the rectangular waveform data signals amplified by a receiver amplifier (15) and produces a pulse when rise transition exceeds a threshold level and the other differentiator-comparator combination differentiates transitions of the rectangular waveform data signals amplified by the receiver amplifier (15) and produces a pulse when fall transition exceeds a threshold level.

85. 发明授权

US4070550A Quantized pulse modulated nonsynchronous clipped speech multi-channel coded communication system 失效
公开(公告)号：US4070550A
公开(公告)日：1978-01-24
申请号：US122056
申请日：1961-06-28
申请人： Ralph H. Miller, Jr. , William W. Dyer , John A. Waterbury , Wayland A. Carlson , Richard O. Eastman
发明人： Ralph H. Miller, Jr. , William W. Dyer , John A. Waterbury , Wayland A. Carlson , Richard O. Eastman
IPC分类号： H04J3/16 , H04L25/493 , H04J3/00
CPC分类号： H04L25/493 , H04J3/1676
摘要： 1. A quantized pulse-modulated nonsynchronous clipped speech multi-channeloded communication system comprising transmitter terminals and receiver terminals; said transmitter terminals comprising a plurality of channel units, a timing unit, and a transmitting unit; said channel unit including processing section, encoding section and pulse position modulating section; said processing section including input means for coupling a composite waveform thereto, pre-emphasis means operatively receiving said composite waveform for accentuating crossover points in the composite waveform, clipping means operatively receiving the output of said pre-emphasis means for infinitely clipping the amplitude portion of said composite waveform and retaining the frequency information therein, pulse generating means operatively coupled to the output of said clipping means for generating pulses corresponding to said crossover points; gate generator means contained within said encoding section and operatively coupled to the output of said pulse generating means for generating gate pulses; buffer circuit means contained within said timing unit operatively connected to the output of said gate generator means for isolating the outputs of said plurality of channel units, sampling means for sampling the outputs of said channel units fed to said buffer circuit means, first coincidence circuit means operatively receiving the output of said buffer circuit means and said sampling means for generating an output pulse when pulses from said summing circuit and said sampling means are coincident therein, channel coding means comprising a delay line operatively receiving pulses from said coincidence circuit means for generating start stop and a plurality of channel pulses corresponding to the number of channel units; second coincidence circuit means operatively receiving pulses from said gate generating means and pulses from said delay line corresponding to the appropriate channel unit for generating an output pulse when pulses from said gate generator and said delay line are coincident therein, blocking oscillator means operatively receiving pulses from the output of said second coincidence circuit means for generating first output pulse which is operatively coupled to said gate generator means for turning off said gate generating means and generating a second pulse; comparator means in said pulse position modulator section and operatively receiving the second output pulse from said blocking oscillator and receiving a signal corresponding to said composite waveform and time modulating said second output pulse from said blocking oscillator wherein the modulation corresponds to the amplitude information of the input waveform; other buffer circuit means contained within said transmitting unit for receiving start-stop pulses from said delay line and time modulated channel pulses from said comparator means wherein said channel pulses are contained between said start-stop pulses, and propagating means operatively receiving the output trains of pulses from said other buffer circuit means for propagating said trains of pulses; said receiver terminal comprisingThe invention described herein may be manufactured and used by or for the Government of the United States of America for governmental purposes without the payment of any royalties thereon or therefor.

86. 发明授权

US4003042A System for the transfer of two states by multiple scanning 失效
公开(公告)号：US4003042A
公开(公告)日：1977-01-11
申请号：US545113
申请日：1975-01-29
申请人： Hendrik Cornelis Anthony van Duuren
发明人： Hendrik Cornelis Anthony van Duuren
IPC分类号： H04L25/493 , H03K13/24
CPC分类号： H04L25/493
摘要： An improvement in applicant's co-pending application on a system for the transfer of point of time and direction of a transition between two states of an input by means of a code word of a predetermined plurality of bits, which improvement comprises using at least one less bit in the code word for indicating the direction of transition. The apparatus for carrying out this system comprises at a transmitter a device for scanning the input signal at a predetermined numbered of successive timed intervals corresponding at least to the number of bits in the code word to be generated, determining which interval or zone the transition in the binary input signal occurred, and generating the resulting code word in an encoder comprising logic circuits and a shift register having the same number of stages as bits in the code word. At the receiver the code word is reformed by registering it in a shift register having one more stage than the bits in the word, determining in a first logic circuit the direction of the transition, and in a second logic circuit the time zone in which the transition took place in order to regenerate the original binary signal. Usually two bits of the code word are used for indicating the time zone in which the transition occurred, and the other one or two-bits of the code word are used for indicating the direction of the transition. If two-bits are used for indicating the direction of transition, then three of the stages of the receiving shift register are connected to a majority of two out of three deciding circuit as the transition detector. In order to avoid erroneous transition detections as the bits received in the receiver shift register are shifted through the register, the stages for two-bits corresponding to the code of time zone are set to correspond with the stages for bits corresponding to the transition. For the scanning and generation of the pattern of repeated time zones and the number of bits in the code word, there are provided both at the transmitter and the receiver clock pulse generator and zone counter circuits.

87. 发明授权

US3975593A Time division multiplex system and method for the transmission of binary data 失效
标题翻译：时分复用系统和传输二进制数据的方法
公开(公告)号：US3975593A
公开(公告)日：1976-08-17
申请号：US528726
申请日：1974-12-02
申请人： Herbert Fick
发明人： Herbert Fick
IPC分类号： H04L5/22 , H04L5/24 , H04L25/493 , H04J3/04 , H04J3/16
CPC分类号： H04L25/493 , H04L5/24
摘要： A method and system for transmitting data in time division multiplex form is described. The data are composed of start-stop signals with a fixed transmission speed and a fixed signal frame, and of start-stop signals with arbitrary transmission speed and arbitrary signal frames. Signal frame control is used to transmit the signals having fixed transmission speeds and signal frames. The signals having arbitrary transmission speeds and signal frames are transmitted in a speed-transparent manner. Both groups of signals commonly employ in common the system's multiplex frame.
摘要翻译：描述了一种以时分复用形式发送数据的方法和系统。数据由具有固定传输速度和固定信号帧的起始停止信号以及具有任意传输速度和任意信号帧的起始停止信号组成。信号帧控制用于传输具有固定传输速度和信号帧的信号。具有任意传输速度和信号帧的信号以速度透明的方式发送。两组信号通常在系统的多路复用帧中共同使用。

88. 发明授权

US3894185A Digital run length synchronizer 失效
标题翻译：数字跑步同步器
公开(公告)号：US3894185A
公开(公告)日：1975-07-08
申请号：US44859274
申请日：1974-03-06
申请人： XEROX CORP
发明人： VIERI BRUNO J
IPC分类号： H04L25/493 , H04N1/40 , H04L7/00
CPC分类号： H04N1/40056 , H04L25/493
摘要： Apparatus and method for synchronizing run lengths in a twolevel digital facsimile system. A reversible counter is pulsed at a multiple of the system clock rate, the up count being started upon the occurrence of binary one information and stopped after reaching a predetermined count upon the occurrence of a system clock pulse. This system clock pulse is utilized to provide a binary one output signal. On a transition of the input signal to a binary zero state, the reversible counter is switched to its countdown state. After reaching the predetermined count, the following system clock pulse is utilized to change the output to the binary zero state. This eliminates variations in run lengths which occur when transitions have different phases with respect to the system clock.
摘要翻译：用于在两级数字传真系统中同步游程长度的装置和方法。可逆计数器以系统时钟速率的倍数脉冲，在发生二进制一个信息时开始向上计数，并且在系统时钟脉冲发生时达到预定计数之后停止。该系统时钟脉冲用于提供二进制一个输出信号。在输入信号转换为二进制零状态时，可逆计数器切换到其倒计时状态。在达到预定计数之后，使用以下系统时钟脉冲将输出改变为二进制零状态。这消除了当转换相对于系统时钟具有不同相位时出现的运行长度的变化。

89. 发明授权

US3535450A Multiplex transmission method 失效
标题翻译：多传输方法
公开(公告)号：US3535450A
公开(公告)日：1970-10-20
申请号：US3535450D
申请日：1967-11-29
申请人： SIEMENS AG
发明人： VOLLMEYER WERNER
IPC分类号： H04L5/22 , H04L25/22 , H04L25/46 , H04L25/493 , H04L5/00
CPC分类号： H04L5/225 , H04L5/22 , H04L25/22 , H04L25/46 , H04L25/493

90. 发明授权

US3478163A Reduced time transmission system 失效
标题翻译：减少时间传输系统
公开(公告)号：US3478163A
公开(公告)日：1969-11-11
申请号：US3478163D
申请日：1966-05-17
申请人： INT STANDARD ELECTRIC CORP
发明人： CHATELON ANDRE EDOUARD JOSEPH
IPC分类号： H04L25/493 , H04N1/417 , H04N7/12
CPC分类号： H04L25/493 , H04N1/417

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